drivers/iio/dac/ad5421.c

   1 /*
   2  * AD5421 Digital to analog converters  driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/delay.h>
  11 #include <linux/err.h>
  12 #include <linux/module.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/slab.h>
  17 #include <linux/sysfs.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include <linux/iio/events.h>
  22 #include <linux/iio/dac/ad5421.h>
  23
  24
  25 #define AD5421_REG_DAC_DATA             0x1
  26 #define AD5421_REG_CTRL                 0x2
  27 #define AD5421_REG_OFFSET               0x3
  28 #define AD5421_REG_GAIN                 0x4
  29 /* load dac and fault shared the same register number. Writing to it will cause
  30  * a dac load command, reading from it will return the fault status register */
  31 #define AD5421_REG_LOAD_DAC             0x5
  32 #define AD5421_REG_FAULT                0x5
  33 #define AD5421_REG_FORCE_ALARM_CURRENT  0x6
  34 #define AD5421_REG_RESET                0x7
  35 #define AD5421_REG_START_CONVERSION     0x8
  36 #define AD5421_REG_NOOP                 0x9
  37
  38 #define AD5421_CTRL_WATCHDOG_DISABLE    BIT(12)
  39 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
  40 #define AD5421_CTRL_MIN_CURRENT         BIT(9)
  41 #define AD5421_CTRL_ADC_SOURCE_TEMP     BIT(8)
  42 #define AD5421_CTRL_ADC_ENABLE          BIT(7)
  43 #define AD5421_CTRL_PWR_DOWN_INT_VREF   BIT(6)
  44
  45 #define AD5421_FAULT_SPI                        BIT(15)
  46 #define AD5421_FAULT_PEC                        BIT(14)
  47 #define AD5421_FAULT_OVER_CURRENT               BIT(13)
  48 #define AD5421_FAULT_UNDER_CURRENT              BIT(12)
  49 #define AD5421_FAULT_TEMP_OVER_140              BIT(11)
  50 #define AD5421_FAULT_TEMP_OVER_100              BIT(10)
  51 #define AD5421_FAULT_UNDER_VOLTAGE_6V           BIT(9)
  52 #define AD5421_FAULT_UNDER_VOLTAGE_12V          BIT(8)
  53
  54 /* These bits will cause the fault pin to go high */
  55 #define AD5421_FAULT_TRIGGER_IRQ \
  56         (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
  57         AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
  58
  59 /**
  60  * struct ad5421_state - driver instance specific data
  61  * @spi:                spi_device
  62  * @ctrl:               control register cache
  63  * @current_range:      current range which the device is configured for
  64  * @data:               spi transfer buffers
  65  * @fault_mask:         software masking of events
  66  */
  67 struct ad5421_state {
  68         struct spi_device               *spi;
  69         unsigned int                    ctrl;
  70         enum ad5421_current_range       current_range;
  71         unsigned int                    fault_mask;
  72
  73         /*
  74          * DMA (thus cache coherency maintenance) requires the
  75          * transfer buffers to live in their own cache lines.
  76          */
  77         union {
  78                 u32 d32;
  79                 u8 d8[4];
  80         } data[2] ____cacheline_aligned;
  81 };
  82
  83 static const struct iio_chan_spec ad5421_channels[] = {
  84         {
  85                 .type = IIO_CURRENT,
  86                 .indexed = 1,
  87                 .output = 1,
  88                 .channel = 0,
  89                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  90                         BIT(IIO_CHAN_INFO_CALIBSCALE) |
  91                         BIT(IIO_CHAN_INFO_CALIBBIAS),
  92                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
  93                         BIT(IIO_CHAN_INFO_OFFSET),
  94                 .scan_type = IIO_ST('u', 16, 16, 0),
  95                 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
  96                         IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
  97         },
  98         {
  99                 .type = IIO_TEMP,
 100                 .channel = -1,
 101                 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 102         },
 103 };
 104
 105 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
 106         unsigned int reg, unsigned int val)
 107 {
 108         struct ad5421_state *st = iio_priv(indio_dev);
 109
 110         st->data[0].d32 = cpu_to_be32((reg << 16) | val);
 111
 112         return spi_write(st->spi, &st->data[0].d8[1], 3);
 113 }
 114
 115 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
 116         unsigned int val)
 117 {
 118         int ret;
 119
 120         mutex_lock(&indio_dev->mlock);
 121         ret = ad5421_write_unlocked(indio_dev, reg, val);
 122         mutex_unlock(&indio_dev->mlock);
 123
 124         return ret;
 125 }
 126
 127 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
 128 {
 129         struct ad5421_state *st = iio_priv(indio_dev);
 130         int ret;
 131         struct spi_transfer t[] = {
 132                 {
 133                         .tx_buf = &st->data[0].d8[1],
 134                         .len = 3,
 135                         .cs_change = 1,
 136                 }, {
 137                         .rx_buf = &st->data[1].d8[1],
 138                         .len = 3,
 139                 },
 140         };
 141
 142         mutex_lock(&indio_dev->mlock);
 143
 144         st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
 145
 146         ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
 147         if (ret >= 0)
 148                 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
 149
 150         mutex_unlock(&indio_dev->mlock);
 151
 152         return ret;
 153 }
 154
 155 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
 156         unsigned int clr)
 157 {
 158         struct ad5421_state *st = iio_priv(indio_dev);
 159         unsigned int ret;
 160
 161         mutex_lock(&indio_dev->mlock);
 162
 163         st->ctrl &= ~clr;
 164         st->ctrl |= set;
 165
 166         ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
 167
 168         mutex_unlock(&indio_dev->mlock);
 169
 170         return ret;
 171 }
 172
 173 static irqreturn_t ad5421_fault_handler(int irq, void *data)
 174 {
 175         struct iio_dev *indio_dev = data;
 176         struct ad5421_state *st = iio_priv(indio_dev);
 177         unsigned int fault;
 178         unsigned int old_fault = 0;
 179         unsigned int events;
 180
 181         fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
 182         if (!fault)
 183                 return IRQ_NONE;
 184
 185         /* If we had a fault, this might mean that the DAC has lost its state
 186          * and has been reset. Make sure that the control register actually
 187          * contains what we expect it to contain. Otherwise the watchdog might
 188          * be enabled and we get watchdog timeout faults, which will render the
 189          * DAC unusable. */
 190         ad5421_update_ctrl(indio_dev, 0, 0);
 191
 192
 193         /* The fault pin stays high as long as a fault condition is present and
 194          * it is not possible to mask fault conditions. For certain fault
 195          * conditions for example like over-temperature it takes some time
 196          * until the fault condition disappears. If we would exit the interrupt
 197          * handler immediately after handling the event it would be entered
 198          * again instantly. Thus we fall back to polling in case we detect that
 199          * a interrupt condition is still present.
 200          */
 201         do {
 202                 /* 0xffff is a invalid value for the register and will only be
 203                  * read if there has been a communication error */
 204                 if (fault == 0xffff)
 205                         fault = 0;
 206
 207                 /* we are only interested in new events */
 208                 events = (old_fault ^ fault) & fault;
 209                 events &= st->fault_mask;
 210
 211                 if (events & AD5421_FAULT_OVER_CURRENT) {
 212                         iio_push_event(indio_dev,
 213                                 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
 214                                         0,
 215                                         IIO_EV_TYPE_THRESH,
 216                                         IIO_EV_DIR_RISING),
 217                         iio_get_time_ns());
 218                 }
 219
 220                 if (events & AD5421_FAULT_UNDER_CURRENT) {
 221                         iio_push_event(indio_dev,
 222                                 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
 223                                         0,
 224                                         IIO_EV_TYPE_THRESH,
 225                                         IIO_EV_DIR_FALLING),
 226                                 iio_get_time_ns());
 227                 }
 228
 229                 if (events & AD5421_FAULT_TEMP_OVER_140) {
 230                         iio_push_event(indio_dev,
 231                                 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 232                                         0,
 233                                         IIO_EV_TYPE_MAG,
 234                                         IIO_EV_DIR_RISING),
 235                                 iio_get_time_ns());
 236                 }
 237
 238                 old_fault = fault;
 239                 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
 240
 241                 /* still active? go to sleep for some time */
 242                 if (fault & AD5421_FAULT_TRIGGER_IRQ)
 243                         msleep(1000);
 244
 245         } while (fault & AD5421_FAULT_TRIGGER_IRQ);
 246
 247
 248         return IRQ_HANDLED;
 249 }
 250
 251 static void ad5421_get_current_min_max(struct ad5421_state *st,
 252         unsigned int *min, unsigned int *max)
 253 {
 254         /* The current range is configured using external pins, which are
 255          * usually hard-wired and not run-time switchable. */
 256         switch (st->current_range) {
 257         case AD5421_CURRENT_RANGE_4mA_20mA:
 258                 *min = 4000;
 259                 *max = 20000;
 260                 break;
 261         case AD5421_CURRENT_RANGE_3mA8_21mA:
 262                 *min = 3800;
 263                 *max = 21000;
 264                 break;
 265         case AD5421_CURRENT_RANGE_3mA2_24mA:
 266                 *min = 3200;
 267                 *max = 24000;
 268                 break;
 269         default:
 270                 *min = 0;
 271                 *max = 1;
 272                 break;
 273         }
 274 }
 275
 276 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
 277 {
 278         unsigned int min, max;
 279
 280         ad5421_get_current_min_max(st, &min, &max);
 281         return (min * (1 << 16)) / (max - min);
 282 }
 283
 284 static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
 285 {
 286         unsigned int min, max;
 287
 288         ad5421_get_current_min_max(st, &min, &max);
 289         return ((max - min) * 1000) / (1 << 16);
 290 }
 291
 292 static int ad5421_read_raw(struct iio_dev *indio_dev,
 293         struct iio_chan_spec const *chan, int *val, int *val2, long m)
 294 {
 295         struct ad5421_state *st = iio_priv(indio_dev);
 296         int ret;
 297
 298         if (chan->type != IIO_CURRENT)
 299                 return -EINVAL;
 300
 301         switch (m) {
 302         case IIO_CHAN_INFO_RAW:
 303                 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
 304                 if (ret < 0)
 305                         return ret;
 306                 *val = ret;
 307                 return IIO_VAL_INT;
 308         case IIO_CHAN_INFO_SCALE:
 309                 *val = 0;
 310                 *val2 = ad5421_get_scale(st);
 311                 return IIO_VAL_INT_PLUS_MICRO;
 312         case IIO_CHAN_INFO_OFFSET:
 313                 *val = ad5421_get_offset(st);
 314                 return IIO_VAL_INT;
 315         case IIO_CHAN_INFO_CALIBBIAS:
 316                 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
 317                 if (ret < 0)
 318                         return ret;
 319                 *val = ret - 32768;
 320                 return IIO_VAL_INT;
 321         case IIO_CHAN_INFO_CALIBSCALE:
 322                 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
 323                 if (ret < 0)
 324                         return ret;
 325                 *val = ret;
 326                 return IIO_VAL_INT;
 327         }
 328
 329         return -EINVAL;
 330 }
 331
 332 static int ad5421_write_raw(struct iio_dev *indio_dev,
 333         struct iio_chan_spec const *chan, int val, int val2, long mask)
 334 {
 335         const unsigned int max_val = 1 << 16;
 336
 337         switch (mask) {
 338         case IIO_CHAN_INFO_RAW:
 339                 if (val >= max_val || val < 0)
 340                         return -EINVAL;
 341
 342                 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
 343         case IIO_CHAN_INFO_CALIBBIAS:
 344                 val += 32768;
 345                 if (val >= max_val || val < 0)
 346                         return -EINVAL;
 347
 348                 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
 349         case IIO_CHAN_INFO_CALIBSCALE:
 350                 if (val >= max_val || val < 0)
 351                         return -EINVAL;
 352
 353                 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
 354         default:
 355                 break;
 356         }
 357
 358         return -EINVAL;
 359 }
 360
 361 static int ad5421_write_event_config(struct iio_dev *indio_dev,
 362         u64 event_code, int state)
 363 {
 364         struct ad5421_state *st = iio_priv(indio_dev);
 365         unsigned int mask;
 366
 367         switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
 368         case IIO_CURRENT:
 369                 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
 370                         IIO_EV_DIR_RISING)
 371                         mask = AD5421_FAULT_OVER_CURRENT;
 372                 else
 373                         mask = AD5421_FAULT_UNDER_CURRENT;
 374                 break;
 375         case IIO_TEMP:
 376                 mask = AD5421_FAULT_TEMP_OVER_140;
 377                 break;
 378         default:
 379                 return -EINVAL;
 380         }
 381
 382         mutex_lock(&indio_dev->mlock);
 383         if (state)
 384                 st->fault_mask |= mask;
 385         else
 386                 st->fault_mask &= ~mask;
 387         mutex_unlock(&indio_dev->mlock);
 388
 389         return 0;
 390 }
 391
 392 static int ad5421_read_event_config(struct iio_dev *indio_dev,
 393         u64 event_code)
 394 {
 395         struct ad5421_state *st = iio_priv(indio_dev);
 396         unsigned int mask;
 397
 398         switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
 399         case IIO_CURRENT:
 400                 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
 401                         IIO_EV_DIR_RISING)
 402                         mask = AD5421_FAULT_OVER_CURRENT;
 403                 else
 404                         mask = AD5421_FAULT_UNDER_CURRENT;
 405                 break;
 406         case IIO_TEMP:
 407                 mask = AD5421_FAULT_TEMP_OVER_140;
 408                 break;
 409         default:
 410                 return -EINVAL;
 411         }
 412
 413         return (bool)(st->fault_mask & mask);
 414 }
 415
 416 static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
 417         int *val)
 418 {
 419         int ret;
 420
 421         switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
 422         case IIO_CURRENT:
 423                 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
 424                 if (ret < 0)
 425                         return ret;
 426                 *val = ret;
 427                 break;
 428         case IIO_TEMP:
 429                 *val = 140000;
 430                 break;
 431         default:
 432                 return -EINVAL;
 433         }
 434
 435         return 0;
 436 }
 437
 438 static const struct iio_info ad5421_info = {
 439         .read_raw =             ad5421_read_raw,
 440         .write_raw =            ad5421_write_raw,
 441         .read_event_config =    ad5421_read_event_config,
 442         .write_event_config =   ad5421_write_event_config,
 443         .read_event_value =     ad5421_read_event_value,
 444         .driver_module =        THIS_MODULE,
 445 };
 446
 447 static int ad5421_probe(struct spi_device *spi)
 448 {
 449         struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
 450         struct iio_dev *indio_dev;
 451         struct ad5421_state *st;
 452         int ret;
 453
 454         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 455         if (indio_dev == NULL) {
 456                 dev_err(&spi->dev, "Failed to allocate iio device\n");
 457                 return  -ENOMEM;
 458         }
 459
 460         st = iio_priv(indio_dev);
 461         spi_set_drvdata(spi, indio_dev);
 462
 463         st->spi = spi;
 464
 465         indio_dev->dev.parent = &spi->dev;
 466         indio_dev->name = "ad5421";
 467         indio_dev->info = &ad5421_info;
 468         indio_dev->modes = INDIO_DIRECT_MODE;
 469         indio_dev->channels = ad5421_channels;
 470         indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
 471
 472         st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
 473                         AD5421_CTRL_AUTO_FAULT_READBACK;
 474
 475         if (pdata) {
 476                 st->current_range = pdata->current_range;
 477                 if (pdata->external_vref)
 478                         st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
 479         } else {
 480                 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
 481         }
 482
 483         /* write initial ctrl register value */
 484         ad5421_update_ctrl(indio_dev, 0, 0);
 485
 486         if (spi->irq) {
 487                 ret = devm_request_threaded_irq(&spi->dev, spi->irq,
 488                                            NULL,
 489                                            ad5421_fault_handler,
 490                                            IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
 491                                            "ad5421 fault",
 492                                            indio_dev);
 493                 if (ret)
 494                         return ret;
 495         }
 496
 497         ret = iio_device_register(indio_dev);
 498         if (ret) {
 499                 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
 500                 return ret;
 501         }
 502
 503         return 0;
 504 }
 505
 506 static int ad5421_remove(struct spi_device *spi)
 507 {
 508         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 509
 510         iio_device_unregister(indio_dev);
 511
 512         return 0;
 513 }
 514
 515 static struct spi_driver ad5421_driver = {
 516         .driver = {
 517                    .name = "ad5421",
 518                    .owner = THIS_MODULE,
 519         },
 520         .probe = ad5421_probe,
 521         .remove = ad5421_remove,
 522 };
 523 module_spi_driver(ad5421_driver);
 524
 525 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 526 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
 527 MODULE_LICENSE("GPL v2");
 528 MODULE_ALIAS("spi:ad5421");