2 * ST Microelectronics MFD: stmpe's driver
4 * Copyright (C) ST-Ericsson SA 2010
6 * License Terms: GNU General Public License, version 2
7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
10 #include <linux/err.h>
11 #include <linux/gpio.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
18 #include <linux/of_gpio.h>
20 #include <linux/slab.h>
21 #include <linux/mfd/core.h>
22 #include <linux/delay.h>
25 static int __stmpe_enable(struct stmpe
*stmpe
, unsigned int blocks
)
27 return stmpe
->variant
->enable(stmpe
, blocks
, true);
30 static int __stmpe_disable(struct stmpe
*stmpe
, unsigned int blocks
)
32 return stmpe
->variant
->enable(stmpe
, blocks
, false);
35 static int __stmpe_reg_read(struct stmpe
*stmpe
, u8 reg
)
39 ret
= stmpe
->ci
->read_byte(stmpe
, reg
);
41 dev_err(stmpe
->dev
, "failed to read reg %#x: %d\n", reg
, ret
);
43 dev_vdbg(stmpe
->dev
, "rd: reg %#x => data %#x\n", reg
, ret
);
48 static int __stmpe_reg_write(struct stmpe
*stmpe
, u8 reg
, u8 val
)
52 dev_vdbg(stmpe
->dev
, "wr: reg %#x <= %#x\n", reg
, val
);
54 ret
= stmpe
->ci
->write_byte(stmpe
, reg
, val
);
56 dev_err(stmpe
->dev
, "failed to write reg %#x: %d\n", reg
, ret
);
61 static int __stmpe_set_bits(struct stmpe
*stmpe
, u8 reg
, u8 mask
, u8 val
)
65 ret
= __stmpe_reg_read(stmpe
, reg
);
72 return __stmpe_reg_write(stmpe
, reg
, ret
);
75 static int __stmpe_block_read(struct stmpe
*stmpe
, u8 reg
, u8 length
,
80 ret
= stmpe
->ci
->read_block(stmpe
, reg
, length
, values
);
82 dev_err(stmpe
->dev
, "failed to read regs %#x: %d\n", reg
, ret
);
84 dev_vdbg(stmpe
->dev
, "rd: reg %#x (%d) => ret %#x\n", reg
, length
, ret
);
85 stmpe_dump_bytes("stmpe rd: ", values
, length
);
90 static int __stmpe_block_write(struct stmpe
*stmpe
, u8 reg
, u8 length
,
95 dev_vdbg(stmpe
->dev
, "wr: regs %#x (%d)\n", reg
, length
);
96 stmpe_dump_bytes("stmpe wr: ", values
, length
);
98 ret
= stmpe
->ci
->write_block(stmpe
, reg
, length
, values
);
100 dev_err(stmpe
->dev
, "failed to write regs %#x: %d\n", reg
, ret
);
106 * stmpe_enable - enable blocks on an STMPE device
107 * @stmpe: Device to work on
108 * @blocks: Mask of blocks (enum stmpe_block values) to enable
110 int stmpe_enable(struct stmpe
*stmpe
, unsigned int blocks
)
114 mutex_lock(&stmpe
->lock
);
115 ret
= __stmpe_enable(stmpe
, blocks
);
116 mutex_unlock(&stmpe
->lock
);
120 EXPORT_SYMBOL_GPL(stmpe_enable
);
123 * stmpe_disable - disable blocks on an STMPE device
124 * @stmpe: Device to work on
125 * @blocks: Mask of blocks (enum stmpe_block values) to enable
127 int stmpe_disable(struct stmpe
*stmpe
, unsigned int blocks
)
131 mutex_lock(&stmpe
->lock
);
132 ret
= __stmpe_disable(stmpe
, blocks
);
133 mutex_unlock(&stmpe
->lock
);
137 EXPORT_SYMBOL_GPL(stmpe_disable
);
140 * stmpe_reg_read() - read a single STMPE register
141 * @stmpe: Device to read from
142 * @reg: Register to read
144 int stmpe_reg_read(struct stmpe
*stmpe
, u8 reg
)
148 mutex_lock(&stmpe
->lock
);
149 ret
= __stmpe_reg_read(stmpe
, reg
);
150 mutex_unlock(&stmpe
->lock
);
154 EXPORT_SYMBOL_GPL(stmpe_reg_read
);
157 * stmpe_reg_write() - write a single STMPE register
158 * @stmpe: Device to write to
159 * @reg: Register to write
160 * @val: Value to write
162 int stmpe_reg_write(struct stmpe
*stmpe
, u8 reg
, u8 val
)
166 mutex_lock(&stmpe
->lock
);
167 ret
= __stmpe_reg_write(stmpe
, reg
, val
);
168 mutex_unlock(&stmpe
->lock
);
172 EXPORT_SYMBOL_GPL(stmpe_reg_write
);
175 * stmpe_set_bits() - set the value of a bitfield in a STMPE register
176 * @stmpe: Device to write to
177 * @reg: Register to write
178 * @mask: Mask of bits to set
181 int stmpe_set_bits(struct stmpe
*stmpe
, u8 reg
, u8 mask
, u8 val
)
185 mutex_lock(&stmpe
->lock
);
186 ret
= __stmpe_set_bits(stmpe
, reg
, mask
, val
);
187 mutex_unlock(&stmpe
->lock
);
191 EXPORT_SYMBOL_GPL(stmpe_set_bits
);
194 * stmpe_block_read() - read multiple STMPE registers
195 * @stmpe: Device to read from
196 * @reg: First register
197 * @length: Number of registers
198 * @values: Buffer to write to
200 int stmpe_block_read(struct stmpe
*stmpe
, u8 reg
, u8 length
, u8
*values
)
204 mutex_lock(&stmpe
->lock
);
205 ret
= __stmpe_block_read(stmpe
, reg
, length
, values
);
206 mutex_unlock(&stmpe
->lock
);
210 EXPORT_SYMBOL_GPL(stmpe_block_read
);
213 * stmpe_block_write() - write multiple STMPE registers
214 * @stmpe: Device to write to
215 * @reg: First register
216 * @length: Number of registers
217 * @values: Values to write
219 int stmpe_block_write(struct stmpe
*stmpe
, u8 reg
, u8 length
,
224 mutex_lock(&stmpe
->lock
);
225 ret
= __stmpe_block_write(stmpe
, reg
, length
, values
);
226 mutex_unlock(&stmpe
->lock
);
230 EXPORT_SYMBOL_GPL(stmpe_block_write
);
233 * stmpe_set_altfunc()- set the alternate function for STMPE pins
234 * @stmpe: Device to configure
235 * @pins: Bitmask of pins to affect
236 * @block: block to enable alternate functions for
238 * @pins is assumed to have a bit set for each of the bits whose alternate
239 * function is to be changed, numbered according to the GPIOXY numbers.
241 * If the GPIO module is not enabled, this function automatically enables it in
242 * order to perform the change.
244 int stmpe_set_altfunc(struct stmpe
*stmpe
, u32 pins
, enum stmpe_block block
)
246 struct stmpe_variant_info
*variant
= stmpe
->variant
;
247 u8 regaddr
= stmpe
->regs
[STMPE_IDX_GPAFR_U_MSB
];
248 int af_bits
= variant
->af_bits
;
249 int numregs
= DIV_ROUND_UP(stmpe
->num_gpios
* af_bits
, 8);
250 int mask
= (1 << af_bits
) - 1;
252 int af
, afperreg
, ret
;
254 if (!variant
->get_altfunc
)
257 afperreg
= 8 / af_bits
;
258 mutex_lock(&stmpe
->lock
);
260 ret
= __stmpe_enable(stmpe
, STMPE_BLOCK_GPIO
);
264 ret
= __stmpe_block_read(stmpe
, regaddr
, numregs
, regs
);
268 af
= variant
->get_altfunc(stmpe
, block
);
271 int pin
= __ffs(pins
);
272 int regoffset
= numregs
- (pin
/ afperreg
) - 1;
273 int pos
= (pin
% afperreg
) * (8 / afperreg
);
275 regs
[regoffset
] &= ~(mask
<< pos
);
276 regs
[regoffset
] |= af
<< pos
;
281 ret
= __stmpe_block_write(stmpe
, regaddr
, numregs
, regs
);
284 mutex_unlock(&stmpe
->lock
);
287 EXPORT_SYMBOL_GPL(stmpe_set_altfunc
);
290 * GPIO (all variants)
293 static struct resource stmpe_gpio_resources
[] = {
294 /* Start and end filled dynamically */
296 .flags
= IORESOURCE_IRQ
,
300 static struct mfd_cell stmpe_gpio_cell
= {
301 .name
= "stmpe-gpio",
302 .of_compatible
= "st,stmpe-gpio",
303 .resources
= stmpe_gpio_resources
,
304 .num_resources
= ARRAY_SIZE(stmpe_gpio_resources
),
307 static struct mfd_cell stmpe_gpio_cell_noirq
= {
308 .name
= "stmpe-gpio",
309 .of_compatible
= "st,stmpe-gpio",
310 /* gpio cell resources consist of an irq only so no resources here */
314 * Keypad (1601, 2401, 2403)
317 static struct resource stmpe_keypad_resources
[] = {
320 .flags
= IORESOURCE_IRQ
,
323 .name
= "KEYPAD_OVER",
324 .flags
= IORESOURCE_IRQ
,
328 static struct mfd_cell stmpe_keypad_cell
= {
329 .name
= "stmpe-keypad",
330 .of_compatible
= "st,stmpe-keypad",
331 .resources
= stmpe_keypad_resources
,
332 .num_resources
= ARRAY_SIZE(stmpe_keypad_resources
),
338 static const u8 stmpe801_regs
[] = {
339 [STMPE_IDX_CHIP_ID
] = STMPE801_REG_CHIP_ID
,
340 [STMPE_IDX_ICR_LSB
] = STMPE801_REG_SYS_CTRL
,
341 [STMPE_IDX_GPMR_LSB
] = STMPE801_REG_GPIO_MP_STA
,
342 [STMPE_IDX_GPSR_LSB
] = STMPE801_REG_GPIO_SET_PIN
,
343 [STMPE_IDX_GPCR_LSB
] = STMPE801_REG_GPIO_SET_PIN
,
344 [STMPE_IDX_GPDR_LSB
] = STMPE801_REG_GPIO_DIR
,
345 [STMPE_IDX_IEGPIOR_LSB
] = STMPE801_REG_GPIO_INT_EN
,
346 [STMPE_IDX_ISGPIOR_MSB
] = STMPE801_REG_GPIO_INT_STA
,
350 static struct stmpe_variant_block stmpe801_blocks
[] = {
352 .cell
= &stmpe_gpio_cell
,
354 .block
= STMPE_BLOCK_GPIO
,
358 static struct stmpe_variant_block stmpe801_blocks_noirq
[] = {
360 .cell
= &stmpe_gpio_cell_noirq
,
361 .block
= STMPE_BLOCK_GPIO
,
365 static int stmpe801_enable(struct stmpe
*stmpe
, unsigned int blocks
,
368 if (blocks
& STMPE_BLOCK_GPIO
)
374 static struct stmpe_variant_info stmpe801
= {
376 .id_val
= STMPE801_ID
,
379 .regs
= stmpe801_regs
,
380 .blocks
= stmpe801_blocks
,
381 .num_blocks
= ARRAY_SIZE(stmpe801_blocks
),
382 .num_irqs
= STMPE801_NR_INTERNAL_IRQS
,
383 .enable
= stmpe801_enable
,
386 static struct stmpe_variant_info stmpe801_noirq
= {
388 .id_val
= STMPE801_ID
,
391 .regs
= stmpe801_regs
,
392 .blocks
= stmpe801_blocks_noirq
,
393 .num_blocks
= ARRAY_SIZE(stmpe801_blocks_noirq
),
394 .enable
= stmpe801_enable
,
398 * Touchscreen (STMPE811 or STMPE610)
401 static struct resource stmpe_ts_resources
[] = {
404 .flags
= IORESOURCE_IRQ
,
408 .flags
= IORESOURCE_IRQ
,
412 static struct mfd_cell stmpe_ts_cell
= {
414 .of_compatible
= "st,stmpe-ts",
415 .resources
= stmpe_ts_resources
,
416 .num_resources
= ARRAY_SIZE(stmpe_ts_resources
),
420 * STMPE811 or STMPE610
423 static const u8 stmpe811_regs
[] = {
424 [STMPE_IDX_CHIP_ID
] = STMPE811_REG_CHIP_ID
,
425 [STMPE_IDX_ICR_LSB
] = STMPE811_REG_INT_CTRL
,
426 [STMPE_IDX_IER_LSB
] = STMPE811_REG_INT_EN
,
427 [STMPE_IDX_ISR_MSB
] = STMPE811_REG_INT_STA
,
428 [STMPE_IDX_GPMR_LSB
] = STMPE811_REG_GPIO_MP_STA
,
429 [STMPE_IDX_GPSR_LSB
] = STMPE811_REG_GPIO_SET_PIN
,
430 [STMPE_IDX_GPCR_LSB
] = STMPE811_REG_GPIO_CLR_PIN
,
431 [STMPE_IDX_GPDR_LSB
] = STMPE811_REG_GPIO_DIR
,
432 [STMPE_IDX_GPRER_LSB
] = STMPE811_REG_GPIO_RE
,
433 [STMPE_IDX_GPFER_LSB
] = STMPE811_REG_GPIO_FE
,
434 [STMPE_IDX_GPAFR_U_MSB
] = STMPE811_REG_GPIO_AF
,
435 [STMPE_IDX_IEGPIOR_LSB
] = STMPE811_REG_GPIO_INT_EN
,
436 [STMPE_IDX_ISGPIOR_MSB
] = STMPE811_REG_GPIO_INT_STA
,
437 [STMPE_IDX_GPEDR_MSB
] = STMPE811_REG_GPIO_ED
,
440 static struct stmpe_variant_block stmpe811_blocks
[] = {
442 .cell
= &stmpe_gpio_cell
,
443 .irq
= STMPE811_IRQ_GPIOC
,
444 .block
= STMPE_BLOCK_GPIO
,
447 .cell
= &stmpe_ts_cell
,
448 .irq
= STMPE811_IRQ_TOUCH_DET
,
449 .block
= STMPE_BLOCK_TOUCHSCREEN
,
453 static int stmpe811_enable(struct stmpe
*stmpe
, unsigned int blocks
,
456 unsigned int mask
= 0;
458 if (blocks
& STMPE_BLOCK_GPIO
)
459 mask
|= STMPE811_SYS_CTRL2_GPIO_OFF
;
461 if (blocks
& STMPE_BLOCK_ADC
)
462 mask
|= STMPE811_SYS_CTRL2_ADC_OFF
;
464 if (blocks
& STMPE_BLOCK_TOUCHSCREEN
)
465 mask
|= STMPE811_SYS_CTRL2_TSC_OFF
;
467 return __stmpe_set_bits(stmpe
, STMPE811_REG_SYS_CTRL2
, mask
,
471 static int stmpe811_get_altfunc(struct stmpe
*stmpe
, enum stmpe_block block
)
473 /* 0 for touchscreen, 1 for GPIO */
474 return block
!= STMPE_BLOCK_TOUCHSCREEN
;
477 static struct stmpe_variant_info stmpe811
= {
483 .regs
= stmpe811_regs
,
484 .blocks
= stmpe811_blocks
,
485 .num_blocks
= ARRAY_SIZE(stmpe811_blocks
),
486 .num_irqs
= STMPE811_NR_INTERNAL_IRQS
,
487 .enable
= stmpe811_enable
,
488 .get_altfunc
= stmpe811_get_altfunc
,
491 /* Similar to 811, except number of gpios */
492 static struct stmpe_variant_info stmpe610
= {
498 .regs
= stmpe811_regs
,
499 .blocks
= stmpe811_blocks
,
500 .num_blocks
= ARRAY_SIZE(stmpe811_blocks
),
501 .num_irqs
= STMPE811_NR_INTERNAL_IRQS
,
502 .enable
= stmpe811_enable
,
503 .get_altfunc
= stmpe811_get_altfunc
,
510 static const u8 stmpe1601_regs
[] = {
511 [STMPE_IDX_CHIP_ID
] = STMPE1601_REG_CHIP_ID
,
512 [STMPE_IDX_ICR_LSB
] = STMPE1601_REG_ICR_LSB
,
513 [STMPE_IDX_IER_LSB
] = STMPE1601_REG_IER_LSB
,
514 [STMPE_IDX_ISR_MSB
] = STMPE1601_REG_ISR_MSB
,
515 [STMPE_IDX_GPMR_LSB
] = STMPE1601_REG_GPIO_MP_LSB
,
516 [STMPE_IDX_GPSR_LSB
] = STMPE1601_REG_GPIO_SET_LSB
,
517 [STMPE_IDX_GPCR_LSB
] = STMPE1601_REG_GPIO_CLR_LSB
,
518 [STMPE_IDX_GPDR_LSB
] = STMPE1601_REG_GPIO_SET_DIR_LSB
,
519 [STMPE_IDX_GPRER_LSB
] = STMPE1601_REG_GPIO_RE_LSB
,
520 [STMPE_IDX_GPFER_LSB
] = STMPE1601_REG_GPIO_FE_LSB
,
521 [STMPE_IDX_GPAFR_U_MSB
] = STMPE1601_REG_GPIO_AF_U_MSB
,
522 [STMPE_IDX_IEGPIOR_LSB
] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB
,
523 [STMPE_IDX_ISGPIOR_MSB
] = STMPE1601_REG_INT_STA_GPIO_MSB
,
524 [STMPE_IDX_GPEDR_MSB
] = STMPE1601_REG_GPIO_ED_MSB
,
527 static struct stmpe_variant_block stmpe1601_blocks
[] = {
529 .cell
= &stmpe_gpio_cell
,
530 .irq
= STMPE1601_IRQ_GPIOC
,
531 .block
= STMPE_BLOCK_GPIO
,
534 .cell
= &stmpe_keypad_cell
,
535 .irq
= STMPE1601_IRQ_KEYPAD
,
536 .block
= STMPE_BLOCK_KEYPAD
,
540 /* supported autosleep timeout delay (in msecs) */
541 static const int stmpe_autosleep_delay
[] = {
542 4, 16, 32, 64, 128, 256, 512, 1024,
545 static int stmpe_round_timeout(int timeout
)
549 for (i
= 0; i
< ARRAY_SIZE(stmpe_autosleep_delay
); i
++) {
550 if (stmpe_autosleep_delay
[i
] >= timeout
)
555 * requests for delays longer than supported should not return the
556 * longest supported delay
561 static int stmpe_autosleep(struct stmpe
*stmpe
, int autosleep_timeout
)
565 if (!stmpe
->variant
->enable_autosleep
)
568 mutex_lock(&stmpe
->lock
);
569 ret
= stmpe
->variant
->enable_autosleep(stmpe
, autosleep_timeout
);
570 mutex_unlock(&stmpe
->lock
);
576 * Both stmpe 1601/2403 support same layout for autosleep
578 static int stmpe1601_autosleep(struct stmpe
*stmpe
,
579 int autosleep_timeout
)
583 /* choose the best available timeout */
584 timeout
= stmpe_round_timeout(autosleep_timeout
);
586 dev_err(stmpe
->dev
, "invalid timeout\n");
590 ret
= __stmpe_set_bits(stmpe
, STMPE1601_REG_SYS_CTRL2
,
591 STMPE1601_AUTOSLEEP_TIMEOUT_MASK
,
596 return __stmpe_set_bits(stmpe
, STMPE1601_REG_SYS_CTRL2
,
597 STPME1601_AUTOSLEEP_ENABLE
,
598 STPME1601_AUTOSLEEP_ENABLE
);
601 static int stmpe1601_enable(struct stmpe
*stmpe
, unsigned int blocks
,
604 unsigned int mask
= 0;
606 if (blocks
& STMPE_BLOCK_GPIO
)
607 mask
|= STMPE1601_SYS_CTRL_ENABLE_GPIO
;
609 if (blocks
& STMPE_BLOCK_KEYPAD
)
610 mask
|= STMPE1601_SYS_CTRL_ENABLE_KPC
;
612 return __stmpe_set_bits(stmpe
, STMPE1601_REG_SYS_CTRL
, mask
,
616 static int stmpe1601_get_altfunc(struct stmpe
*stmpe
, enum stmpe_block block
)
619 case STMPE_BLOCK_PWM
:
622 case STMPE_BLOCK_KEYPAD
:
625 case STMPE_BLOCK_GPIO
:
631 static struct stmpe_variant_info stmpe1601
= {
634 .id_mask
= 0xfff0, /* at least 0x0210 and 0x0212 */
637 .regs
= stmpe1601_regs
,
638 .blocks
= stmpe1601_blocks
,
639 .num_blocks
= ARRAY_SIZE(stmpe1601_blocks
),
640 .num_irqs
= STMPE1601_NR_INTERNAL_IRQS
,
641 .enable
= stmpe1601_enable
,
642 .get_altfunc
= stmpe1601_get_altfunc
,
643 .enable_autosleep
= stmpe1601_autosleep
,
649 static const u8 stmpe1801_regs
[] = {
650 [STMPE_IDX_CHIP_ID
] = STMPE1801_REG_CHIP_ID
,
651 [STMPE_IDX_ICR_LSB
] = STMPE1801_REG_INT_CTRL_LOW
,
652 [STMPE_IDX_IER_LSB
] = STMPE1801_REG_INT_EN_MASK_LOW
,
653 [STMPE_IDX_ISR_LSB
] = STMPE1801_REG_INT_STA_LOW
,
654 [STMPE_IDX_GPMR_LSB
] = STMPE1801_REG_GPIO_MP_LOW
,
655 [STMPE_IDX_GPSR_LSB
] = STMPE1801_REG_GPIO_SET_LOW
,
656 [STMPE_IDX_GPCR_LSB
] = STMPE1801_REG_GPIO_CLR_LOW
,
657 [STMPE_IDX_GPDR_LSB
] = STMPE1801_REG_GPIO_SET_DIR_LOW
,
658 [STMPE_IDX_GPRER_LSB
] = STMPE1801_REG_GPIO_RE_LOW
,
659 [STMPE_IDX_GPFER_LSB
] = STMPE1801_REG_GPIO_FE_LOW
,
660 [STMPE_IDX_IEGPIOR_LSB
] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW
,
661 [STMPE_IDX_ISGPIOR_LSB
] = STMPE1801_REG_INT_STA_GPIO_LOW
,
664 static struct stmpe_variant_block stmpe1801_blocks
[] = {
666 .cell
= &stmpe_gpio_cell
,
667 .irq
= STMPE1801_IRQ_GPIOC
,
668 .block
= STMPE_BLOCK_GPIO
,
671 .cell
= &stmpe_keypad_cell
,
672 .irq
= STMPE1801_IRQ_KEYPAD
,
673 .block
= STMPE_BLOCK_KEYPAD
,
677 static int stmpe1801_enable(struct stmpe
*stmpe
, unsigned int blocks
,
680 unsigned int mask
= 0;
681 if (blocks
& STMPE_BLOCK_GPIO
)
682 mask
|= STMPE1801_MSK_INT_EN_GPIO
;
684 if (blocks
& STMPE_BLOCK_KEYPAD
)
685 mask
|= STMPE1801_MSK_INT_EN_KPC
;
687 return __stmpe_set_bits(stmpe
, STMPE1801_REG_INT_EN_MASK_LOW
, mask
,
691 static int stmpe1801_reset(struct stmpe
*stmpe
)
693 unsigned long timeout
;
696 ret
= __stmpe_set_bits(stmpe
, STMPE1801_REG_SYS_CTRL
,
697 STMPE1801_MSK_SYS_CTRL_RESET
, STMPE1801_MSK_SYS_CTRL_RESET
);
701 timeout
= jiffies
+ msecs_to_jiffies(100);
702 while (time_before(jiffies
, timeout
)) {
703 ret
= __stmpe_reg_read(stmpe
, STMPE1801_REG_SYS_CTRL
);
706 if (!(ret
& STMPE1801_MSK_SYS_CTRL_RESET
))
708 usleep_range(100, 200);
713 static struct stmpe_variant_info stmpe1801
= {
715 .id_val
= STMPE1801_ID
,
719 .regs
= stmpe1801_regs
,
720 .blocks
= stmpe1801_blocks
,
721 .num_blocks
= ARRAY_SIZE(stmpe1801_blocks
),
722 .num_irqs
= STMPE1801_NR_INTERNAL_IRQS
,
723 .enable
= stmpe1801_enable
,
724 /* stmpe1801 do not have any gpio alternate function */
732 static const u8 stmpe24xx_regs
[] = {
733 [STMPE_IDX_CHIP_ID
] = STMPE24XX_REG_CHIP_ID
,
734 [STMPE_IDX_ICR_LSB
] = STMPE24XX_REG_ICR_LSB
,
735 [STMPE_IDX_IER_LSB
] = STMPE24XX_REG_IER_LSB
,
736 [STMPE_IDX_ISR_MSB
] = STMPE24XX_REG_ISR_MSB
,
737 [STMPE_IDX_GPMR_LSB
] = STMPE24XX_REG_GPMR_LSB
,
738 [STMPE_IDX_GPSR_LSB
] = STMPE24XX_REG_GPSR_LSB
,
739 [STMPE_IDX_GPCR_LSB
] = STMPE24XX_REG_GPCR_LSB
,
740 [STMPE_IDX_GPDR_LSB
] = STMPE24XX_REG_GPDR_LSB
,
741 [STMPE_IDX_GPRER_LSB
] = STMPE24XX_REG_GPRER_LSB
,
742 [STMPE_IDX_GPFER_LSB
] = STMPE24XX_REG_GPFER_LSB
,
743 [STMPE_IDX_GPAFR_U_MSB
] = STMPE24XX_REG_GPAFR_U_MSB
,
744 [STMPE_IDX_IEGPIOR_LSB
] = STMPE24XX_REG_IEGPIOR_LSB
,
745 [STMPE_IDX_ISGPIOR_MSB
] = STMPE24XX_REG_ISGPIOR_MSB
,
746 [STMPE_IDX_GPEDR_MSB
] = STMPE24XX_REG_GPEDR_MSB
,
749 static struct stmpe_variant_block stmpe24xx_blocks
[] = {
751 .cell
= &stmpe_gpio_cell
,
752 .irq
= STMPE24XX_IRQ_GPIOC
,
753 .block
= STMPE_BLOCK_GPIO
,
756 .cell
= &stmpe_keypad_cell
,
757 .irq
= STMPE24XX_IRQ_KEYPAD
,
758 .block
= STMPE_BLOCK_KEYPAD
,
762 static int stmpe24xx_enable(struct stmpe
*stmpe
, unsigned int blocks
,
765 unsigned int mask
= 0;
767 if (blocks
& STMPE_BLOCK_GPIO
)
768 mask
|= STMPE24XX_SYS_CTRL_ENABLE_GPIO
;
770 if (blocks
& STMPE_BLOCK_KEYPAD
)
771 mask
|= STMPE24XX_SYS_CTRL_ENABLE_KPC
;
773 return __stmpe_set_bits(stmpe
, STMPE24XX_REG_SYS_CTRL
, mask
,
777 static int stmpe24xx_get_altfunc(struct stmpe
*stmpe
, enum stmpe_block block
)
780 case STMPE_BLOCK_ROTATOR
:
783 case STMPE_BLOCK_KEYPAD
:
786 case STMPE_BLOCK_GPIO
:
792 static struct stmpe_variant_info stmpe2401
= {
798 .regs
= stmpe24xx_regs
,
799 .blocks
= stmpe24xx_blocks
,
800 .num_blocks
= ARRAY_SIZE(stmpe24xx_blocks
),
801 .num_irqs
= STMPE24XX_NR_INTERNAL_IRQS
,
802 .enable
= stmpe24xx_enable
,
803 .get_altfunc
= stmpe24xx_get_altfunc
,
806 static struct stmpe_variant_info stmpe2403
= {
812 .regs
= stmpe24xx_regs
,
813 .blocks
= stmpe24xx_blocks
,
814 .num_blocks
= ARRAY_SIZE(stmpe24xx_blocks
),
815 .num_irqs
= STMPE24XX_NR_INTERNAL_IRQS
,
816 .enable
= stmpe24xx_enable
,
817 .get_altfunc
= stmpe24xx_get_altfunc
,
818 .enable_autosleep
= stmpe1601_autosleep
, /* same as stmpe1601 */
821 static struct stmpe_variant_info
*stmpe_variant_info
[STMPE_NBR_PARTS
] = {
822 [STMPE610
] = &stmpe610
,
823 [STMPE801
] = &stmpe801
,
824 [STMPE811
] = &stmpe811
,
825 [STMPE1601
] = &stmpe1601
,
826 [STMPE1801
] = &stmpe1801
,
827 [STMPE2401
] = &stmpe2401
,
828 [STMPE2403
] = &stmpe2403
,
832 * These devices can be connected in a 'no-irq' configuration - the irq pin
833 * is not used and the device cannot interrupt the CPU. Here we only list
834 * devices which support this configuration - the driver will fail probing
835 * for any devices not listed here which are configured in this way.
837 static struct stmpe_variant_info
*stmpe_noirq_variant_info
[STMPE_NBR_PARTS
] = {
838 [STMPE801
] = &stmpe801_noirq
,
841 static irqreturn_t
stmpe_irq(int irq
, void *data
)
843 struct stmpe
*stmpe
= data
;
844 struct stmpe_variant_info
*variant
= stmpe
->variant
;
845 int num
= DIV_ROUND_UP(variant
->num_irqs
, 8);
851 if (variant
->id_val
== STMPE801_ID
) {
852 int base
= irq_create_mapping(stmpe
->domain
, 0);
854 handle_nested_irq(base
);
858 if (variant
->id_val
== STMPE1801_ID
)
859 israddr
= stmpe
->regs
[STMPE_IDX_ISR_LSB
];
861 israddr
= stmpe
->regs
[STMPE_IDX_ISR_MSB
];
863 ret
= stmpe_block_read(stmpe
, israddr
, num
, isr
);
867 for (i
= 0; i
< num
; i
++) {
868 int bank
= num
- i
- 1;
872 status
&= stmpe
->ier
[bank
];
878 int bit
= __ffs(status
);
879 int line
= bank
* 8 + bit
;
880 int nestedirq
= irq_create_mapping(stmpe
->domain
, line
);
882 handle_nested_irq(nestedirq
);
883 status
&= ~(1 << bit
);
886 stmpe_reg_write(stmpe
, israddr
+ i
, clear
);
892 static void stmpe_irq_lock(struct irq_data
*data
)
894 struct stmpe
*stmpe
= irq_data_get_irq_chip_data(data
);
896 mutex_lock(&stmpe
->irq_lock
);
899 static void stmpe_irq_sync_unlock(struct irq_data
*data
)
901 struct stmpe
*stmpe
= irq_data_get_irq_chip_data(data
);
902 struct stmpe_variant_info
*variant
= stmpe
->variant
;
903 int num
= DIV_ROUND_UP(variant
->num_irqs
, 8);
906 for (i
= 0; i
< num
; i
++) {
907 u8
new = stmpe
->ier
[i
];
908 u8 old
= stmpe
->oldier
[i
];
913 stmpe
->oldier
[i
] = new;
914 stmpe_reg_write(stmpe
, stmpe
->regs
[STMPE_IDX_IER_LSB
] - i
, new);
917 mutex_unlock(&stmpe
->irq_lock
);
920 static void stmpe_irq_mask(struct irq_data
*data
)
922 struct stmpe
*stmpe
= irq_data_get_irq_chip_data(data
);
923 int offset
= data
->hwirq
;
924 int regoffset
= offset
/ 8;
925 int mask
= 1 << (offset
% 8);
927 stmpe
->ier
[regoffset
] &= ~mask
;
930 static void stmpe_irq_unmask(struct irq_data
*data
)
932 struct stmpe
*stmpe
= irq_data_get_irq_chip_data(data
);
933 int offset
= data
->hwirq
;
934 int regoffset
= offset
/ 8;
935 int mask
= 1 << (offset
% 8);
937 stmpe
->ier
[regoffset
] |= mask
;
940 static struct irq_chip stmpe_irq_chip
= {
942 .irq_bus_lock
= stmpe_irq_lock
,
943 .irq_bus_sync_unlock
= stmpe_irq_sync_unlock
,
944 .irq_mask
= stmpe_irq_mask
,
945 .irq_unmask
= stmpe_irq_unmask
,
948 static int stmpe_irq_map(struct irq_domain
*d
, unsigned int virq
,
949 irq_hw_number_t hwirq
)
951 struct stmpe
*stmpe
= d
->host_data
;
952 struct irq_chip
*chip
= NULL
;
954 if (stmpe
->variant
->id_val
!= STMPE801_ID
)
955 chip
= &stmpe_irq_chip
;
957 irq_set_chip_data(virq
, stmpe
);
958 irq_set_chip_and_handler(virq
, chip
, handle_edge_irq
);
959 irq_set_nested_thread(virq
, 1);
961 set_irq_flags(virq
, IRQF_VALID
);
963 irq_set_noprobe(virq
);
969 static void stmpe_irq_unmap(struct irq_domain
*d
, unsigned int virq
)
972 set_irq_flags(virq
, 0);
974 irq_set_chip_and_handler(virq
, NULL
, NULL
);
975 irq_set_chip_data(virq
, NULL
);
978 static struct irq_domain_ops stmpe_irq_ops
= {
979 .map
= stmpe_irq_map
,
980 .unmap
= stmpe_irq_unmap
,
981 .xlate
= irq_domain_xlate_twocell
,
984 static int stmpe_irq_init(struct stmpe
*stmpe
, struct device_node
*np
)
987 int num_irqs
= stmpe
->variant
->num_irqs
;
990 base
= stmpe
->irq_base
;
992 stmpe
->domain
= irq_domain_add_simple(np
, num_irqs
, base
,
993 &stmpe_irq_ops
, stmpe
);
994 if (!stmpe
->domain
) {
995 dev_err(stmpe
->dev
, "Failed to create irqdomain\n");
1002 static int stmpe_chip_init(struct stmpe
*stmpe
)
1004 unsigned int irq_trigger
= stmpe
->pdata
->irq_trigger
;
1005 int autosleep_timeout
= stmpe
->pdata
->autosleep_timeout
;
1006 struct stmpe_variant_info
*variant
= stmpe
->variant
;
1012 ret
= stmpe_block_read(stmpe
, stmpe
->regs
[STMPE_IDX_CHIP_ID
],
1013 ARRAY_SIZE(data
), data
);
1017 id
= (data
[0] << 8) | data
[1];
1018 if ((id
& variant
->id_mask
) != variant
->id_val
) {
1019 dev_err(stmpe
->dev
, "unknown chip id: %#x\n", id
);
1023 dev_info(stmpe
->dev
, "%s detected, chip id: %#x\n", variant
->name
, id
);
1025 /* Disable all modules -- subdrivers should enable what they need. */
1026 ret
= stmpe_disable(stmpe
, ~0);
1030 if (id
== STMPE1801_ID
) {
1031 ret
= stmpe1801_reset(stmpe
);
1036 if (stmpe
->irq
>= 0) {
1037 if (id
== STMPE801_ID
)
1038 icr
= STMPE801_REG_SYS_CTRL_INT_EN
;
1040 icr
= STMPE_ICR_LSB_GIM
;
1042 /* STMPE801 doesn't support Edge interrupts */
1043 if (id
!= STMPE801_ID
) {
1044 if (irq_trigger
== IRQF_TRIGGER_FALLING
||
1045 irq_trigger
== IRQF_TRIGGER_RISING
)
1046 icr
|= STMPE_ICR_LSB_EDGE
;
1049 if (irq_trigger
== IRQF_TRIGGER_RISING
||
1050 irq_trigger
== IRQF_TRIGGER_HIGH
) {
1051 if (id
== STMPE801_ID
)
1052 icr
|= STMPE801_REG_SYS_CTRL_INT_HI
;
1054 icr
|= STMPE_ICR_LSB_HIGH
;
1058 if (stmpe
->pdata
->autosleep
) {
1059 ret
= stmpe_autosleep(stmpe
, autosleep_timeout
);
1064 return stmpe_reg_write(stmpe
, stmpe
->regs
[STMPE_IDX_ICR_LSB
], icr
);
1067 static int stmpe_add_device(struct stmpe
*stmpe
, struct mfd_cell
*cell
)
1069 return mfd_add_devices(stmpe
->dev
, stmpe
->pdata
->id
, cell
, 1,
1070 NULL
, stmpe
->irq_base
, stmpe
->domain
);
1073 static int stmpe_devices_init(struct stmpe
*stmpe
)
1075 struct stmpe_variant_info
*variant
= stmpe
->variant
;
1076 unsigned int platform_blocks
= stmpe
->pdata
->blocks
;
1080 for (i
= 0; i
< variant
->num_blocks
; i
++) {
1081 struct stmpe_variant_block
*block
= &variant
->blocks
[i
];
1083 if (!(platform_blocks
& block
->block
))
1086 for (j
= 0; j
< block
->cell
->num_resources
; j
++) {
1087 struct resource
*res
=
1088 (struct resource
*) &block
->cell
->resources
[j
];
1090 /* Dynamically fill in a variant's IRQ. */
1091 if (res
->flags
& IORESOURCE_IRQ
)
1092 res
->start
= res
->end
= block
->irq
+ j
;
1095 platform_blocks
&= ~block
->block
;
1096 ret
= stmpe_add_device(stmpe
, block
->cell
);
1101 if (platform_blocks
)
1102 dev_warn(stmpe
->dev
,
1103 "platform wants blocks (%#x) not present on variant",
1109 static void stmpe_of_probe(struct stmpe_platform_data
*pdata
,
1110 struct device_node
*np
)
1112 struct device_node
*child
;
1114 pdata
->id
= of_alias_get_id(np
, "stmpe-i2c");
1118 pdata
->irq_trigger
= IRQF_TRIGGER_NONE
;
1120 of_property_read_u32(np
, "st,autosleep-timeout",
1121 &pdata
->autosleep_timeout
);
1123 pdata
->autosleep
= (pdata
->autosleep_timeout
) ? true : false;
1125 for_each_child_of_node(np
, child
) {
1126 if (!strcmp(child
->name
, "stmpe_gpio")) {
1127 pdata
->blocks
|= STMPE_BLOCK_GPIO
;
1128 } else if (!strcmp(child
->name
, "stmpe_keypad")) {
1129 pdata
->blocks
|= STMPE_BLOCK_KEYPAD
;
1130 } else if (!strcmp(child
->name
, "stmpe_touchscreen")) {
1131 pdata
->blocks
|= STMPE_BLOCK_TOUCHSCREEN
;
1132 } else if (!strcmp(child
->name
, "stmpe_adc")) {
1133 pdata
->blocks
|= STMPE_BLOCK_ADC
;
1134 } else if (!strcmp(child
->name
, "stmpe_pwm")) {
1135 pdata
->blocks
|= STMPE_BLOCK_PWM
;
1136 } else if (!strcmp(child
->name
, "stmpe_rotator")) {
1137 pdata
->blocks
|= STMPE_BLOCK_ROTATOR
;
1142 /* Called from client specific probe routines */
1143 int stmpe_probe(struct stmpe_client_info
*ci
, int partnum
)
1145 struct stmpe_platform_data
*pdata
= dev_get_platdata(ci
->dev
);
1146 struct device_node
*np
= ci
->dev
->of_node
;
1147 struct stmpe
*stmpe
;
1154 pdata
= devm_kzalloc(ci
->dev
, sizeof(*pdata
), GFP_KERNEL
);
1158 stmpe_of_probe(pdata
, np
);
1160 if (of_find_property(np
, "interrupts", NULL
) == NULL
)
1164 stmpe
= devm_kzalloc(ci
->dev
, sizeof(struct stmpe
), GFP_KERNEL
);
1168 mutex_init(&stmpe
->irq_lock
);
1169 mutex_init(&stmpe
->lock
);
1171 stmpe
->dev
= ci
->dev
;
1172 stmpe
->client
= ci
->client
;
1173 stmpe
->pdata
= pdata
;
1174 stmpe
->irq_base
= pdata
->irq_base
;
1176 stmpe
->partnum
= partnum
;
1177 stmpe
->variant
= stmpe_variant_info
[partnum
];
1178 stmpe
->regs
= stmpe
->variant
->regs
;
1179 stmpe
->num_gpios
= stmpe
->variant
->num_gpios
;
1180 dev_set_drvdata(stmpe
->dev
, stmpe
);
1185 if (pdata
->irq_over_gpio
) {
1186 ret
= devm_gpio_request_one(ci
->dev
, pdata
->irq_gpio
,
1187 GPIOF_DIR_IN
, "stmpe");
1189 dev_err(stmpe
->dev
, "failed to request IRQ GPIO: %d\n",
1194 stmpe
->irq
= gpio_to_irq(pdata
->irq_gpio
);
1196 stmpe
->irq
= ci
->irq
;
1199 if (stmpe
->irq
< 0) {
1200 /* use alternate variant info for no-irq mode, if supported */
1201 dev_info(stmpe
->dev
,
1202 "%s configured in no-irq mode by platform data\n",
1203 stmpe
->variant
->name
);
1204 if (!stmpe_noirq_variant_info
[stmpe
->partnum
]) {
1206 "%s does not support no-irq mode!\n",
1207 stmpe
->variant
->name
);
1210 stmpe
->variant
= stmpe_noirq_variant_info
[stmpe
->partnum
];
1211 } else if (pdata
->irq_trigger
== IRQF_TRIGGER_NONE
) {
1212 pdata
->irq_trigger
= irq_get_trigger_type(stmpe
->irq
);
1215 ret
= stmpe_chip_init(stmpe
);
1219 if (stmpe
->irq
>= 0) {
1220 ret
= stmpe_irq_init(stmpe
, np
);
1224 ret
= devm_request_threaded_irq(ci
->dev
, stmpe
->irq
, NULL
,
1225 stmpe_irq
, pdata
->irq_trigger
| IRQF_ONESHOT
,
1228 dev_err(stmpe
->dev
, "failed to request IRQ: %d\n",
1234 ret
= stmpe_devices_init(stmpe
);
1238 dev_err(stmpe
->dev
, "failed to add children\n");
1239 mfd_remove_devices(stmpe
->dev
);
1244 int stmpe_remove(struct stmpe
*stmpe
)
1246 mfd_remove_devices(stmpe
->dev
);
1252 static int stmpe_suspend(struct device
*dev
)
1254 struct stmpe
*stmpe
= dev_get_drvdata(dev
);
1256 if (stmpe
->irq
>= 0 && device_may_wakeup(dev
))
1257 enable_irq_wake(stmpe
->irq
);
1262 static int stmpe_resume(struct device
*dev
)
1264 struct stmpe
*stmpe
= dev_get_drvdata(dev
);
1266 if (stmpe
->irq
>= 0 && device_may_wakeup(dev
))
1267 disable_irq_wake(stmpe
->irq
);
1272 const struct dev_pm_ops stmpe_dev_pm_ops
= {
1273 .suspend
= stmpe_suspend
,
1274 .resume
= stmpe_resume
,