drivers/misc/mei/pci-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16
  17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/module.h>
  20 #include <linux/moduleparam.h>
  21 #include <linux/kernel.h>
  22 #include <linux/device.h>
  23 #include <linux/fs.h>
  24 #include <linux/errno.h>
  25 #include <linux/types.h>
  26 #include <linux/fcntl.h>
  27 #include <linux/aio.h>
  28 #include <linux/pci.h>
  29 #include <linux/poll.h>
  30 #include <linux/init.h>
  31 #include <linux/ioctl.h>
  32 #include <linux/cdev.h>
  33 #include <linux/sched.h>
  34 #include <linux/uuid.h>
  35 #include <linux/compat.h>
  36 #include <linux/jiffies.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/miscdevice.h>
  39
  40 #include <linux/mei.h>
  41
  42 #include "mei_dev.h"
  43 #include "hw-me.h"
  44 #include "client.h"
  45
  46 /* mei_pci_tbl - PCI Device ID Table */
  47 static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
  48         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
  49         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
  50         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
  51         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
  52         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
  53         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
  54         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
  55         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
  56         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
  57         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
  58         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
  59         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
  60         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
  61         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
  62         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
  63         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
  64         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
  65         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
  66         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
  67         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
  68         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
  69         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
  70         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
  71         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
  72         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
  73         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
  74         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
  75         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
  76         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
  77         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
  78         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
  79         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
  80         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
  81         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
  82         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
  83         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
  84
  85         /* required last entry */
  86         {0, }
  87 };
  88
  89 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
  90
  91 /**
  92  * mei_quirk_probe - probe for devices that doesn't valid ME interface
  93  *
  94  * @pdev: PCI device structure
  95  * @ent: entry into pci_device_table
  96  *
  97  * returns true if ME Interface is valid, false otherwise
  98  */
  99 static bool mei_me_quirk_probe(struct pci_dev *pdev,
 100                                 const struct pci_device_id *ent)
 101 {
 102         u32 reg;
 103         /* Cougar Point || Patsburg */
 104         if (ent->device == MEI_DEV_ID_CPT_1 ||
 105             ent->device == MEI_DEV_ID_PBG_1) {
 106                 pci_read_config_dword(pdev, PCI_CFG_HFS_2, &reg);
 107                 /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
 108                 if ((reg & 0x600) == 0x200)
 109                         goto no_mei;
 110         }
 111
 112         /* Lynx Point */
 113         if (ent->device == MEI_DEV_ID_LPT_H  ||
 114             ent->device == MEI_DEV_ID_LPT_W  ||
 115             ent->device == MEI_DEV_ID_LPT_HR) {
 116                 /* Read ME FW Status check for SPS Firmware */
 117                 pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
 118                 /* if bits [19:16] = 15, running SPS Firmware */
 119                 if ((reg & 0xf0000) == 0xf0000)
 120                         goto no_mei;
 121         }
 122
 123         return true;
 124
 125 no_mei:
 126         dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 127         return false;
 128 }
 129 /**
 130  * mei_probe - Device Initialization Routine
 131  *
 132  * @pdev: PCI device structure
 133  * @ent: entry in kcs_pci_tbl
 134  *
 135  * returns 0 on success, <0 on failure.
 136  */
 137 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 138 {
 139         struct mei_device *dev;
 140         struct mei_me_hw *hw;
 141         int err;
 142
 143
 144         if (!mei_me_quirk_probe(pdev, ent)) {
 145                 err = -ENODEV;
 146                 goto end;
 147         }
 148
 149         /* enable pci dev */
 150         err = pci_enable_device(pdev);
 151         if (err) {
 152                 dev_err(&pdev->dev, "failed to enable pci device.\n");
 153                 goto end;
 154         }
 155         /* set PCI host mastering  */
 156         pci_set_master(pdev);
 157         /* pci request regions for mei driver */
 158         err = pci_request_regions(pdev, KBUILD_MODNAME);
 159         if (err) {
 160                 dev_err(&pdev->dev, "failed to get pci regions.\n");
 161                 goto disable_device;
 162         }
 163         /* allocates and initializes the mei dev structure */
 164         dev = mei_me_dev_init(pdev);
 165         if (!dev) {
 166                 err = -ENOMEM;
 167                 goto release_regions;
 168         }
 169         hw = to_me_hw(dev);
 170         /* mapping  IO device memory */
 171         hw->mem_addr = pci_iomap(pdev, 0, 0);
 172         if (!hw->mem_addr) {
 173                 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
 174                 err = -ENOMEM;
 175                 goto free_device;
 176         }
 177         pci_enable_msi(pdev);
 178
 179          /* request and enable interrupt */
 180         if (pci_dev_msi_enabled(pdev))
 181                 err = request_threaded_irq(pdev->irq,
 182                         NULL,
 183                         mei_me_irq_thread_handler,
 184                         IRQF_ONESHOT, KBUILD_MODNAME, dev);
 185         else
 186                 err = request_threaded_irq(pdev->irq,
 187                         mei_me_irq_quick_handler,
 188                         mei_me_irq_thread_handler,
 189                         IRQF_SHARED, KBUILD_MODNAME, dev);
 190
 191         if (err) {
 192                 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 193                        pdev->irq);
 194                 goto disable_msi;
 195         }
 196
 197         if (mei_start(dev)) {
 198                 dev_err(&pdev->dev, "init hw failure.\n");
 199                 err = -ENODEV;
 200                 goto release_irq;
 201         }
 202
 203         err = mei_register(dev);
 204         if (err)
 205                 goto release_irq;
 206
 207         pci_set_drvdata(pdev, dev);
 208
 209         schedule_delayed_work(&dev->timer_work, HZ);
 210
 211         pr_debug("initialization successful.\n");
 212
 213         return 0;
 214
 215 release_irq:
 216         mei_disable_interrupts(dev);
 217         flush_scheduled_work();
 218         free_irq(pdev->irq, dev);
 219 disable_msi:
 220         pci_disable_msi(pdev);
 221         pci_iounmap(pdev, hw->mem_addr);
 222 free_device:
 223         kfree(dev);
 224 release_regions:
 225         pci_release_regions(pdev);
 226 disable_device:
 227         pci_disable_device(pdev);
 228 end:
 229         dev_err(&pdev->dev, "initialization failed.\n");
 230         return err;
 231 }
 232
 233 /**
 234  * mei_remove - Device Removal Routine
 235  *
 236  * @pdev: PCI device structure
 237  *
 238  * mei_remove is called by the PCI subsystem to alert the driver
 239  * that it should release a PCI device.
 240  */
 241 static void mei_me_remove(struct pci_dev *pdev)
 242 {
 243         struct mei_device *dev;
 244         struct mei_me_hw *hw;
 245
 246         dev = pci_get_drvdata(pdev);
 247         if (!dev)
 248                 return;
 249
 250         hw = to_me_hw(dev);
 251
 252
 253         dev_err(&pdev->dev, "stop\n");
 254         mei_stop(dev);
 255
 256         /* disable interrupts */
 257         mei_disable_interrupts(dev);
 258
 259         free_irq(pdev->irq, dev);
 260         pci_disable_msi(pdev);
 261         pci_set_drvdata(pdev, NULL);
 262
 263         if (hw->mem_addr)
 264                 pci_iounmap(pdev, hw->mem_addr);
 265
 266         mei_deregister(dev);
 267
 268         kfree(dev);
 269
 270         pci_release_regions(pdev);
 271         pci_disable_device(pdev);
 272
 273
 274 }
 275 #ifdef CONFIG_PM
 276 static int mei_me_pci_suspend(struct device *device)
 277 {
 278         struct pci_dev *pdev = to_pci_dev(device);
 279         struct mei_device *dev = pci_get_drvdata(pdev);
 280
 281         if (!dev)
 282                 return -ENODEV;
 283
 284         dev_err(&pdev->dev, "suspend\n");
 285
 286         mei_stop(dev);
 287
 288         mei_disable_interrupts(dev);
 289
 290         free_irq(pdev->irq, dev);
 291         pci_disable_msi(pdev);
 292
 293         return 0;
 294 }
 295
 296 static int mei_me_pci_resume(struct device *device)
 297 {
 298         struct pci_dev *pdev = to_pci_dev(device);
 299         struct mei_device *dev;
 300         int err;
 301
 302         dev = pci_get_drvdata(pdev);
 303         if (!dev)
 304                 return -ENODEV;
 305
 306         pci_enable_msi(pdev);
 307
 308         /* request and enable interrupt */
 309         if (pci_dev_msi_enabled(pdev))
 310                 err = request_threaded_irq(pdev->irq,
 311                         NULL,
 312                         mei_me_irq_thread_handler,
 313                         IRQF_ONESHOT, KBUILD_MODNAME, dev);
 314         else
 315                 err = request_threaded_irq(pdev->irq,
 316                         mei_me_irq_quick_handler,
 317                         mei_me_irq_thread_handler,
 318                         IRQF_SHARED, KBUILD_MODNAME, dev);
 319
 320         if (err) {
 321                 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 322                                 pdev->irq);
 323                 return err;
 324         }
 325
 326         mutex_lock(&dev->device_lock);
 327         dev->dev_state = MEI_DEV_POWER_UP;
 328         mei_clear_interrupts(dev);
 329         mei_reset(dev, 1);
 330         mutex_unlock(&dev->device_lock);
 331
 332         /* Start timer if stopped in suspend */
 333         schedule_delayed_work(&dev->timer_work, HZ);
 334
 335         return err;
 336 }
 337 static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
 338 #define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 339 #else
 340 #define MEI_ME_PM_OPS   NULL
 341 #endif /* CONFIG_PM */
 342 /*
 343  *  PCI driver structure
 344  */
 345 static struct pci_driver mei_me_driver = {
 346         .name = KBUILD_MODNAME,
 347         .id_table = mei_me_pci_tbl,
 348         .probe = mei_me_probe,
 349         .remove = mei_me_remove,
 350         .shutdown = mei_me_remove,
 351         .driver.pm = MEI_ME_PM_OPS,
 352 };
 353
 354 module_pci_driver(mei_me_driver);
 355
 356 MODULE_AUTHOR("Intel Corporation");
 357 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 358 MODULE_LICENSE("GPL v2");