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x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / net / ethernet / sfc / efx.c
blobf59a0b6f1ae577d553c85d4aadac6baf4c905529
1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28 #include "selftest.h"
29
30 #include "mcdi.h"
31 #include "workarounds.h"
32
33 /**************************************************************************
34 *
35 * Type name strings
36 *
37 **************************************************************************
38 */
39
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
70 };
71
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 };
87
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 */
92 static struct workqueue_struct *reset_workqueue;
93
94 /**************************************************************************
95 *
96 * Configurable values
97 *
98 *************************************************************************/
99
100 /*
101 * Use separate channels for TX and RX events
102 *
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
105 *
106 * This is only used in MSI-X interrupt mode
107 */
108 static bool separate_tx_channels;
109 module_param(separate_tx_channels, bool, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
112
113 /* This is the weight assigned to each of the (per-channel) virtual
114 * NAPI devices.
115 */
116 static int napi_weight = 64;
117
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor.
120 * On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 * On Siena-based NICs for power systems with EEH support, this will give EEH a
124 * chance to start.
125 */
126 static unsigned int efx_monitor_interval = 1 * HZ;
127
128 /* Initial interrupt moderation settings. They can be modified after
129 * module load with ethtool.
130 *
131 * The default for RX should strike a balance between increasing the
132 * round-trip latency and reducing overhead.
133 */
134 static unsigned int rx_irq_mod_usec = 60;
135
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
138 *
139 * This default is chosen to ensure that a 10G link does not go idle
140 * while a TX queue is stopped after it has become full. A queue is
141 * restarted when it drops below half full. The time this takes (assuming
142 * worst case 3 descriptors per packet and 1024 descriptors) is
143 * 512 / 3 * 1.2 = 205 usec.
144 */
145 static unsigned int tx_irq_mod_usec = 150;
146
147 /* This is the first interrupt mode to try out of:
148 * 0 => MSI-X
149 * 1 => MSI
150 * 2 => legacy
151 */
152 static unsigned int interrupt_mode;
153
154 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
155 * i.e. the number of CPUs among which we may distribute simultaneous
156 * interrupt handling.
157 *
158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
159 * The default (0) means to assign an interrupt to each core.
160 */
161 static unsigned int rss_cpus;
162 module_param(rss_cpus, uint, 0444);
163 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
164
165 static bool phy_flash_cfg;
166 module_param(phy_flash_cfg, bool, 0644);
167 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
168
169 static unsigned irq_adapt_low_thresh = 8000;
170 module_param(irq_adapt_low_thresh, uint, 0644);
171 MODULE_PARM_DESC(irq_adapt_low_thresh,
172 "Threshold score for reducing IRQ moderation");
173
174 static unsigned irq_adapt_high_thresh = 16000;
175 module_param(irq_adapt_high_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_high_thresh,
177 "Threshold score for increasing IRQ moderation");
178
179 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
182 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
183 module_param(debug, uint, 0);
184 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
185
186 /**************************************************************************
187 *
188 * Utility functions and prototypes
189 *
190 *************************************************************************/
191
192 static int efx_soft_enable_interrupts(struct efx_nic *efx);
193 static void efx_soft_disable_interrupts(struct efx_nic *efx);
194 static void efx_remove_channel(struct efx_channel *channel);
195 static void efx_remove_channels(struct efx_nic *efx);
196 static const struct efx_channel_type efx_default_channel_type;
197 static void efx_remove_port(struct efx_nic *efx);
198 static void efx_init_napi_channel(struct efx_channel *channel);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_napi_channel(struct efx_channel *channel);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
204
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
206 do { \
207 if ((efx->state == STATE_READY) || \
208 (efx->state == STATE_RECOVERY) || \
209 (efx->state == STATE_DISABLED)) \
210 ASSERT_RTNL(); \
211 } while (0)
212
213 static int efx_check_disabled(struct efx_nic *efx)
214 {
215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
216 netif_err(efx, drv, efx->net_dev,
217 "device is disabled due to earlier errors\n");
218 return -EIO;
219 }
220 return 0;
221 }
222
223 /**************************************************************************
224 *
225 * Event queue processing
226 *
227 *************************************************************************/
228
229 /* Process channel's event queue
230 *
231 * This function is responsible for processing the event queue of a
232 * single channel. The caller must guarantee that this function will
233 * never be concurrently called more than once on the same channel,
234 * though different channels may be being processed concurrently.
235 */
236 static int efx_process_channel(struct efx_channel *channel, int budget)
237 {
238 int spent;
239
240 if (unlikely(!channel->enabled))
241 return 0;
242
243 spent = efx_nic_process_eventq(channel, budget);
244 if (spent && efx_channel_has_rx_queue(channel)) {
245 struct efx_rx_queue *rx_queue =
246 efx_channel_get_rx_queue(channel);
247
248 efx_rx_flush_packet(channel);
249 efx_fast_push_rx_descriptors(rx_queue);
250 }
251
252 return spent;
253 }
254
255 /* NAPI poll handler
256 *
257 * NAPI guarantees serialisation of polls of the same device, which
258 * provides the guarantee required by efx_process_channel().
259 */
260 static int efx_poll(struct napi_struct *napi, int budget)
261 {
262 struct efx_channel *channel =
263 container_of(napi, struct efx_channel, napi_str);
264 struct efx_nic *efx = channel->efx;
265 int spent;
266
267 netif_vdbg(efx, intr, efx->net_dev,
268 "channel %d NAPI poll executing on CPU %d\n",
269 channel->channel, raw_smp_processor_id());
270
271 spent = efx_process_channel(channel, budget);
272
273 if (spent < budget) {
274 if (efx_channel_has_rx_queue(channel) &&
275 efx->irq_rx_adaptive &&
276 unlikely(++channel->irq_count == 1000)) {
277 if (unlikely(channel->irq_mod_score <
278 irq_adapt_low_thresh)) {
279 if (channel->irq_moderation > 1) {
280 channel->irq_moderation -= 1;
281 efx->type->push_irq_moderation(channel);
282 }
283 } else if (unlikely(channel->irq_mod_score >
284 irq_adapt_high_thresh)) {
285 if (channel->irq_moderation <
286 efx->irq_rx_moderation) {
287 channel->irq_moderation += 1;
288 efx->type->push_irq_moderation(channel);
289 }
290 }
291 channel->irq_count = 0;
292 channel->irq_mod_score = 0;
293 }
294
295 efx_filter_rfs_expire(channel);
296
297 /* There is no race here; although napi_disable() will
298 * only wait for napi_complete(), this isn't a problem
299 * since efx_nic_eventq_read_ack() will have no effect if
300 * interrupts have already been disabled.
301 */
302 napi_complete(napi);
303 efx_nic_eventq_read_ack(channel);
304 }
305
306 return spent;
307 }
308
309 /* Create event queue
310 * Event queue memory allocations are done only once. If the channel
311 * is reset, the memory buffer will be reused; this guards against
312 * errors during channel reset and also simplifies interrupt handling.
313 */
314 static int efx_probe_eventq(struct efx_channel *channel)
315 {
316 struct efx_nic *efx = channel->efx;
317 unsigned long entries;
318
319 netif_dbg(efx, probe, efx->net_dev,
320 "chan %d create event queue\n", channel->channel);
321
322 /* Build an event queue with room for one event per tx and rx buffer,
323 * plus some extra for link state events and MCDI completions. */
324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
327
328 return efx_nic_probe_eventq(channel);
329 }
330
331 /* Prepare channel's event queue */
332 static int efx_init_eventq(struct efx_channel *channel)
333 {
334 struct efx_nic *efx = channel->efx;
335 int rc;
336
337 EFX_WARN_ON_PARANOID(channel->eventq_init);
338
339 netif_dbg(efx, drv, efx->net_dev,
340 "chan %d init event queue\n", channel->channel);
341
342 rc = efx_nic_init_eventq(channel);
343 if (rc == 0) {
344 efx->type->push_irq_moderation(channel);
345 channel->eventq_read_ptr = 0;
346 channel->eventq_init = true;
347 }
348 return rc;
349 }
350
351 /* Enable event queue processing and NAPI */
352 static void efx_start_eventq(struct efx_channel *channel)
353 {
354 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
355 "chan %d start event queue\n", channel->channel);
356
357 /* Make sure the NAPI handler sees the enabled flag set */
358 channel->enabled = true;
359 smp_wmb();
360
361 napi_enable(&channel->napi_str);
362 efx_nic_eventq_read_ack(channel);
363 }
364
365 /* Disable event queue processing and NAPI */
366 static void efx_stop_eventq(struct efx_channel *channel)
367 {
368 if (!channel->enabled)
369 return;
370
371 napi_disable(&channel->napi_str);
372 channel->enabled = false;
373 }
374
375 static void efx_fini_eventq(struct efx_channel *channel)
376 {
377 if (!channel->eventq_init)
378 return;
379
380 netif_dbg(channel->efx, drv, channel->efx->net_dev,
381 "chan %d fini event queue\n", channel->channel);
382
383 efx_nic_fini_eventq(channel);
384 channel->eventq_init = false;
385 }
386
387 static void efx_remove_eventq(struct efx_channel *channel)
388 {
389 netif_dbg(channel->efx, drv, channel->efx->net_dev,
390 "chan %d remove event queue\n", channel->channel);
391
392 efx_nic_remove_eventq(channel);
393 }
394
395 /**************************************************************************
396 *
397 * Channel handling
398 *
399 *************************************************************************/
400
401 /* Allocate and initialise a channel structure. */
402 static struct efx_channel *
403 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
404 {
405 struct efx_channel *channel;
406 struct efx_rx_queue *rx_queue;
407 struct efx_tx_queue *tx_queue;
408 int j;
409
410 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
411 if (!channel)
412 return NULL;
413
414 channel->efx = efx;
415 channel->channel = i;
416 channel->type = &efx_default_channel_type;
417
418 for (j = 0; j < EFX_TXQ_TYPES; j++) {
419 tx_queue = &channel->tx_queue[j];
420 tx_queue->efx = efx;
421 tx_queue->queue = i * EFX_TXQ_TYPES + j;
422 tx_queue->channel = channel;
423 }
424
425 rx_queue = &channel->rx_queue;
426 rx_queue->efx = efx;
427 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
428 (unsigned long)rx_queue);
429
430 return channel;
431 }
432
433 /* Allocate and initialise a channel structure, copying parameters
434 * (but not resources) from an old channel structure.
435 */
436 static struct efx_channel *
437 efx_copy_channel(const struct efx_channel *old_channel)
438 {
439 struct efx_channel *channel;
440 struct efx_rx_queue *rx_queue;
441 struct efx_tx_queue *tx_queue;
442 int j;
443
444 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
445 if (!channel)
446 return NULL;
447
448 *channel = *old_channel;
449
450 channel->napi_dev = NULL;
451 memset(&channel->eventq, 0, sizeof(channel->eventq));
452
453 for (j = 0; j < EFX_TXQ_TYPES; j++) {
454 tx_queue = &channel->tx_queue[j];
455 if (tx_queue->channel)
456 tx_queue->channel = channel;
457 tx_queue->buffer = NULL;
458 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
459 }
460
461 rx_queue = &channel->rx_queue;
462 rx_queue->buffer = NULL;
463 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
465 (unsigned long)rx_queue);
466
467 return channel;
468 }
469
470 static int efx_probe_channel(struct efx_channel *channel)
471 {
472 struct efx_tx_queue *tx_queue;
473 struct efx_rx_queue *rx_queue;
474 int rc;
475
476 netif_dbg(channel->efx, probe, channel->efx->net_dev,
477 "creating channel %d\n", channel->channel);
478
479 rc = channel->type->pre_probe(channel);
480 if (rc)
481 goto fail;
482
483 rc = efx_probe_eventq(channel);
484 if (rc)
485 goto fail;
486
487 efx_for_each_channel_tx_queue(tx_queue, channel) {
488 rc = efx_probe_tx_queue(tx_queue);
489 if (rc)
490 goto fail;
491 }
492
493 efx_for_each_channel_rx_queue(rx_queue, channel) {
494 rc = efx_probe_rx_queue(rx_queue);
495 if (rc)
496 goto fail;
497 }
498
499 channel->n_rx_frm_trunc = 0;
500
501 return 0;
502
503 fail:
504 efx_remove_channel(channel);
505 return rc;
506 }
507
508 static void
509 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
510 {
511 struct efx_nic *efx = channel->efx;
512 const char *type;
513 int number;
514
515 number = channel->channel;
516 if (efx->tx_channel_offset == 0) {
517 type = "";
518 } else if (channel->channel < efx->tx_channel_offset) {
519 type = "-rx";
520 } else {
521 type = "-tx";
522 number -= efx->tx_channel_offset;
523 }
524 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
525 }
526
527 static void efx_set_channel_names(struct efx_nic *efx)
528 {
529 struct efx_channel *channel;
530
531 efx_for_each_channel(channel, efx)
532 channel->type->get_name(channel,
533 efx->msi_context[channel->channel].name,
534 sizeof(efx->msi_context[0].name));
535 }
536
537 static int efx_probe_channels(struct efx_nic *efx)
538 {
539 struct efx_channel *channel;
540 int rc;
541
542 /* Restart special buffer allocation */
543 efx->next_buffer_table = 0;
544
545 /* Probe channels in reverse, so that any 'extra' channels
546 * use the start of the buffer table. This allows the traffic
547 * channels to be resized without moving them or wasting the
548 * entries before them.
549 */
550 efx_for_each_channel_rev(channel, efx) {
551 rc = efx_probe_channel(channel);
552 if (rc) {
553 netif_err(efx, probe, efx->net_dev,
554 "failed to create channel %d\n",
555 channel->channel);
556 goto fail;
557 }
558 }
559 efx_set_channel_names(efx);
560
561 return 0;
562
563 fail:
564 efx_remove_channels(efx);
565 return rc;
566 }
567
568 /* Channels are shutdown and reinitialised whilst the NIC is running
569 * to propagate configuration changes (mtu, checksum offload), or
570 * to clear hardware error conditions
571 */
572 static void efx_start_datapath(struct efx_nic *efx)
573 {
574 bool old_rx_scatter = efx->rx_scatter;
575 struct efx_tx_queue *tx_queue;
576 struct efx_rx_queue *rx_queue;
577 struct efx_channel *channel;
578 size_t rx_buf_len;
579
580 /* Calculate the rx buffer allocation parameters required to
581 * support the current MTU, including padding for header
582 * alignment and overruns.
583 */
584 efx->rx_dma_len = (efx->rx_prefix_size +
585 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
586 efx->type->rx_buffer_padding);
587 rx_buf_len = (sizeof(struct efx_rx_page_state) +
588 efx->rx_ip_align + efx->rx_dma_len);
589 if (rx_buf_len <= PAGE_SIZE) {
590 efx->rx_scatter = efx->type->always_rx_scatter;
591 efx->rx_buffer_order = 0;
592 } else if (efx->type->can_rx_scatter) {
593 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
594 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
595 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
596 EFX_RX_BUF_ALIGNMENT) >
597 PAGE_SIZE);
598 efx->rx_scatter = true;
599 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
600 efx->rx_buffer_order = 0;
601 } else {
602 efx->rx_scatter = false;
603 efx->rx_buffer_order = get_order(rx_buf_len);
604 }
605
606 efx_rx_config_page_split(efx);
607 if (efx->rx_buffer_order)
608 netif_dbg(efx, drv, efx->net_dev,
609 "RX buf len=%u; page order=%u batch=%u\n",
610 efx->rx_dma_len, efx->rx_buffer_order,
611 efx->rx_pages_per_batch);
612 else
613 netif_dbg(efx, drv, efx->net_dev,
614 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
615 efx->rx_dma_len, efx->rx_page_buf_step,
616 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
617
618 /* RX filters may also have scatter-enabled flags */
619 if (efx->rx_scatter != old_rx_scatter)
620 efx->type->filter_update_rx_scatter(efx);
621
622 /* We must keep at least one descriptor in a TX ring empty.
623 * We could avoid this when the queue size does not exactly
624 * match the hardware ring size, but it's not that important.
625 * Therefore we stop the queue when one more skb might fill
626 * the ring completely. We wake it when half way back to
627 * empty.
628 */
629 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
630 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
631
632 /* Initialise the channels */
633 efx_for_each_channel(channel, efx) {
634 efx_for_each_channel_tx_queue(tx_queue, channel) {
635 efx_init_tx_queue(tx_queue);
636 atomic_inc(&efx->active_queues);
637 }
638
639 efx_for_each_channel_rx_queue(rx_queue, channel) {
640 efx_init_rx_queue(rx_queue);
641 atomic_inc(&efx->active_queues);
642 efx_nic_generate_fill_event(rx_queue);
643 }
644
645 WARN_ON(channel->rx_pkt_n_frags);
646 }
647
648 efx_ptp_start_datapath(efx);
649
650 if (netif_device_present(efx->net_dev))
651 netif_tx_wake_all_queues(efx->net_dev);
652 }
653
654 static void efx_stop_datapath(struct efx_nic *efx)
655 {
656 struct efx_channel *channel;
657 struct efx_tx_queue *tx_queue;
658 struct efx_rx_queue *rx_queue;
659 int rc;
660
661 EFX_ASSERT_RESET_SERIALISED(efx);
662 BUG_ON(efx->port_enabled);
663
664 efx_ptp_stop_datapath(efx);
665
666 /* Stop RX refill */
667 efx_for_each_channel(channel, efx) {
668 efx_for_each_channel_rx_queue(rx_queue, channel)
669 rx_queue->refill_enabled = false;
670 }
671
672 efx_for_each_channel(channel, efx) {
673 /* RX packet processing is pipelined, so wait for the
674 * NAPI handler to complete. At least event queue 0
675 * might be kept active by non-data events, so don't
676 * use napi_synchronize() but actually disable NAPI
677 * temporarily.
678 */
679 if (efx_channel_has_rx_queue(channel)) {
680 efx_stop_eventq(channel);
681 efx_start_eventq(channel);
682 }
683 }
684
685 rc = efx->type->fini_dmaq(efx);
686 if (rc && EFX_WORKAROUND_7803(efx)) {
687 /* Schedule a reset to recover from the flush failure. The
688 * descriptor caches reference memory we're about to free,
689 * but falcon_reconfigure_mac_wrapper() won't reconnect
690 * the MACs because of the pending reset.
691 */
692 netif_err(efx, drv, efx->net_dev,
693 "Resetting to recover from flush failure\n");
694 efx_schedule_reset(efx, RESET_TYPE_ALL);
695 } else if (rc) {
696 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
697 } else {
698 netif_dbg(efx, drv, efx->net_dev,
699 "successfully flushed all queues\n");
700 }
701
702 efx_for_each_channel(channel, efx) {
703 efx_for_each_channel_rx_queue(rx_queue, channel)
704 efx_fini_rx_queue(rx_queue);
705 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
706 efx_fini_tx_queue(tx_queue);
707 }
708 }
709
710 static void efx_remove_channel(struct efx_channel *channel)
711 {
712 struct efx_tx_queue *tx_queue;
713 struct efx_rx_queue *rx_queue;
714
715 netif_dbg(channel->efx, drv, channel->efx->net_dev,
716 "destroy chan %d\n", channel->channel);
717
718 efx_for_each_channel_rx_queue(rx_queue, channel)
719 efx_remove_rx_queue(rx_queue);
720 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
721 efx_remove_tx_queue(tx_queue);
722 efx_remove_eventq(channel);
723 channel->type->post_remove(channel);
724 }
725
726 static void efx_remove_channels(struct efx_nic *efx)
727 {
728 struct efx_channel *channel;
729
730 efx_for_each_channel(channel, efx)
731 efx_remove_channel(channel);
732 }
733
734 int
735 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
736 {
737 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
738 u32 old_rxq_entries, old_txq_entries;
739 unsigned i, next_buffer_table = 0;
740 int rc, rc2;
741
742 rc = efx_check_disabled(efx);
743 if (rc)
744 return rc;
745
746 /* Not all channels should be reallocated. We must avoid
747 * reallocating their buffer table entries.
748 */
749 efx_for_each_channel(channel, efx) {
750 struct efx_rx_queue *rx_queue;
751 struct efx_tx_queue *tx_queue;
752
753 if (channel->type->copy)
754 continue;
755 next_buffer_table = max(next_buffer_table,
756 channel->eventq.index +
757 channel->eventq.entries);
758 efx_for_each_channel_rx_queue(rx_queue, channel)
759 next_buffer_table = max(next_buffer_table,
760 rx_queue->rxd.index +
761 rx_queue->rxd.entries);
762 efx_for_each_channel_tx_queue(tx_queue, channel)
763 next_buffer_table = max(next_buffer_table,
764 tx_queue->txd.index +
765 tx_queue->txd.entries);
766 }
767
768 efx_device_detach_sync(efx);
769 efx_stop_all(efx);
770 efx_soft_disable_interrupts(efx);
771
772 /* Clone channels (where possible) */
773 memset(other_channel, 0, sizeof(other_channel));
774 for (i = 0; i < efx->n_channels; i++) {
775 channel = efx->channel[i];
776 if (channel->type->copy)
777 channel = channel->type->copy(channel);
778 if (!channel) {
779 rc = -ENOMEM;
780 goto out;
781 }
782 other_channel[i] = channel;
783 }
784
785 /* Swap entry counts and channel pointers */
786 old_rxq_entries = efx->rxq_entries;
787 old_txq_entries = efx->txq_entries;
788 efx->rxq_entries = rxq_entries;
789 efx->txq_entries = txq_entries;
790 for (i = 0; i < efx->n_channels; i++) {
791 channel = efx->channel[i];
792 efx->channel[i] = other_channel[i];
793 other_channel[i] = channel;
794 }
795
796 /* Restart buffer table allocation */
797 efx->next_buffer_table = next_buffer_table;
798
799 for (i = 0; i < efx->n_channels; i++) {
800 channel = efx->channel[i];
801 if (!channel->type->copy)
802 continue;
803 rc = efx_probe_channel(channel);
804 if (rc)
805 goto rollback;
806 efx_init_napi_channel(efx->channel[i]);
807 }
808
809 out:
810 /* Destroy unused channel structures */
811 for (i = 0; i < efx->n_channels; i++) {
812 channel = other_channel[i];
813 if (channel && channel->type->copy) {
814 efx_fini_napi_channel(channel);
815 efx_remove_channel(channel);
816 kfree(channel);
817 }
818 }
819
820 rc2 = efx_soft_enable_interrupts(efx);
821 if (rc2) {
822 rc = rc ? rc : rc2;
823 netif_err(efx, drv, efx->net_dev,
824 "unable to restart interrupts on channel reallocation\n");
825 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
826 } else {
827 efx_start_all(efx);
828 netif_device_attach(efx->net_dev);
829 }
830 return rc;
831
832 rollback:
833 /* Swap back */
834 efx->rxq_entries = old_rxq_entries;
835 efx->txq_entries = old_txq_entries;
836 for (i = 0; i < efx->n_channels; i++) {
837 channel = efx->channel[i];
838 efx->channel[i] = other_channel[i];
839 other_channel[i] = channel;
840 }
841 goto out;
842 }
843
844 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
845 {
846 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
847 }
848
849 static const struct efx_channel_type efx_default_channel_type = {
850 .pre_probe = efx_channel_dummy_op_int,
851 .post_remove = efx_channel_dummy_op_void,
852 .get_name = efx_get_channel_name,
853 .copy = efx_copy_channel,
854 .keep_eventq = false,
855 };
856
857 int efx_channel_dummy_op_int(struct efx_channel *channel)
858 {
859 return 0;
860 }
861
862 void efx_channel_dummy_op_void(struct efx_channel *channel)
863 {
864 }
865
866 /**************************************************************************
867 *
868 * Port handling
869 *
870 **************************************************************************/
871
872 /* This ensures that the kernel is kept informed (via
873 * netif_carrier_on/off) of the link status, and also maintains the
874 * link status's stop on the port's TX queue.
875 */
876 void efx_link_status_changed(struct efx_nic *efx)
877 {
878 struct efx_link_state *link_state = &efx->link_state;
879
880 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
881 * that no events are triggered between unregister_netdev() and the
882 * driver unloading. A more general condition is that NETDEV_CHANGE
883 * can only be generated between NETDEV_UP and NETDEV_DOWN */
884 if (!netif_running(efx->net_dev))
885 return;
886
887 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
888 efx->n_link_state_changes++;
889
890 if (link_state->up)
891 netif_carrier_on(efx->net_dev);
892 else
893 netif_carrier_off(efx->net_dev);
894 }
895
896 /* Status message for kernel log */
897 if (link_state->up)
898 netif_info(efx, link, efx->net_dev,
899 "link up at %uMbps %s-duplex (MTU %d)\n",
900 link_state->speed, link_state->fd ? "full" : "half",
901 efx->net_dev->mtu);
902 else
903 netif_info(efx, link, efx->net_dev, "link down\n");
904 }
905
906 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
907 {
908 efx->link_advertising = advertising;
909 if (advertising) {
910 if (advertising & ADVERTISED_Pause)
911 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
912 else
913 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
914 if (advertising & ADVERTISED_Asym_Pause)
915 efx->wanted_fc ^= EFX_FC_TX;
916 }
917 }
918
919 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
920 {
921 efx->wanted_fc = wanted_fc;
922 if (efx->link_advertising) {
923 if (wanted_fc & EFX_FC_RX)
924 efx->link_advertising |= (ADVERTISED_Pause |
925 ADVERTISED_Asym_Pause);
926 else
927 efx->link_advertising &= ~(ADVERTISED_Pause |
928 ADVERTISED_Asym_Pause);
929 if (wanted_fc & EFX_FC_TX)
930 efx->link_advertising ^= ADVERTISED_Asym_Pause;
931 }
932 }
933
934 static void efx_fini_port(struct efx_nic *efx);
935
936 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
937 * the MAC appropriately. All other PHY configuration changes are pushed
938 * through phy_op->set_settings(), and pushed asynchronously to the MAC
939 * through efx_monitor().
940 *
941 * Callers must hold the mac_lock
942 */
943 int __efx_reconfigure_port(struct efx_nic *efx)
944 {
945 enum efx_phy_mode phy_mode;
946 int rc;
947
948 WARN_ON(!mutex_is_locked(&efx->mac_lock));
949
950 /* Disable PHY transmit in mac level loopbacks */
951 phy_mode = efx->phy_mode;
952 if (LOOPBACK_INTERNAL(efx))
953 efx->phy_mode |= PHY_MODE_TX_DISABLED;
954 else
955 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
956
957 rc = efx->type->reconfigure_port(efx);
958
959 if (rc)
960 efx->phy_mode = phy_mode;
961
962 return rc;
963 }
964
965 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
966 * disabled. */
967 int efx_reconfigure_port(struct efx_nic *efx)
968 {
969 int rc;
970
971 EFX_ASSERT_RESET_SERIALISED(efx);
972
973 mutex_lock(&efx->mac_lock);
974 rc = __efx_reconfigure_port(efx);
975 mutex_unlock(&efx->mac_lock);
976
977 return rc;
978 }
979
980 /* Asynchronous work item for changing MAC promiscuity and multicast
981 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
982 * MAC directly. */
983 static void efx_mac_work(struct work_struct *data)
984 {
985 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
986
987 mutex_lock(&efx->mac_lock);
988 if (efx->port_enabled)
989 efx->type->reconfigure_mac(efx);
990 mutex_unlock(&efx->mac_lock);
991 }
992
993 static int efx_probe_port(struct efx_nic *efx)
994 {
995 int rc;
996
997 netif_dbg(efx, probe, efx->net_dev, "create port\n");
998
999 if (phy_flash_cfg)
1000 efx->phy_mode = PHY_MODE_SPECIAL;
1001
1002 /* Connect up MAC/PHY operations table */
1003 rc = efx->type->probe_port(efx);
1004 if (rc)
1005 return rc;
1006
1007 /* Initialise MAC address to permanent address */
1008 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1009
1010 return 0;
1011 }
1012
1013 static int efx_init_port(struct efx_nic *efx)
1014 {
1015 int rc;
1016
1017 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1018
1019 mutex_lock(&efx->mac_lock);
1020
1021 rc = efx->phy_op->init(efx);
1022 if (rc)
1023 goto fail1;
1024
1025 efx->port_initialized = true;
1026
1027 /* Reconfigure the MAC before creating dma queues (required for
1028 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1029 efx->type->reconfigure_mac(efx);
1030
1031 /* Ensure the PHY advertises the correct flow control settings */
1032 rc = efx->phy_op->reconfigure(efx);
1033 if (rc)
1034 goto fail2;
1035
1036 mutex_unlock(&efx->mac_lock);
1037 return 0;
1038
1039 fail2:
1040 efx->phy_op->fini(efx);
1041 fail1:
1042 mutex_unlock(&efx->mac_lock);
1043 return rc;
1044 }
1045
1046 static void efx_start_port(struct efx_nic *efx)
1047 {
1048 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1049 BUG_ON(efx->port_enabled);
1050
1051 mutex_lock(&efx->mac_lock);
1052 efx->port_enabled = true;
1053
1054 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1055 * and then cancelled by efx_flush_all() */
1056 efx->type->reconfigure_mac(efx);
1057
1058 mutex_unlock(&efx->mac_lock);
1059 }
1060
1061 /* Prevent efx_mac_work() and efx_monitor() from working */
1062 static void efx_stop_port(struct efx_nic *efx)
1063 {
1064 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1065
1066 mutex_lock(&efx->mac_lock);
1067 efx->port_enabled = false;
1068 mutex_unlock(&efx->mac_lock);
1069
1070 /* Serialise against efx_set_multicast_list() */
1071 netif_addr_lock_bh(efx->net_dev);
1072 netif_addr_unlock_bh(efx->net_dev);
1073 }
1074
1075 static void efx_fini_port(struct efx_nic *efx)
1076 {
1077 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1078
1079 if (!efx->port_initialized)
1080 return;
1081
1082 efx->phy_op->fini(efx);
1083 efx->port_initialized = false;
1084
1085 efx->link_state.up = false;
1086 efx_link_status_changed(efx);
1087 }
1088
1089 static void efx_remove_port(struct efx_nic *efx)
1090 {
1091 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1092
1093 efx->type->remove_port(efx);
1094 }
1095
1096 /**************************************************************************
1097 *
1098 * NIC handling
1099 *
1100 **************************************************************************/
1101
1102 /* This configures the PCI device to enable I/O and DMA. */
1103 static int efx_init_io(struct efx_nic *efx)
1104 {
1105 struct pci_dev *pci_dev = efx->pci_dev;
1106 dma_addr_t dma_mask = efx->type->max_dma_mask;
1107 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1108 int rc;
1109
1110 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1111
1112 rc = pci_enable_device(pci_dev);
1113 if (rc) {
1114 netif_err(efx, probe, efx->net_dev,
1115 "failed to enable PCI device\n");
1116 goto fail1;
1117 }
1118
1119 pci_set_master(pci_dev);
1120
1121 /* Set the PCI DMA mask. Try all possibilities from our
1122 * genuine mask down to 32 bits, because some architectures
1123 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1124 * masks event though they reject 46 bit masks.
1125 */
1126 while (dma_mask > 0x7fffffffUL) {
1127 if (dma_supported(&pci_dev->dev, dma_mask)) {
1128 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1129 if (rc == 0)
1130 break;
1131 }
1132 dma_mask >>= 1;
1133 }
1134 if (rc) {
1135 netif_err(efx, probe, efx->net_dev,
1136 "could not find a suitable DMA mask\n");
1137 goto fail2;
1138 }
1139 netif_dbg(efx, probe, efx->net_dev,
1140 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1141 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1142 if (rc) {
1143 /* dma_set_coherent_mask() is not *allowed* to
1144 * fail with a mask that dma_set_mask() accepted,
1145 * but just in case...
1146 */
1147 netif_err(efx, probe, efx->net_dev,
1148 "failed to set consistent DMA mask\n");
1149 goto fail2;
1150 }
1151
1152 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1153 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1154 if (rc) {
1155 netif_err(efx, probe, efx->net_dev,
1156 "request for memory BAR failed\n");
1157 rc = -EIO;
1158 goto fail3;
1159 }
1160 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1161 if (!efx->membase) {
1162 netif_err(efx, probe, efx->net_dev,
1163 "could not map memory BAR at %llx+%x\n",
1164 (unsigned long long)efx->membase_phys, mem_map_size);
1165 rc = -ENOMEM;
1166 goto fail4;
1167 }
1168 netif_dbg(efx, probe, efx->net_dev,
1169 "memory BAR at %llx+%x (virtual %p)\n",
1170 (unsigned long long)efx->membase_phys, mem_map_size,
1171 efx->membase);
1172
1173 return 0;
1174
1175 fail4:
1176 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1177 fail3:
1178 efx->membase_phys = 0;
1179 fail2:
1180 pci_disable_device(efx->pci_dev);
1181 fail1:
1182 return rc;
1183 }
1184
1185 static void efx_fini_io(struct efx_nic *efx)
1186 {
1187 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1188
1189 if (efx->membase) {
1190 iounmap(efx->membase);
1191 efx->membase = NULL;
1192 }
1193
1194 if (efx->membase_phys) {
1195 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1196 efx->membase_phys = 0;
1197 }
1198
1199 pci_disable_device(efx->pci_dev);
1200 }
1201
1202 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1203 {
1204 cpumask_var_t thread_mask;
1205 unsigned int count;
1206 int cpu;
1207
1208 if (rss_cpus) {
1209 count = rss_cpus;
1210 } else {
1211 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1212 netif_warn(efx, probe, efx->net_dev,
1213 "RSS disabled due to allocation failure\n");
1214 return 1;
1215 }
1216
1217 count = 0;
1218 for_each_online_cpu(cpu) {
1219 if (!cpumask_test_cpu(cpu, thread_mask)) {
1220 ++count;
1221 cpumask_or(thread_mask, thread_mask,
1222 topology_thread_cpumask(cpu));
1223 }
1224 }
1225
1226 free_cpumask_var(thread_mask);
1227 }
1228
1229 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1230 * table entries that are inaccessible to VFs
1231 */
1232 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1233 count > efx_vf_size(efx)) {
1234 netif_warn(efx, probe, efx->net_dev,
1235 "Reducing number of RSS channels from %u to %u for "
1236 "VF support. Increase vf-msix-limit to use more "
1237 "channels on the PF.\n",
1238 count, efx_vf_size(efx));
1239 count = efx_vf_size(efx);
1240 }
1241
1242 return count;
1243 }
1244
1245 /* Probe the number and type of interrupts we are able to obtain, and
1246 * the resulting numbers of channels and RX queues.
1247 */
1248 static int efx_probe_interrupts(struct efx_nic *efx)
1249 {
1250 unsigned int extra_channels = 0;
1251 unsigned int i, j;
1252 int rc;
1253
1254 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1255 if (efx->extra_channel_type[i])
1256 ++extra_channels;
1257
1258 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1259 struct msix_entry xentries[EFX_MAX_CHANNELS];
1260 unsigned int n_channels;
1261
1262 n_channels = efx_wanted_parallelism(efx);
1263 if (separate_tx_channels)
1264 n_channels *= 2;
1265 n_channels += extra_channels;
1266 n_channels = min(n_channels, efx->max_channels);
1267
1268 for (i = 0; i < n_channels; i++)
1269 xentries[i].entry = i;
1270 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1271 if (rc > 0) {
1272 netif_err(efx, drv, efx->net_dev,
1273 "WARNING: Insufficient MSI-X vectors"
1274 " available (%d < %u).\n", rc, n_channels);
1275 netif_err(efx, drv, efx->net_dev,
1276 "WARNING: Performance may be reduced.\n");
1277 EFX_BUG_ON_PARANOID(rc >= n_channels);
1278 n_channels = rc;
1279 rc = pci_enable_msix(efx->pci_dev, xentries,
1280 n_channels);
1281 }
1282
1283 if (rc == 0) {
1284 efx->n_channels = n_channels;
1285 if (n_channels > extra_channels)
1286 n_channels -= extra_channels;
1287 if (separate_tx_channels) {
1288 efx->n_tx_channels = max(n_channels / 2, 1U);
1289 efx->n_rx_channels = max(n_channels -
1290 efx->n_tx_channels,
1291 1U);
1292 } else {
1293 efx->n_tx_channels = n_channels;
1294 efx->n_rx_channels = n_channels;
1295 }
1296 for (i = 0; i < efx->n_channels; i++)
1297 efx_get_channel(efx, i)->irq =
1298 xentries[i].vector;
1299 } else {
1300 /* Fall back to single channel MSI */
1301 efx->interrupt_mode = EFX_INT_MODE_MSI;
1302 netif_err(efx, drv, efx->net_dev,
1303 "could not enable MSI-X\n");
1304 }
1305 }
1306
1307 /* Try single interrupt MSI */
1308 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1309 efx->n_channels = 1;
1310 efx->n_rx_channels = 1;
1311 efx->n_tx_channels = 1;
1312 rc = pci_enable_msi(efx->pci_dev);
1313 if (rc == 0) {
1314 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1315 } else {
1316 netif_err(efx, drv, efx->net_dev,
1317 "could not enable MSI\n");
1318 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1319 }
1320 }
1321
1322 /* Assume legacy interrupts */
1323 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1324 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1325 efx->n_rx_channels = 1;
1326 efx->n_tx_channels = 1;
1327 efx->legacy_irq = efx->pci_dev->irq;
1328 }
1329
1330 /* Assign extra channels if possible */
1331 j = efx->n_channels;
1332 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1333 if (!efx->extra_channel_type[i])
1334 continue;
1335 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1336 efx->n_channels <= extra_channels) {
1337 efx->extra_channel_type[i]->handle_no_channel(efx);
1338 } else {
1339 --j;
1340 efx_get_channel(efx, j)->type =
1341 efx->extra_channel_type[i];
1342 }
1343 }
1344
1345 /* RSS might be usable on VFs even if it is disabled on the PF */
1346 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1347 efx->n_rx_channels : efx_vf_size(efx));
1348
1349 return 0;
1350 }
1351
1352 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1353 {
1354 struct efx_channel *channel, *end_channel;
1355 int rc;
1356
1357 BUG_ON(efx->state == STATE_DISABLED);
1358
1359 efx->irq_soft_enabled = true;
1360 smp_wmb();
1361
1362 efx_for_each_channel(channel, efx) {
1363 if (!channel->type->keep_eventq) {
1364 rc = efx_init_eventq(channel);
1365 if (rc)
1366 goto fail;
1367 }
1368 efx_start_eventq(channel);
1369 }
1370
1371 efx_mcdi_mode_event(efx);
1372
1373 return 0;
1374 fail:
1375 end_channel = channel;
1376 efx_for_each_channel(channel, efx) {
1377 if (channel == end_channel)
1378 break;
1379 efx_stop_eventq(channel);
1380 if (!channel->type->keep_eventq)
1381 efx_fini_eventq(channel);
1382 }
1383
1384 return rc;
1385 }
1386
1387 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1388 {
1389 struct efx_channel *channel;
1390
1391 if (efx->state == STATE_DISABLED)
1392 return;
1393
1394 efx_mcdi_mode_poll(efx);
1395
1396 efx->irq_soft_enabled = false;
1397 smp_wmb();
1398
1399 if (efx->legacy_irq)
1400 synchronize_irq(efx->legacy_irq);
1401
1402 efx_for_each_channel(channel, efx) {
1403 if (channel->irq)
1404 synchronize_irq(channel->irq);
1405
1406 efx_stop_eventq(channel);
1407 if (!channel->type->keep_eventq)
1408 efx_fini_eventq(channel);
1409 }
1410
1411 /* Flush the asynchronous MCDI request queue */
1412 efx_mcdi_flush_async(efx);
1413 }
1414
1415 static int efx_enable_interrupts(struct efx_nic *efx)
1416 {
1417 struct efx_channel *channel, *end_channel;
1418 int rc;
1419
1420 BUG_ON(efx->state == STATE_DISABLED);
1421
1422 if (efx->eeh_disabled_legacy_irq) {
1423 enable_irq(efx->legacy_irq);
1424 efx->eeh_disabled_legacy_irq = false;
1425 }
1426
1427 efx->type->irq_enable_master(efx);
1428
1429 efx_for_each_channel(channel, efx) {
1430 if (channel->type->keep_eventq) {
1431 rc = efx_init_eventq(channel);
1432 if (rc)
1433 goto fail;
1434 }
1435 }
1436
1437 rc = efx_soft_enable_interrupts(efx);
1438 if (rc)
1439 goto fail;
1440
1441 return 0;
1442
1443 fail:
1444 end_channel = channel;
1445 efx_for_each_channel(channel, efx) {
1446 if (channel == end_channel)
1447 break;
1448 if (channel->type->keep_eventq)
1449 efx_fini_eventq(channel);
1450 }
1451
1452 efx->type->irq_disable_non_ev(efx);
1453
1454 return rc;
1455 }
1456
1457 static void efx_disable_interrupts(struct efx_nic *efx)
1458 {
1459 struct efx_channel *channel;
1460
1461 efx_soft_disable_interrupts(efx);
1462
1463 efx_for_each_channel(channel, efx) {
1464 if (channel->type->keep_eventq)
1465 efx_fini_eventq(channel);
1466 }
1467
1468 efx->type->irq_disable_non_ev(efx);
1469 }
1470
1471 static void efx_remove_interrupts(struct efx_nic *efx)
1472 {
1473 struct efx_channel *channel;
1474
1475 /* Remove MSI/MSI-X interrupts */
1476 efx_for_each_channel(channel, efx)
1477 channel->irq = 0;
1478 pci_disable_msi(efx->pci_dev);
1479 pci_disable_msix(efx->pci_dev);
1480
1481 /* Remove legacy interrupt */
1482 efx->legacy_irq = 0;
1483 }
1484
1485 static void efx_set_channels(struct efx_nic *efx)
1486 {
1487 struct efx_channel *channel;
1488 struct efx_tx_queue *tx_queue;
1489
1490 efx->tx_channel_offset =
1491 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1492
1493 /* We need to mark which channels really have RX and TX
1494 * queues, and adjust the TX queue numbers if we have separate
1495 * RX-only and TX-only channels.
1496 */
1497 efx_for_each_channel(channel, efx) {
1498 if (channel->channel < efx->n_rx_channels)
1499 channel->rx_queue.core_index = channel->channel;
1500 else
1501 channel->rx_queue.core_index = -1;
1502
1503 efx_for_each_channel_tx_queue(tx_queue, channel)
1504 tx_queue->queue -= (efx->tx_channel_offset *
1505 EFX_TXQ_TYPES);
1506 }
1507 }
1508
1509 static int efx_probe_nic(struct efx_nic *efx)
1510 {
1511 size_t i;
1512 int rc;
1513
1514 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1515
1516 /* Carry out hardware-type specific initialisation */
1517 rc = efx->type->probe(efx);
1518 if (rc)
1519 return rc;
1520
1521 /* Determine the number of channels and queues by trying to hook
1522 * in MSI-X interrupts. */
1523 rc = efx_probe_interrupts(efx);
1524 if (rc)
1525 goto fail1;
1526
1527 rc = efx->type->dimension_resources(efx);
1528 if (rc)
1529 goto fail2;
1530
1531 if (efx->n_channels > 1)
1532 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1533 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1534 efx->rx_indir_table[i] =
1535 ethtool_rxfh_indir_default(i, efx->rss_spread);
1536
1537 efx_set_channels(efx);
1538 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1539 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1540
1541 /* Initialise the interrupt moderation settings */
1542 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1543 true);
1544
1545 return 0;
1546
1547 fail2:
1548 efx_remove_interrupts(efx);
1549 fail1:
1550 efx->type->remove(efx);
1551 return rc;
1552 }
1553
1554 static void efx_remove_nic(struct efx_nic *efx)
1555 {
1556 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1557
1558 efx_remove_interrupts(efx);
1559 efx->type->remove(efx);
1560 }
1561
1562 static int efx_probe_filters(struct efx_nic *efx)
1563 {
1564 int rc;
1565
1566 spin_lock_init(&efx->filter_lock);
1567
1568 rc = efx->type->filter_table_probe(efx);
1569 if (rc)
1570 return rc;
1571
1572 #ifdef CONFIG_RFS_ACCEL
1573 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1574 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1575 sizeof(*efx->rps_flow_id),
1576 GFP_KERNEL);
1577 if (!efx->rps_flow_id) {
1578 efx->type->filter_table_remove(efx);
1579 return -ENOMEM;
1580 }
1581 }
1582 #endif
1583
1584 return 0;
1585 }
1586
1587 static void efx_remove_filters(struct efx_nic *efx)
1588 {
1589 #ifdef CONFIG_RFS_ACCEL
1590 kfree(efx->rps_flow_id);
1591 #endif
1592 efx->type->filter_table_remove(efx);
1593 }
1594
1595 static void efx_restore_filters(struct efx_nic *efx)
1596 {
1597 efx->type->filter_table_restore(efx);
1598 }
1599
1600 /**************************************************************************
1601 *
1602 * NIC startup/shutdown
1603 *
1604 *************************************************************************/
1605
1606 static int efx_probe_all(struct efx_nic *efx)
1607 {
1608 int rc;
1609
1610 rc = efx_probe_nic(efx);
1611 if (rc) {
1612 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1613 goto fail1;
1614 }
1615
1616 rc = efx_probe_port(efx);
1617 if (rc) {
1618 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1619 goto fail2;
1620 }
1621
1622 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1623 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1624 rc = -EINVAL;
1625 goto fail3;
1626 }
1627 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1628
1629 rc = efx_probe_filters(efx);
1630 if (rc) {
1631 netif_err(efx, probe, efx->net_dev,
1632 "failed to create filter tables\n");
1633 goto fail3;
1634 }
1635
1636 rc = efx_probe_channels(efx);
1637 if (rc)
1638 goto fail4;
1639
1640 return 0;
1641
1642 fail4:
1643 efx_remove_filters(efx);
1644 fail3:
1645 efx_remove_port(efx);
1646 fail2:
1647 efx_remove_nic(efx);
1648 fail1:
1649 return rc;
1650 }
1651
1652 /* If the interface is supposed to be running but is not, start
1653 * the hardware and software data path, regular activity for the port
1654 * (MAC statistics, link polling, etc.) and schedule the port to be
1655 * reconfigured. Interrupts must already be enabled. This function
1656 * is safe to call multiple times, so long as the NIC is not disabled.
1657 * Requires the RTNL lock.
1658 */
1659 static void efx_start_all(struct efx_nic *efx)
1660 {
1661 EFX_ASSERT_RESET_SERIALISED(efx);
1662 BUG_ON(efx->state == STATE_DISABLED);
1663
1664 /* Check that it is appropriate to restart the interface. All
1665 * of these flags are safe to read under just the rtnl lock */
1666 if (efx->port_enabled || !netif_running(efx->net_dev))
1667 return;
1668
1669 efx_start_port(efx);
1670 efx_start_datapath(efx);
1671
1672 /* Start the hardware monitor if there is one */
1673 if (efx->type->monitor != NULL)
1674 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1675 efx_monitor_interval);
1676
1677 /* If link state detection is normally event-driven, we have
1678 * to poll now because we could have missed a change
1679 */
1680 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1681 mutex_lock(&efx->mac_lock);
1682 if (efx->phy_op->poll(efx))
1683 efx_link_status_changed(efx);
1684 mutex_unlock(&efx->mac_lock);
1685 }
1686
1687 efx->type->start_stats(efx);
1688 }
1689
1690 /* Flush all delayed work. Should only be called when no more delayed work
1691 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1692 * since we're holding the rtnl_lock at this point. */
1693 static void efx_flush_all(struct efx_nic *efx)
1694 {
1695 /* Make sure the hardware monitor and event self-test are stopped */
1696 cancel_delayed_work_sync(&efx->monitor_work);
1697 efx_selftest_async_cancel(efx);
1698 /* Stop scheduled port reconfigurations */
1699 cancel_work_sync(&efx->mac_work);
1700 }
1701
1702 /* Quiesce the hardware and software data path, and regular activity
1703 * for the port without bringing the link down. Safe to call multiple
1704 * times with the NIC in almost any state, but interrupts should be
1705 * enabled. Requires the RTNL lock.
1706 */
1707 static void efx_stop_all(struct efx_nic *efx)
1708 {
1709 EFX_ASSERT_RESET_SERIALISED(efx);
1710
1711 /* port_enabled can be read safely under the rtnl lock */
1712 if (!efx->port_enabled)
1713 return;
1714
1715 efx->type->stop_stats(efx);
1716 efx_stop_port(efx);
1717
1718 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1719 efx_flush_all(efx);
1720
1721 /* Stop the kernel transmit interface. This is only valid if
1722 * the device is stopped or detached; otherwise the watchdog
1723 * may fire immediately.
1724 */
1725 WARN_ON(netif_running(efx->net_dev) &&
1726 netif_device_present(efx->net_dev));
1727 netif_tx_disable(efx->net_dev);
1728
1729 efx_stop_datapath(efx);
1730 }
1731
1732 static void efx_remove_all(struct efx_nic *efx)
1733 {
1734 efx_remove_channels(efx);
1735 efx_remove_filters(efx);
1736 efx_remove_port(efx);
1737 efx_remove_nic(efx);
1738 }
1739
1740 /**************************************************************************
1741 *
1742 * Interrupt moderation
1743 *
1744 **************************************************************************/
1745
1746 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1747 {
1748 if (usecs == 0)
1749 return 0;
1750 if (usecs * 1000 < quantum_ns)
1751 return 1; /* never round down to 0 */
1752 return usecs * 1000 / quantum_ns;
1753 }
1754
1755 /* Set interrupt moderation parameters */
1756 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1757 unsigned int rx_usecs, bool rx_adaptive,
1758 bool rx_may_override_tx)
1759 {
1760 struct efx_channel *channel;
1761 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1762 efx->timer_quantum_ns,
1763 1000);
1764 unsigned int tx_ticks;
1765 unsigned int rx_ticks;
1766
1767 EFX_ASSERT_RESET_SERIALISED(efx);
1768
1769 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1770 return -EINVAL;
1771
1772 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1773 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1774
1775 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1776 !rx_may_override_tx) {
1777 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1778 "RX and TX IRQ moderation must be equal\n");
1779 return -EINVAL;
1780 }
1781
1782 efx->irq_rx_adaptive = rx_adaptive;
1783 efx->irq_rx_moderation = rx_ticks;
1784 efx_for_each_channel(channel, efx) {
1785 if (efx_channel_has_rx_queue(channel))
1786 channel->irq_moderation = rx_ticks;
1787 else if (efx_channel_has_tx_queues(channel))
1788 channel->irq_moderation = tx_ticks;
1789 }
1790
1791 return 0;
1792 }
1793
1794 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1795 unsigned int *rx_usecs, bool *rx_adaptive)
1796 {
1797 /* We must round up when converting ticks to microseconds
1798 * because we round down when converting the other way.
1799 */
1800
1801 *rx_adaptive = efx->irq_rx_adaptive;
1802 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1803 efx->timer_quantum_ns,
1804 1000);
1805
1806 /* If channels are shared between RX and TX, so is IRQ
1807 * moderation. Otherwise, IRQ moderation is the same for all
1808 * TX channels and is not adaptive.
1809 */
1810 if (efx->tx_channel_offset == 0)
1811 *tx_usecs = *rx_usecs;
1812 else
1813 *tx_usecs = DIV_ROUND_UP(
1814 efx->channel[efx->tx_channel_offset]->irq_moderation *
1815 efx->timer_quantum_ns,
1816 1000);
1817 }
1818
1819 /**************************************************************************
1820 *
1821 * Hardware monitor
1822 *
1823 **************************************************************************/
1824
1825 /* Run periodically off the general workqueue */
1826 static void efx_monitor(struct work_struct *data)
1827 {
1828 struct efx_nic *efx = container_of(data, struct efx_nic,
1829 monitor_work.work);
1830
1831 netif_vdbg(efx, timer, efx->net_dev,
1832 "hardware monitor executing on CPU %d\n",
1833 raw_smp_processor_id());
1834 BUG_ON(efx->type->monitor == NULL);
1835
1836 /* If the mac_lock is already held then it is likely a port
1837 * reconfiguration is already in place, which will likely do
1838 * most of the work of monitor() anyway. */
1839 if (mutex_trylock(&efx->mac_lock)) {
1840 if (efx->port_enabled)
1841 efx->type->monitor(efx);
1842 mutex_unlock(&efx->mac_lock);
1843 }
1844
1845 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1846 efx_monitor_interval);
1847 }
1848
1849 /**************************************************************************
1850 *
1851 * ioctls
1852 *
1853 *************************************************************************/
1854
1855 /* Net device ioctl
1856 * Context: process, rtnl_lock() held.
1857 */
1858 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1859 {
1860 struct efx_nic *efx = netdev_priv(net_dev);
1861 struct mii_ioctl_data *data = if_mii(ifr);
1862
1863 if (cmd == SIOCSHWTSTAMP)
1864 return efx_ptp_ioctl(efx, ifr, cmd);
1865
1866 /* Convert phy_id from older PRTAD/DEVAD format */
1867 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1868 (data->phy_id & 0xfc00) == 0x0400)
1869 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1870
1871 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1872 }
1873
1874 /**************************************************************************
1875 *
1876 * NAPI interface
1877 *
1878 **************************************************************************/
1879
1880 static void efx_init_napi_channel(struct efx_channel *channel)
1881 {
1882 struct efx_nic *efx = channel->efx;
1883
1884 channel->napi_dev = efx->net_dev;
1885 netif_napi_add(channel->napi_dev, &channel->napi_str,
1886 efx_poll, napi_weight);
1887 }
1888
1889 static void efx_init_napi(struct efx_nic *efx)
1890 {
1891 struct efx_channel *channel;
1892
1893 efx_for_each_channel(channel, efx)
1894 efx_init_napi_channel(channel);
1895 }
1896
1897 static void efx_fini_napi_channel(struct efx_channel *channel)
1898 {
1899 if (channel->napi_dev)
1900 netif_napi_del(&channel->napi_str);
1901 channel->napi_dev = NULL;
1902 }
1903
1904 static void efx_fini_napi(struct efx_nic *efx)
1905 {
1906 struct efx_channel *channel;
1907
1908 efx_for_each_channel(channel, efx)
1909 efx_fini_napi_channel(channel);
1910 }
1911
1912 /**************************************************************************
1913 *
1914 * Kernel netpoll interface
1915 *
1916 *************************************************************************/
1917
1918 #ifdef CONFIG_NET_POLL_CONTROLLER
1919
1920 /* Although in the common case interrupts will be disabled, this is not
1921 * guaranteed. However, all our work happens inside the NAPI callback,
1922 * so no locking is required.
1923 */
1924 static void efx_netpoll(struct net_device *net_dev)
1925 {
1926 struct efx_nic *efx = netdev_priv(net_dev);
1927 struct efx_channel *channel;
1928
1929 efx_for_each_channel(channel, efx)
1930 efx_schedule_channel(channel);
1931 }
1932
1933 #endif
1934
1935 /**************************************************************************
1936 *
1937 * Kernel net device interface
1938 *
1939 *************************************************************************/
1940
1941 /* Context: process, rtnl_lock() held. */
1942 static int efx_net_open(struct net_device *net_dev)
1943 {
1944 struct efx_nic *efx = netdev_priv(net_dev);
1945 int rc;
1946
1947 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1948 raw_smp_processor_id());
1949
1950 rc = efx_check_disabled(efx);
1951 if (rc)
1952 return rc;
1953 if (efx->phy_mode & PHY_MODE_SPECIAL)
1954 return -EBUSY;
1955 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1956 return -EIO;
1957
1958 /* Notify the kernel of the link state polled during driver load,
1959 * before the monitor starts running */
1960 efx_link_status_changed(efx);
1961
1962 efx_start_all(efx);
1963 efx_selftest_async_start(efx);
1964 return 0;
1965 }
1966
1967 /* Context: process, rtnl_lock() held.
1968 * Note that the kernel will ignore our return code; this method
1969 * should really be a void.
1970 */
1971 static int efx_net_stop(struct net_device *net_dev)
1972 {
1973 struct efx_nic *efx = netdev_priv(net_dev);
1974
1975 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1976 raw_smp_processor_id());
1977
1978 /* Stop the device and flush all the channels */
1979 efx_stop_all(efx);
1980
1981 return 0;
1982 }
1983
1984 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1985 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1986 struct rtnl_link_stats64 *stats)
1987 {
1988 struct efx_nic *efx = netdev_priv(net_dev);
1989
1990 spin_lock_bh(&efx->stats_lock);
1991 efx->type->update_stats(efx, NULL, stats);
1992 spin_unlock_bh(&efx->stats_lock);
1993
1994 return stats;
1995 }
1996
1997 /* Context: netif_tx_lock held, BHs disabled. */
1998 static void efx_watchdog(struct net_device *net_dev)
1999 {
2000 struct efx_nic *efx = netdev_priv(net_dev);
2001
2002 netif_err(efx, tx_err, efx->net_dev,
2003 "TX stuck with port_enabled=%d: resetting channels\n",
2004 efx->port_enabled);
2005
2006 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2007 }
2008
2009
2010 /* Context: process, rtnl_lock() held. */
2011 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2012 {
2013 struct efx_nic *efx = netdev_priv(net_dev);
2014 int rc;
2015
2016 rc = efx_check_disabled(efx);
2017 if (rc)
2018 return rc;
2019 if (new_mtu > EFX_MAX_MTU)
2020 return -EINVAL;
2021
2022 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2023
2024 efx_device_detach_sync(efx);
2025 efx_stop_all(efx);
2026
2027 mutex_lock(&efx->mac_lock);
2028 net_dev->mtu = new_mtu;
2029 efx->type->reconfigure_mac(efx);
2030 mutex_unlock(&efx->mac_lock);
2031
2032 efx_start_all(efx);
2033 netif_device_attach(efx->net_dev);
2034 return 0;
2035 }
2036
2037 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2038 {
2039 struct efx_nic *efx = netdev_priv(net_dev);
2040 struct sockaddr *addr = data;
2041 char *new_addr = addr->sa_data;
2042
2043 if (!is_valid_ether_addr(new_addr)) {
2044 netif_err(efx, drv, efx->net_dev,
2045 "invalid ethernet MAC address requested: %pM\n",
2046 new_addr);
2047 return -EADDRNOTAVAIL;
2048 }
2049
2050 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2051 efx_sriov_mac_address_changed(efx);
2052
2053 /* Reconfigure the MAC */
2054 mutex_lock(&efx->mac_lock);
2055 efx->type->reconfigure_mac(efx);
2056 mutex_unlock(&efx->mac_lock);
2057
2058 return 0;
2059 }
2060
2061 /* Context: netif_addr_lock held, BHs disabled. */
2062 static void efx_set_rx_mode(struct net_device *net_dev)
2063 {
2064 struct efx_nic *efx = netdev_priv(net_dev);
2065
2066 if (efx->port_enabled)
2067 queue_work(efx->workqueue, &efx->mac_work);
2068 /* Otherwise efx_start_port() will do this */
2069 }
2070
2071 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2072 {
2073 struct efx_nic *efx = netdev_priv(net_dev);
2074
2075 /* If disabling RX n-tuple filtering, clear existing filters */
2076 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2077 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2078
2079 return 0;
2080 }
2081
2082 static const struct net_device_ops efx_farch_netdev_ops = {
2083 .ndo_open = efx_net_open,
2084 .ndo_stop = efx_net_stop,
2085 .ndo_get_stats64 = efx_net_stats,
2086 .ndo_tx_timeout = efx_watchdog,
2087 .ndo_start_xmit = efx_hard_start_xmit,
2088 .ndo_validate_addr = eth_validate_addr,
2089 .ndo_do_ioctl = efx_ioctl,
2090 .ndo_change_mtu = efx_change_mtu,
2091 .ndo_set_mac_address = efx_set_mac_address,
2092 .ndo_set_rx_mode = efx_set_rx_mode,
2093 .ndo_set_features = efx_set_features,
2094 #ifdef CONFIG_SFC_SRIOV
2095 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2096 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2097 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2098 .ndo_get_vf_config = efx_sriov_get_vf_config,
2099 #endif
2100 #ifdef CONFIG_NET_POLL_CONTROLLER
2101 .ndo_poll_controller = efx_netpoll,
2102 #endif
2103 .ndo_setup_tc = efx_setup_tc,
2104 #ifdef CONFIG_RFS_ACCEL
2105 .ndo_rx_flow_steer = efx_filter_rfs,
2106 #endif
2107 };
2108
2109 static const struct net_device_ops efx_ef10_netdev_ops = {
2110 .ndo_open = efx_net_open,
2111 .ndo_stop = efx_net_stop,
2112 .ndo_get_stats64 = efx_net_stats,
2113 .ndo_tx_timeout = efx_watchdog,
2114 .ndo_start_xmit = efx_hard_start_xmit,
2115 .ndo_validate_addr = eth_validate_addr,
2116 .ndo_do_ioctl = efx_ioctl,
2117 .ndo_change_mtu = efx_change_mtu,
2118 .ndo_set_mac_address = efx_set_mac_address,
2119 .ndo_set_rx_mode = efx_set_rx_mode,
2120 .ndo_set_features = efx_set_features,
2121 #ifdef CONFIG_NET_POLL_CONTROLLER
2122 .ndo_poll_controller = efx_netpoll,
2123 #endif
2124 #ifdef CONFIG_RFS_ACCEL
2125 .ndo_rx_flow_steer = efx_filter_rfs,
2126 #endif
2127 };
2128
2129 static void efx_update_name(struct efx_nic *efx)
2130 {
2131 strcpy(efx->name, efx->net_dev->name);
2132 efx_mtd_rename(efx);
2133 efx_set_channel_names(efx);
2134 }
2135
2136 static int efx_netdev_event(struct notifier_block *this,
2137 unsigned long event, void *ptr)
2138 {
2139 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2140
2141 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2142 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2143 event == NETDEV_CHANGENAME)
2144 efx_update_name(netdev_priv(net_dev));
2145
2146 return NOTIFY_DONE;
2147 }
2148
2149 static struct notifier_block efx_netdev_notifier = {
2150 .notifier_call = efx_netdev_event,
2151 };
2152
2153 static ssize_t
2154 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2155 {
2156 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2157 return sprintf(buf, "%d\n", efx->phy_type);
2158 }
2159 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2160
2161 static int efx_register_netdev(struct efx_nic *efx)
2162 {
2163 struct net_device *net_dev = efx->net_dev;
2164 struct efx_channel *channel;
2165 int rc;
2166
2167 net_dev->watchdog_timeo = 5 * HZ;
2168 net_dev->irq = efx->pci_dev->irq;
2169 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2170 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2171 net_dev->priv_flags |= IFF_UNICAST_FLT;
2172 } else {
2173 net_dev->netdev_ops = &efx_farch_netdev_ops;
2174 }
2175 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2176 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2177
2178 rtnl_lock();
2179
2180 /* Enable resets to be scheduled and check whether any were
2181 * already requested. If so, the NIC is probably hosed so we
2182 * abort.
2183 */
2184 efx->state = STATE_READY;
2185 smp_mb(); /* ensure we change state before checking reset_pending */
2186 if (efx->reset_pending) {
2187 netif_err(efx, probe, efx->net_dev,
2188 "aborting probe due to scheduled reset\n");
2189 rc = -EIO;
2190 goto fail_locked;
2191 }
2192
2193 rc = dev_alloc_name(net_dev, net_dev->name);
2194 if (rc < 0)
2195 goto fail_locked;
2196 efx_update_name(efx);
2197
2198 /* Always start with carrier off; PHY events will detect the link */
2199 netif_carrier_off(net_dev);
2200
2201 rc = register_netdevice(net_dev);
2202 if (rc)
2203 goto fail_locked;
2204
2205 efx_for_each_channel(channel, efx) {
2206 struct efx_tx_queue *tx_queue;
2207 efx_for_each_channel_tx_queue(tx_queue, channel)
2208 efx_init_tx_queue_core_txq(tx_queue);
2209 }
2210
2211 rtnl_unlock();
2212
2213 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2214 if (rc) {
2215 netif_err(efx, drv, efx->net_dev,
2216 "failed to init net dev attributes\n");
2217 goto fail_registered;
2218 }
2219
2220 return 0;
2221
2222 fail_registered:
2223 rtnl_lock();
2224 unregister_netdevice(net_dev);
2225 fail_locked:
2226 efx->state = STATE_UNINIT;
2227 rtnl_unlock();
2228 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2229 return rc;
2230 }
2231
2232 static void efx_unregister_netdev(struct efx_nic *efx)
2233 {
2234 if (!efx->net_dev)
2235 return;
2236
2237 BUG_ON(netdev_priv(efx->net_dev) != efx);
2238
2239 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2240 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2241
2242 rtnl_lock();
2243 unregister_netdevice(efx->net_dev);
2244 efx->state = STATE_UNINIT;
2245 rtnl_unlock();
2246 }
2247
2248 /**************************************************************************
2249 *
2250 * Device reset and suspend
2251 *
2252 **************************************************************************/
2253
2254 /* Tears down the entire software state and most of the hardware state
2255 * before reset. */
2256 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2257 {
2258 EFX_ASSERT_RESET_SERIALISED(efx);
2259
2260 efx_stop_all(efx);
2261 efx_disable_interrupts(efx);
2262
2263 mutex_lock(&efx->mac_lock);
2264 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2265 efx->phy_op->fini(efx);
2266 efx->type->fini(efx);
2267 }
2268
2269 /* This function will always ensure that the locks acquired in
2270 * efx_reset_down() are released. A failure return code indicates
2271 * that we were unable to reinitialise the hardware, and the
2272 * driver should be disabled. If ok is false, then the rx and tx
2273 * engines are not restarted, pending a RESET_DISABLE. */
2274 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2275 {
2276 int rc;
2277
2278 EFX_ASSERT_RESET_SERIALISED(efx);
2279
2280 rc = efx->type->init(efx);
2281 if (rc) {
2282 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2283 goto fail;
2284 }
2285
2286 if (!ok)
2287 goto fail;
2288
2289 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2290 rc = efx->phy_op->init(efx);
2291 if (rc)
2292 goto fail;
2293 if (efx->phy_op->reconfigure(efx))
2294 netif_err(efx, drv, efx->net_dev,
2295 "could not restore PHY settings\n");
2296 }
2297
2298 rc = efx_enable_interrupts(efx);
2299 if (rc)
2300 goto fail;
2301 efx_restore_filters(efx);
2302 efx_sriov_reset(efx);
2303
2304 mutex_unlock(&efx->mac_lock);
2305
2306 efx_start_all(efx);
2307
2308 return 0;
2309
2310 fail:
2311 efx->port_initialized = false;
2312
2313 mutex_unlock(&efx->mac_lock);
2314
2315 return rc;
2316 }
2317
2318 /* Reset the NIC using the specified method. Note that the reset may
2319 * fail, in which case the card will be left in an unusable state.
2320 *
2321 * Caller must hold the rtnl_lock.
2322 */
2323 int efx_reset(struct efx_nic *efx, enum reset_type method)
2324 {
2325 int rc, rc2;
2326 bool disabled;
2327
2328 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2329 RESET_TYPE(method));
2330
2331 efx_device_detach_sync(efx);
2332 efx_reset_down(efx, method);
2333
2334 rc = efx->type->reset(efx, method);
2335 if (rc) {
2336 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2337 goto out;
2338 }
2339
2340 /* Clear flags for the scopes we covered. We assume the NIC and
2341 * driver are now quiescent so that there is no race here.
2342 */
2343 efx->reset_pending &= -(1 << (method + 1));
2344
2345 /* Reinitialise bus-mastering, which may have been turned off before
2346 * the reset was scheduled. This is still appropriate, even in the
2347 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2348 * can respond to requests. */
2349 pci_set_master(efx->pci_dev);
2350
2351 out:
2352 /* Leave device stopped if necessary */
2353 disabled = rc ||
2354 method == RESET_TYPE_DISABLE ||
2355 method == RESET_TYPE_RECOVER_OR_DISABLE;
2356 rc2 = efx_reset_up(efx, method, !disabled);
2357 if (rc2) {
2358 disabled = true;
2359 if (!rc)
2360 rc = rc2;
2361 }
2362
2363 if (disabled) {
2364 dev_close(efx->net_dev);
2365 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2366 efx->state = STATE_DISABLED;
2367 } else {
2368 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2369 netif_device_attach(efx->net_dev);
2370 }
2371 return rc;
2372 }
2373
2374 /* Try recovery mechanisms.
2375 * For now only EEH is supported.
2376 * Returns 0 if the recovery mechanisms are unsuccessful.
2377 * Returns a non-zero value otherwise.
2378 */
2379 int efx_try_recovery(struct efx_nic *efx)
2380 {
2381 #ifdef CONFIG_EEH
2382 /* A PCI error can occur and not be seen by EEH because nothing
2383 * happens on the PCI bus. In this case the driver may fail and
2384 * schedule a 'recover or reset', leading to this recovery handler.
2385 * Manually call the eeh failure check function.
2386 */
2387 struct eeh_dev *eehdev =
2388 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2389
2390 if (eeh_dev_check_failure(eehdev)) {
2391 /* The EEH mechanisms will handle the error and reset the
2392 * device if necessary.
2393 */
2394 return 1;
2395 }
2396 #endif
2397 return 0;
2398 }
2399
2400 /* The worker thread exists so that code that cannot sleep can
2401 * schedule a reset for later.
2402 */
2403 static void efx_reset_work(struct work_struct *data)
2404 {
2405 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2406 unsigned long pending;
2407 enum reset_type method;
2408
2409 pending = ACCESS_ONCE(efx->reset_pending);
2410 method = fls(pending) - 1;
2411
2412 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2413 method == RESET_TYPE_RECOVER_OR_ALL) &&
2414 efx_try_recovery(efx))
2415 return;
2416
2417 if (!pending)
2418 return;
2419
2420 rtnl_lock();
2421
2422 /* We checked the state in efx_schedule_reset() but it may
2423 * have changed by now. Now that we have the RTNL lock,
2424 * it cannot change again.
2425 */
2426 if (efx->state == STATE_READY)
2427 (void)efx_reset(efx, method);
2428
2429 rtnl_unlock();
2430 }
2431
2432 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2433 {
2434 enum reset_type method;
2435
2436 if (efx->state == STATE_RECOVERY) {
2437 netif_dbg(efx, drv, efx->net_dev,
2438 "recovering: skip scheduling %s reset\n",
2439 RESET_TYPE(type));
2440 return;
2441 }
2442
2443 switch (type) {
2444 case RESET_TYPE_INVISIBLE:
2445 case RESET_TYPE_ALL:
2446 case RESET_TYPE_RECOVER_OR_ALL:
2447 case RESET_TYPE_WORLD:
2448 case RESET_TYPE_DISABLE:
2449 case RESET_TYPE_RECOVER_OR_DISABLE:
2450 method = type;
2451 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2452 RESET_TYPE(method));
2453 break;
2454 default:
2455 method = efx->type->map_reset_reason(type);
2456 netif_dbg(efx, drv, efx->net_dev,
2457 "scheduling %s reset for %s\n",
2458 RESET_TYPE(method), RESET_TYPE(type));
2459 break;
2460 }
2461
2462 set_bit(method, &efx->reset_pending);
2463 smp_mb(); /* ensure we change reset_pending before checking state */
2464
2465 /* If we're not READY then just leave the flags set as the cue
2466 * to abort probing or reschedule the reset later.
2467 */
2468 if (ACCESS_ONCE(efx->state) != STATE_READY)
2469 return;
2470
2471 /* efx_process_channel() will no longer read events once a
2472 * reset is scheduled. So switch back to poll'd MCDI completions. */
2473 efx_mcdi_mode_poll(efx);
2474
2475 queue_work(reset_workqueue, &efx->reset_work);
2476 }
2477
2478 /**************************************************************************
2479 *
2480 * List of NICs we support
2481 *
2482 **************************************************************************/
2483
2484 /* PCI device ID table */
2485 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2486 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2487 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2488 .driver_data = (unsigned long) &falcon_a1_nic_type},
2489 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2490 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2491 .driver_data = (unsigned long) &falcon_b0_nic_type},
2492 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2493 .driver_data = (unsigned long) &siena_a0_nic_type},
2494 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2495 .driver_data = (unsigned long) &siena_a0_nic_type},
2496 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2497 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2498 {0} /* end of list */
2499 };
2500
2501 /**************************************************************************
2502 *
2503 * Dummy PHY/MAC operations
2504 *
2505 * Can be used for some unimplemented operations
2506 * Needed so all function pointers are valid and do not have to be tested
2507 * before use
2508 *
2509 **************************************************************************/
2510 int efx_port_dummy_op_int(struct efx_nic *efx)
2511 {
2512 return 0;
2513 }
2514 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2515
2516 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2517 {
2518 return false;
2519 }
2520
2521 static const struct efx_phy_operations efx_dummy_phy_operations = {
2522 .init = efx_port_dummy_op_int,
2523 .reconfigure = efx_port_dummy_op_int,
2524 .poll = efx_port_dummy_op_poll,
2525 .fini = efx_port_dummy_op_void,
2526 };
2527
2528 /**************************************************************************
2529 *
2530 * Data housekeeping
2531 *
2532 **************************************************************************/
2533
2534 /* This zeroes out and then fills in the invariants in a struct
2535 * efx_nic (including all sub-structures).
2536 */
2537 static int efx_init_struct(struct efx_nic *efx,
2538 struct pci_dev *pci_dev, struct net_device *net_dev)
2539 {
2540 int i;
2541
2542 /* Initialise common structures */
2543 spin_lock_init(&efx->biu_lock);
2544 #ifdef CONFIG_SFC_MTD
2545 INIT_LIST_HEAD(&efx->mtd_list);
2546 #endif
2547 INIT_WORK(&efx->reset_work, efx_reset_work);
2548 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2549 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2550 efx->pci_dev = pci_dev;
2551 efx->msg_enable = debug;
2552 efx->state = STATE_UNINIT;
2553 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2554
2555 efx->net_dev = net_dev;
2556 efx->rx_prefix_size = efx->type->rx_prefix_size;
2557 efx->rx_ip_align =
2558 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2559 efx->rx_packet_hash_offset =
2560 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2561 spin_lock_init(&efx->stats_lock);
2562 mutex_init(&efx->mac_lock);
2563 efx->phy_op = &efx_dummy_phy_operations;
2564 efx->mdio.dev = net_dev;
2565 INIT_WORK(&efx->mac_work, efx_mac_work);
2566 init_waitqueue_head(&efx->flush_wq);
2567
2568 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2569 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2570 if (!efx->channel[i])
2571 goto fail;
2572 efx->msi_context[i].efx = efx;
2573 efx->msi_context[i].index = i;
2574 }
2575
2576 /* Higher numbered interrupt modes are less capable! */
2577 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2578 interrupt_mode);
2579
2580 /* Would be good to use the net_dev name, but we're too early */
2581 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2582 pci_name(pci_dev));
2583 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2584 if (!efx->workqueue)
2585 goto fail;
2586
2587 return 0;
2588
2589 fail:
2590 efx_fini_struct(efx);
2591 return -ENOMEM;
2592 }
2593
2594 static void efx_fini_struct(struct efx_nic *efx)
2595 {
2596 int i;
2597
2598 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2599 kfree(efx->channel[i]);
2600
2601 if (efx->workqueue) {
2602 destroy_workqueue(efx->workqueue);
2603 efx->workqueue = NULL;
2604 }
2605 }
2606
2607 /**************************************************************************
2608 *
2609 * PCI interface
2610 *
2611 **************************************************************************/
2612
2613 /* Main body of final NIC shutdown code
2614 * This is called only at module unload (or hotplug removal).
2615 */
2616 static void efx_pci_remove_main(struct efx_nic *efx)
2617 {
2618 /* Flush reset_work. It can no longer be scheduled since we
2619 * are not READY.
2620 */
2621 BUG_ON(efx->state == STATE_READY);
2622 cancel_work_sync(&efx->reset_work);
2623
2624 efx_disable_interrupts(efx);
2625 efx_nic_fini_interrupt(efx);
2626 efx_fini_port(efx);
2627 efx->type->fini(efx);
2628 efx_fini_napi(efx);
2629 efx_remove_all(efx);
2630 }
2631
2632 /* Final NIC shutdown
2633 * This is called only at module unload (or hotplug removal).
2634 */
2635 static void efx_pci_remove(struct pci_dev *pci_dev)
2636 {
2637 struct efx_nic *efx;
2638
2639 efx = pci_get_drvdata(pci_dev);
2640 if (!efx)
2641 return;
2642
2643 /* Mark the NIC as fini, then stop the interface */
2644 rtnl_lock();
2645 dev_close(efx->net_dev);
2646 efx_disable_interrupts(efx);
2647 rtnl_unlock();
2648
2649 efx_sriov_fini(efx);
2650 efx_unregister_netdev(efx);
2651
2652 efx_mtd_remove(efx);
2653
2654 efx_pci_remove_main(efx);
2655
2656 efx_fini_io(efx);
2657 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2658
2659 efx_fini_struct(efx);
2660 pci_set_drvdata(pci_dev, NULL);
2661 free_netdev(efx->net_dev);
2662
2663 pci_disable_pcie_error_reporting(pci_dev);
2664 };
2665
2666 /* NIC VPD information
2667 * Called during probe to display the part number of the
2668 * installed NIC. VPD is potentially very large but this should
2669 * always appear within the first 512 bytes.
2670 */
2671 #define SFC_VPD_LEN 512
2672 static void efx_print_product_vpd(struct efx_nic *efx)
2673 {
2674 struct pci_dev *dev = efx->pci_dev;
2675 char vpd_data[SFC_VPD_LEN];
2676 ssize_t vpd_size;
2677 int i, j;
2678
2679 /* Get the vpd data from the device */
2680 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2681 if (vpd_size <= 0) {
2682 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2683 return;
2684 }
2685
2686 /* Get the Read only section */
2687 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2688 if (i < 0) {
2689 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2690 return;
2691 }
2692
2693 j = pci_vpd_lrdt_size(&vpd_data[i]);
2694 i += PCI_VPD_LRDT_TAG_SIZE;
2695 if (i + j > vpd_size)
2696 j = vpd_size - i;
2697
2698 /* Get the Part number */
2699 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2700 if (i < 0) {
2701 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2702 return;
2703 }
2704
2705 j = pci_vpd_info_field_size(&vpd_data[i]);
2706 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2707 if (i + j > vpd_size) {
2708 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2709 return;
2710 }
2711
2712 netif_info(efx, drv, efx->net_dev,
2713 "Part Number : %.*s\n", j, &vpd_data[i]);
2714 }
2715
2716
2717 /* Main body of NIC initialisation
2718 * This is called at module load (or hotplug insertion, theoretically).
2719 */
2720 static int efx_pci_probe_main(struct efx_nic *efx)
2721 {
2722 int rc;
2723
2724 /* Do start-of-day initialisation */
2725 rc = efx_probe_all(efx);
2726 if (rc)
2727 goto fail1;
2728
2729 efx_init_napi(efx);
2730
2731 rc = efx->type->init(efx);
2732 if (rc) {
2733 netif_err(efx, probe, efx->net_dev,
2734 "failed to initialise NIC\n");
2735 goto fail3;
2736 }
2737
2738 rc = efx_init_port(efx);
2739 if (rc) {
2740 netif_err(efx, probe, efx->net_dev,
2741 "failed to initialise port\n");
2742 goto fail4;
2743 }
2744
2745 rc = efx_nic_init_interrupt(efx);
2746 if (rc)
2747 goto fail5;
2748 rc = efx_enable_interrupts(efx);
2749 if (rc)
2750 goto fail6;
2751
2752 return 0;
2753
2754 fail6:
2755 efx_nic_fini_interrupt(efx);
2756 fail5:
2757 efx_fini_port(efx);
2758 fail4:
2759 efx->type->fini(efx);
2760 fail3:
2761 efx_fini_napi(efx);
2762 efx_remove_all(efx);
2763 fail1:
2764 return rc;
2765 }
2766
2767 /* NIC initialisation
2768 *
2769 * This is called at module load (or hotplug insertion,
2770 * theoretically). It sets up PCI mappings, resets the NIC,
2771 * sets up and registers the network devices with the kernel and hooks
2772 * the interrupt service routine. It does not prepare the device for
2773 * transmission; this is left to the first time one of the network
2774 * interfaces is brought up (i.e. efx_net_open).
2775 */
2776 static int efx_pci_probe(struct pci_dev *pci_dev,
2777 const struct pci_device_id *entry)
2778 {
2779 struct net_device *net_dev;
2780 struct efx_nic *efx;
2781 int rc;
2782
2783 /* Allocate and initialise a struct net_device and struct efx_nic */
2784 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2785 EFX_MAX_RX_QUEUES);
2786 if (!net_dev)
2787 return -ENOMEM;
2788 efx = netdev_priv(net_dev);
2789 efx->type = (const struct efx_nic_type *) entry->driver_data;
2790 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2791 NETIF_F_HIGHDMA | NETIF_F_TSO |
2792 NETIF_F_RXCSUM);
2793 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2794 net_dev->features |= NETIF_F_TSO6;
2795 /* Mask for features that also apply to VLAN devices */
2796 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2797 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2798 NETIF_F_RXCSUM);
2799 /* All offloads can be toggled */
2800 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2801 pci_set_drvdata(pci_dev, efx);
2802 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2803 rc = efx_init_struct(efx, pci_dev, net_dev);
2804 if (rc)
2805 goto fail1;
2806
2807 netif_info(efx, probe, efx->net_dev,
2808 "Solarflare NIC detected\n");
2809
2810 efx_print_product_vpd(efx);
2811
2812 /* Set up basic I/O (BAR mappings etc) */
2813 rc = efx_init_io(efx);
2814 if (rc)
2815 goto fail2;
2816
2817 rc = efx_pci_probe_main(efx);
2818 if (rc)
2819 goto fail3;
2820
2821 rc = efx_register_netdev(efx);
2822 if (rc)
2823 goto fail4;
2824
2825 rc = efx_sriov_init(efx);
2826 if (rc)
2827 netif_err(efx, probe, efx->net_dev,
2828 "SR-IOV can't be enabled rc %d\n", rc);
2829
2830 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2831
2832 /* Try to create MTDs, but allow this to fail */
2833 rtnl_lock();
2834 rc = efx_mtd_probe(efx);
2835 rtnl_unlock();
2836 if (rc)
2837 netif_warn(efx, probe, efx->net_dev,
2838 "failed to create MTDs (%d)\n", rc);
2839
2840 rc = pci_enable_pcie_error_reporting(pci_dev);
2841 if (rc && rc != -EINVAL)
2842 netif_warn(efx, probe, efx->net_dev,
2843 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2844
2845 return 0;
2846
2847 fail4:
2848 efx_pci_remove_main(efx);
2849 fail3:
2850 efx_fini_io(efx);
2851 fail2:
2852 efx_fini_struct(efx);
2853 fail1:
2854 pci_set_drvdata(pci_dev, NULL);
2855 WARN_ON(rc > 0);
2856 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2857 free_netdev(net_dev);
2858 return rc;
2859 }
2860
2861 static int efx_pm_freeze(struct device *dev)
2862 {
2863 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2864
2865 rtnl_lock();
2866
2867 if (efx->state != STATE_DISABLED) {
2868 efx->state = STATE_UNINIT;
2869
2870 efx_device_detach_sync(efx);
2871
2872 efx_stop_all(efx);
2873 efx_disable_interrupts(efx);
2874 }
2875
2876 rtnl_unlock();
2877
2878 return 0;
2879 }
2880
2881 static int efx_pm_thaw(struct device *dev)
2882 {
2883 int rc;
2884 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2885
2886 rtnl_lock();
2887
2888 if (efx->state != STATE_DISABLED) {
2889 rc = efx_enable_interrupts(efx);
2890 if (rc)
2891 goto fail;
2892
2893 mutex_lock(&efx->mac_lock);
2894 efx->phy_op->reconfigure(efx);
2895 mutex_unlock(&efx->mac_lock);
2896
2897 efx_start_all(efx);
2898
2899 netif_device_attach(efx->net_dev);
2900
2901 efx->state = STATE_READY;
2902
2903 efx->type->resume_wol(efx);
2904 }
2905
2906 rtnl_unlock();
2907
2908 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2909 queue_work(reset_workqueue, &efx->reset_work);
2910
2911 return 0;
2912
2913 fail:
2914 rtnl_unlock();
2915
2916 return rc;
2917 }
2918
2919 static int efx_pm_poweroff(struct device *dev)
2920 {
2921 struct pci_dev *pci_dev = to_pci_dev(dev);
2922 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2923
2924 efx->type->fini(efx);
2925
2926 efx->reset_pending = 0;
2927
2928 pci_save_state(pci_dev);
2929 return pci_set_power_state(pci_dev, PCI_D3hot);
2930 }
2931
2932 /* Used for both resume and restore */
2933 static int efx_pm_resume(struct device *dev)
2934 {
2935 struct pci_dev *pci_dev = to_pci_dev(dev);
2936 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2937 int rc;
2938
2939 rc = pci_set_power_state(pci_dev, PCI_D0);
2940 if (rc)
2941 return rc;
2942 pci_restore_state(pci_dev);
2943 rc = pci_enable_device(pci_dev);
2944 if (rc)
2945 return rc;
2946 pci_set_master(efx->pci_dev);
2947 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2948 if (rc)
2949 return rc;
2950 rc = efx->type->init(efx);
2951 if (rc)
2952 return rc;
2953 rc = efx_pm_thaw(dev);
2954 return rc;
2955 }
2956
2957 static int efx_pm_suspend(struct device *dev)
2958 {
2959 int rc;
2960
2961 efx_pm_freeze(dev);
2962 rc = efx_pm_poweroff(dev);
2963 if (rc)
2964 efx_pm_resume(dev);
2965 return rc;
2966 }
2967
2968 static const struct dev_pm_ops efx_pm_ops = {
2969 .suspend = efx_pm_suspend,
2970 .resume = efx_pm_resume,
2971 .freeze = efx_pm_freeze,
2972 .thaw = efx_pm_thaw,
2973 .poweroff = efx_pm_poweroff,
2974 .restore = efx_pm_resume,
2975 };
2976
2977 /* A PCI error affecting this device was detected.
2978 * At this point MMIO and DMA may be disabled.
2979 * Stop the software path and request a slot reset.
2980 */
2981 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2982 enum pci_channel_state state)
2983 {
2984 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2985 struct efx_nic *efx = pci_get_drvdata(pdev);
2986
2987 if (state == pci_channel_io_perm_failure)
2988 return PCI_ERS_RESULT_DISCONNECT;
2989
2990 rtnl_lock();
2991
2992 if (efx->state != STATE_DISABLED) {
2993 efx->state = STATE_RECOVERY;
2994 efx->reset_pending = 0;
2995
2996 efx_device_detach_sync(efx);
2997
2998 efx_stop_all(efx);
2999 efx_disable_interrupts(efx);
3000
3001 status = PCI_ERS_RESULT_NEED_RESET;
3002 } else {
3003 /* If the interface is disabled we don't want to do anything
3004 * with it.
3005 */
3006 status = PCI_ERS_RESULT_RECOVERED;
3007 }
3008
3009 rtnl_unlock();
3010
3011 pci_disable_device(pdev);
3012
3013 return status;
3014 }
3015
3016 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3017 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3018 {
3019 struct efx_nic *efx = pci_get_drvdata(pdev);
3020 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3021 int rc;
3022
3023 if (pci_enable_device(pdev)) {
3024 netif_err(efx, hw, efx->net_dev,
3025 "Cannot re-enable PCI device after reset.\n");
3026 status = PCI_ERS_RESULT_DISCONNECT;
3027 }
3028
3029 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3030 if (rc) {
3031 netif_err(efx, hw, efx->net_dev,
3032 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3033 /* Non-fatal error. Continue. */
3034 }
3035
3036 return status;
3037 }
3038
3039 /* Perform the actual reset and resume I/O operations. */
3040 static void efx_io_resume(struct pci_dev *pdev)
3041 {
3042 struct efx_nic *efx = pci_get_drvdata(pdev);
3043 int rc;
3044
3045 rtnl_lock();
3046
3047 if (efx->state == STATE_DISABLED)
3048 goto out;
3049
3050 rc = efx_reset(efx, RESET_TYPE_ALL);
3051 if (rc) {
3052 netif_err(efx, hw, efx->net_dev,
3053 "efx_reset failed after PCI error (%d)\n", rc);
3054 } else {
3055 efx->state = STATE_READY;
3056 netif_dbg(efx, hw, efx->net_dev,
3057 "Done resetting and resuming IO after PCI error.\n");
3058 }
3059
3060 out:
3061 rtnl_unlock();
3062 }
3063
3064 /* For simplicity and reliability, we always require a slot reset and try to
3065 * reset the hardware when a pci error affecting the device is detected.
3066 * We leave both the link_reset and mmio_enabled callback unimplemented:
3067 * with our request for slot reset the mmio_enabled callback will never be
3068 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3069 */
3070 static struct pci_error_handlers efx_err_handlers = {
3071 .error_detected = efx_io_error_detected,
3072 .slot_reset = efx_io_slot_reset,
3073 .resume = efx_io_resume,
3074 };
3075
3076 static struct pci_driver efx_pci_driver = {
3077 .name = KBUILD_MODNAME,
3078 .id_table = efx_pci_table,
3079 .probe = efx_pci_probe,
3080 .remove = efx_pci_remove,
3081 .driver.pm = &efx_pm_ops,
3082 .err_handler = &efx_err_handlers,
3083 };
3084
3085 /**************************************************************************
3086 *
3087 * Kernel module interface
3088 *
3089 *************************************************************************/
3090
3091 module_param(interrupt_mode, uint, 0444);
3092 MODULE_PARM_DESC(interrupt_mode,
3093 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3094
3095 static int __init efx_init_module(void)
3096 {
3097 int rc;
3098
3099 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3100
3101 rc = register_netdevice_notifier(&efx_netdev_notifier);
3102 if (rc)
3103 goto err_notifier;
3104
3105 rc = efx_init_sriov();
3106 if (rc)
3107 goto err_sriov;
3108
3109 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3110 if (!reset_workqueue) {
3111 rc = -ENOMEM;
3112 goto err_reset;
3113 }
3114
3115 rc = pci_register_driver(&efx_pci_driver);
3116 if (rc < 0)
3117 goto err_pci;
3118
3119 return 0;
3120
3121 err_pci:
3122 destroy_workqueue(reset_workqueue);
3123 err_reset:
3124 efx_fini_sriov();
3125 err_sriov:
3126 unregister_netdevice_notifier(&efx_netdev_notifier);
3127 err_notifier:
3128 return rc;
3129 }
3130
3131 static void __exit efx_exit_module(void)
3132 {
3133 printk(KERN_INFO "Solarflare NET driver unloading\n");
3134
3135 pci_unregister_driver(&efx_pci_driver);
3136 destroy_workqueue(reset_workqueue);
3137 efx_fini_sriov();
3138 unregister_netdevice_notifier(&efx_netdev_notifier);
3139
3140 }
3141
3142 module_init(efx_init_module);
3143 module_exit(efx_exit_module);
3144
3145 MODULE_AUTHOR("Solarflare Communications and "
3146 "Michael Brown <mbrown@fensystems.co.uk>");
3147 MODULE_DESCRIPTION("Solarflare Communications network driver");
3148 MODULE_LICENSE("GPL");
3149 MODULE_DEVICE_TABLE(pci, efx_pci_table);
Linux with added FPC-III support