drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef _BRCM_SDH_H_
  18 #define _BRCM_SDH_H_
  19
  20 #include <linux/skbuff.h>
  21
  22 #define SDIO_FUNC_0             0
  23 #define SDIO_FUNC_1             1
  24 #define SDIO_FUNC_2             2
  25
  26 #define SDIOD_FBR_SIZE          0x100
  27
  28 /* io_en */
  29 #define SDIO_FUNC_ENABLE_1      0x02
  30 #define SDIO_FUNC_ENABLE_2      0x04
  31
  32 /* io_rdys */
  33 #define SDIO_FUNC_READY_1       0x02
  34 #define SDIO_FUNC_READY_2       0x04
  35
  36 /* intr_status */
  37 #define INTR_STATUS_FUNC1       0x2
  38 #define INTR_STATUS_FUNC2       0x4
  39
  40 /* Maximum number of I/O funcs */
  41 #define SDIOD_MAX_IOFUNCS       7
  42
  43 /* mask of register map */
  44 #define REG_F0_REG_MASK         0x7FF
  45 #define REG_F1_MISC_MASK        0x1FFFF
  46
  47 /* as of sdiod rev 0, supports 3 functions */
  48 #define SBSDIO_NUM_FUNCTION             3
  49
  50 /* function 0 vendor specific CCCR registers */
  51 #define SDIO_CCCR_BRCM_CARDCAP                  0xf0
  52 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT    0x02
  53 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT        0x04
  54 #define SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC        0x08
  55 #define SDIO_CCCR_BRCM_CARDCTRL         0xf1
  56 #define SDIO_CCCR_BRCM_CARDCTRL_WLANRESET       0x02
  57 #define SDIO_CCCR_BRCM_SEPINT                   0xf2
  58
  59 #define  SDIO_SEPINT_MASK               0x01
  60 #define  SDIO_SEPINT_OE                 0x02
  61 #define  SDIO_SEPINT_ACT_HI             0x04
  62
  63 /* function 1 miscellaneous registers */
  64
  65 /* sprom command and status */
  66 #define SBSDIO_SPROM_CS                 0x10000
  67 /* sprom info register */
  68 #define SBSDIO_SPROM_INFO               0x10001
  69 /* sprom indirect access data byte 0 */
  70 #define SBSDIO_SPROM_DATA_LOW           0x10002
  71 /* sprom indirect access data byte 1 */
  72 #define SBSDIO_SPROM_DATA_HIGH          0x10003
  73 /* sprom indirect access addr byte 0 */
  74 #define SBSDIO_SPROM_ADDR_LOW           0x10004
  75 /* sprom indirect access addr byte 0 */
  76 #define SBSDIO_SPROM_ADDR_HIGH          0x10005
  77 /* xtal_pu (gpio) output */
  78 #define SBSDIO_CHIP_CTRL_DATA           0x10006
  79 /* xtal_pu (gpio) enable */
  80 #define SBSDIO_CHIP_CTRL_EN             0x10007
  81 /* rev < 7, watermark for sdio device */
  82 #define SBSDIO_WATERMARK                0x10008
  83 /* control busy signal generation */
  84 #define SBSDIO_DEVICE_CTL               0x10009
  85
  86 /* SB Address Window Low (b15) */
  87 #define SBSDIO_FUNC1_SBADDRLOW          0x1000A
  88 /* SB Address Window Mid (b23:b16) */
  89 #define SBSDIO_FUNC1_SBADDRMID          0x1000B
  90 /* SB Address Window High (b31:b24)    */
  91 #define SBSDIO_FUNC1_SBADDRHIGH         0x1000C
  92 /* Frame Control (frame term/abort) */
  93 #define SBSDIO_FUNC1_FRAMECTRL          0x1000D
  94 /* ChipClockCSR (ALP/HT ctl/status) */
  95 #define SBSDIO_FUNC1_CHIPCLKCSR         0x1000E
  96 /* SdioPullUp (on cmd, d0-d2) */
  97 #define SBSDIO_FUNC1_SDIOPULLUP         0x1000F
  98 /* Write Frame Byte Count Low */
  99 #define SBSDIO_FUNC1_WFRAMEBCLO         0x10019
 100 /* Write Frame Byte Count High */
 101 #define SBSDIO_FUNC1_WFRAMEBCHI         0x1001A
 102 /* Read Frame Byte Count Low */
 103 #define SBSDIO_FUNC1_RFRAMEBCLO         0x1001B
 104 /* Read Frame Byte Count High */
 105 #define SBSDIO_FUNC1_RFRAMEBCHI         0x1001C
 106 /* MesBusyCtl (rev 11) */
 107 #define SBSDIO_FUNC1_MESBUSYCTRL        0x1001D
 108 /* Sdio Core Rev 12 */
 109 #define SBSDIO_FUNC1_WAKEUPCTRL         0x1001E
 110 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK         0x1
 111 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT        0
 112 #define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK          0x2
 113 #define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT         1
 114 #define SBSDIO_FUNC1_SLEEPCSR           0x1001F
 115 #define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK          0x1
 116 #define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT         0
 117 #define SBSDIO_FUNC1_SLEEPCSR_KSO_EN            1
 118 #define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK        0x2
 119 #define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT       1
 120
 121 #define SBSDIO_FUNC1_MISC_REG_START     0x10000 /* f1 misc register start */
 122 #define SBSDIO_FUNC1_MISC_REG_LIMIT     0x1001F /* f1 misc register end */
 123
 124 /* function 1 OCP space */
 125
 126 /* sb offset addr is <= 15 bits, 32k */
 127 #define SBSDIO_SB_OFT_ADDR_MASK         0x07FFF
 128 #define SBSDIO_SB_OFT_ADDR_LIMIT        0x08000
 129 /* with b15, maps to 32-bit SB access */
 130 #define SBSDIO_SB_ACCESS_2_4B_FLAG      0x08000
 131
 132 /* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
 133
 134 #define SBSDIO_SBADDRLOW_MASK           0x80    /* Valid bits in SBADDRLOW */
 135 #define SBSDIO_SBADDRMID_MASK           0xff    /* Valid bits in SBADDRMID */
 136 #define SBSDIO_SBADDRHIGH_MASK          0xffU   /* Valid bits in SBADDRHIGH */
 137 /* Address bits from SBADDR regs */
 138 #define SBSDIO_SBWINDOW_MASK            0xffff8000
 139
 140 #define SDIOH_READ              0       /* Read request */
 141 #define SDIOH_WRITE             1       /* Write request */
 142
 143 #define SDIOH_DATA_FIX          0       /* Fixed addressing */
 144 #define SDIOH_DATA_INC          1       /* Incremental addressing */
 145
 146 /* internal return code */
 147 #define SUCCESS 0
 148 #define ERROR   1
 149
 150 /* Packet alignment for most efficient SDIO (can change based on platform) */
 151 #define BRCMF_SDALIGN   (1 << 6)
 152
 153 /* watchdog polling interval in ms */
 154 #define BRCMF_WD_POLL_MS        10
 155
 156 struct brcmf_sdreg {
 157         int func;
 158         int offset;
 159         int value;
 160 };
 161
 162 struct brcmf_sdio;
 163
 164 struct brcmf_sdio_dev {
 165         struct sdio_func *func[SDIO_MAX_FUNCS];
 166         u8 num_funcs;                   /* Supported funcs on client */
 167         u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
 168         u32 sbwad;                      /* Save backplane window address */
 169         void *bus;
 170         atomic_t suspend;               /* suspend flag */
 171         wait_queue_head_t request_byte_wait;
 172         wait_queue_head_t request_word_wait;
 173         wait_queue_head_t request_buffer_wait;
 174         struct device *dev;
 175         struct brcmf_bus *bus_if;
 176         struct brcmfmac_sdio_platform_data *pdata;
 177         bool oob_irq_requested;
 178         bool irq_en;                    /* irq enable flags */
 179         spinlock_t irq_en_lock;
 180         bool irq_wake;                  /* irq wake enable flags */
 181 };
 182
 183 /* Register/deregister interrupt handler. */
 184 extern int brcmf_sdio_intr_register(struct brcmf_sdio_dev *sdiodev);
 185 extern int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev *sdiodev);
 186
 187 /* sdio device register access interface */
 188 extern u8 brcmf_sdio_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
 189 extern u32 brcmf_sdio_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
 190 extern void brcmf_sdio_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,
 191                              u8 data, int *ret);
 192 extern void brcmf_sdio_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,
 193                              u32 data, int *ret);
 194 extern int brcmf_sdio_regrw_helper(struct brcmf_sdio_dev *sdiodev, u32 addr,
 195                                    void *data, bool write);
 196
 197 /* Buffer transfer to/from device (client) core via cmd53.
 198  *   fn:       function number
 199  *   addr:     backplane address (i.e. >= regsva from attach)
 200  *   flags:    backplane width, address increment, sync/async
 201  *   buf:      pointer to memory data buffer
 202  *   nbytes:   number of bytes to transfer to/from buf
 203  *   pkt:      pointer to packet associated with buf (if any)
 204  *   complete: callback function for command completion (async only)
 205  *   handle:   handle for completion callback (first arg in callback)
 206  * Returns 0 or error code.
 207  * NOTE: Async operation is not currently supported.
 208  */
 209 extern int
 210 brcmf_sdcard_send_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
 211                       uint flags, struct sk_buff_head *pktq);
 212 extern int
 213 brcmf_sdcard_send_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
 214                       uint flags, u8 *buf, uint nbytes);
 215
 216 extern int
 217 brcmf_sdcard_recv_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
 218                       uint flags, struct sk_buff *pkt);
 219 extern int
 220 brcmf_sdcard_recv_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
 221                       uint flags, u8 *buf, uint nbytes);
 222 extern int
 223 brcmf_sdcard_recv_chain(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
 224                         uint flags, struct sk_buff_head *pktq);
 225
 226 /* Flags bits */
 227
 228 /* Four-byte target (backplane) width (vs. two-byte) */
 229 #define SDIO_REQ_4BYTE  0x1
 230 /* Fixed address (FIFO) (vs. incrementing address) */
 231 #define SDIO_REQ_FIXED  0x2
 232
 233 /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
 234  *   rw:       read or write (0/1)
 235  *   addr:     direct SDIO address
 236  *   buf:      pointer to memory data buffer
 237  *   nbytes:   number of bytes to transfer to/from buf
 238  * Returns 0 or error code.
 239  */
 240 extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev *sdiodev, uint rw,
 241                                u32 addr, u8 *buf, uint nbytes);
 242 extern int brcmf_sdio_ramrw(struct brcmf_sdio_dev *sdiodev, bool write,
 243                             u32 address, u8 *data, uint size);
 244
 245 /* Issue an abort to the specified function */
 246 extern int brcmf_sdcard_abort(struct brcmf_sdio_dev *sdiodev, uint fn);
 247
 248 /* platform specific/high level functions */
 249 extern int brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev);
 250 extern int brcmf_sdio_remove(struct brcmf_sdio_dev *sdiodev);
 251
 252 /* attach, return handler on success, NULL if failed.
 253  *  The handler shall be provided by all subsequent calls. No local cache
 254  *  cfghdl points to the starting address of pci device mapped memory
 255  */
 256 extern int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev);
 257 extern void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev);
 258
 259 /* read or write one byte using cmd52 */
 260 extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw,
 261                                     uint fnc, uint addr, u8 *byte);
 262
 263 /* read or write 2/4 bytes using cmd53 */
 264 extern int
 265 brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
 266                          uint rw, uint fnc, uint addr,
 267                          u32 *word, uint nbyte);
 268
 269 /* Watchdog timer interface for pm ops */
 270 extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev *sdiodev,
 271                                     bool enable);
 272
 273 extern void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev);
 274 extern void brcmf_sdbrcm_disconnect(void *ptr);
 275 extern void brcmf_sdbrcm_isr(void *arg);
 276
 277 extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick);
 278
 279 extern void brcmf_pm_resume_wait(struct brcmf_sdio_dev *sdiodev,
 280                                  wait_queue_head_t *wq);
 281 extern bool brcmf_pm_resume_error(struct brcmf_sdio_dev *sdiodev);
 282 #endif                          /* _BRCM_SDH_H_ */