x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / s390 / net / ctcm_fsms.h
blobc963d04799c0a21393bc77acc50f87f176358d2b
1 /*
2 * Copyright IBM Corp. 2001, 2007
3 * Authors: Fritz Elfert (felfert@millenux.com)
4 * Peter Tiedemann (ptiedem@de.ibm.com)
5 * MPC additions :
6 * Belinda Thompson (belindat@us.ibm.com)
7 * Andy Richter (richtera@us.ibm.com)
8 */
9 #ifndef _CTCM_FSMS_H_
10 #define _CTCM_FSMS_H_
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/slab.h>
16 #include <linux/errno.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/timer.h>
20 #include <linux/bitops.h>
22 #include <linux/signal.h>
23 #include <linux/string.h>
25 #include <linux/ip.h>
26 #include <linux/if_arp.h>
27 #include <linux/tcp.h>
28 #include <linux/skbuff.h>
29 #include <linux/ctype.h>
30 #include <net/dst.h>
32 #include <linux/io.h>
33 #include <asm/ccwdev.h>
34 #include <asm/ccwgroup.h>
35 #include <linux/uaccess.h>
37 #include <asm/idals.h>
39 #include "fsm.h"
40 #include "ctcm_main.h"
43 * Definitions for the channel statemachine(s) for ctc and ctcmpc
45 * To allow better kerntyping, prefix-less definitions for channel states
46 * and channel events have been replaced :
47 * ch_event... -> ctc_ch_event...
48 * CH_EVENT... -> CTC_EVENT...
49 * ch_state... -> ctc_ch_state...
50 * CH_STATE... -> CTC_STATE...
53 * Events of the channel statemachine(s) for ctc and ctcmpc
55 enum ctc_ch_events {
57 * Events, representing return code of
58 * I/O operations (ccw_device_start, ccw_device_halt et al.)
60 CTC_EVENT_IO_SUCCESS,
61 CTC_EVENT_IO_EBUSY,
62 CTC_EVENT_IO_ENODEV,
63 CTC_EVENT_IO_UNKNOWN,
65 CTC_EVENT_ATTNBUSY,
66 CTC_EVENT_ATTN,
67 CTC_EVENT_BUSY,
69 * Events, representing unit-check
71 CTC_EVENT_UC_RCRESET,
72 CTC_EVENT_UC_RSRESET,
73 CTC_EVENT_UC_TXTIMEOUT,
74 CTC_EVENT_UC_TXPARITY,
75 CTC_EVENT_UC_HWFAIL,
76 CTC_EVENT_UC_RXPARITY,
77 CTC_EVENT_UC_ZERO,
78 CTC_EVENT_UC_UNKNOWN,
80 * Events, representing subchannel-check
82 CTC_EVENT_SC_UNKNOWN,
84 * Events, representing machine checks
86 CTC_EVENT_MC_FAIL,
87 CTC_EVENT_MC_GOOD,
89 * Event, representing normal IRQ
91 CTC_EVENT_IRQ,
92 CTC_EVENT_FINSTAT,
94 * Event, representing timer expiry.
96 CTC_EVENT_TIMER,
98 * Events, representing commands from upper levels.
100 CTC_EVENT_START,
101 CTC_EVENT_STOP,
102 CTC_NR_EVENTS,
104 * additional MPC events
106 CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
107 CTC_EVENT_RSWEEP_TIMER,
109 * MUST be always the last element!!
111 CTC_MPC_NR_EVENTS,
115 * States of the channel statemachine(s) for ctc and ctcmpc.
117 enum ctc_ch_states {
119 * Channel not assigned to any device,
120 * initial state, direction invalid
122 CTC_STATE_IDLE,
124 * Channel assigned but not operating
126 CTC_STATE_STOPPED,
127 CTC_STATE_STARTWAIT,
128 CTC_STATE_STARTRETRY,
129 CTC_STATE_SETUPWAIT,
130 CTC_STATE_RXINIT,
131 CTC_STATE_TXINIT,
132 CTC_STATE_RX,
133 CTC_STATE_TX,
134 CTC_STATE_RXIDLE,
135 CTC_STATE_TXIDLE,
136 CTC_STATE_RXERR,
137 CTC_STATE_TXERR,
138 CTC_STATE_TERM,
139 CTC_STATE_DTERM,
140 CTC_STATE_NOTOP,
141 CTC_NR_STATES, /* MUST be the last element of non-expanded states */
143 * additional MPC states
145 CH_XID0_PENDING = CTC_NR_STATES,
146 CH_XID0_INPROGRESS,
147 CH_XID7_PENDING,
148 CH_XID7_PENDING1,
149 CH_XID7_PENDING2,
150 CH_XID7_PENDING3,
151 CH_XID7_PENDING4,
152 CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
155 extern const char *ctc_ch_event_names[];
157 extern const char *ctc_ch_state_names[];
159 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
160 void ctcm_purge_skb_queue(struct sk_buff_head *q);
161 void fsm_action_nop(fsm_instance *fi, int event, void *arg);
164 * ----- non-static actions for ctcm channel statemachine -----
167 void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
170 * ----- FSM (state/event/action) of the ctcm channel statemachine -----
172 extern const fsm_node ch_fsm[];
173 extern int ch_fsm_len;
177 * ----- non-static actions for ctcmpc channel statemachine ----
180 /* shared :
181 void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
183 void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
186 * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
188 extern const fsm_node ctcmpc_ch_fsm[];
189 extern int mpc_ch_fsm_len;
192 * Definitions for the device interface statemachine for ctc and mpc
196 * States of the device interface statemachine.
198 enum dev_states {
199 DEV_STATE_STOPPED,
200 DEV_STATE_STARTWAIT_RXTX,
201 DEV_STATE_STARTWAIT_RX,
202 DEV_STATE_STARTWAIT_TX,
203 DEV_STATE_STOPWAIT_RXTX,
204 DEV_STATE_STOPWAIT_RX,
205 DEV_STATE_STOPWAIT_TX,
206 DEV_STATE_RUNNING,
208 * MUST be always the last element!!
210 CTCM_NR_DEV_STATES
213 extern const char *dev_state_names[];
216 * Events of the device interface statemachine.
217 * ctcm and ctcmpc
219 enum dev_events {
220 DEV_EVENT_START,
221 DEV_EVENT_STOP,
222 DEV_EVENT_RXUP,
223 DEV_EVENT_TXUP,
224 DEV_EVENT_RXDOWN,
225 DEV_EVENT_TXDOWN,
226 DEV_EVENT_RESTART,
228 * MUST be always the last element!!
230 CTCM_NR_DEV_EVENTS
233 extern const char *dev_event_names[];
236 * Actions for the device interface statemachine.
237 * ctc and ctcmpc
240 static void dev_action_start(fsm_instance * fi, int event, void *arg);
241 static void dev_action_stop(fsm_instance * fi, int event, void *arg);
242 static void dev_action_restart(fsm_instance *fi, int event, void *arg);
243 static void dev_action_chup(fsm_instance * fi, int event, void *arg);
244 static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
248 * The (state/event/action) fsm table of the device interface statemachine.
249 * ctcm and ctcmpc
251 extern const fsm_node dev_fsm[];
252 extern int dev_fsm_len;
256 * Definitions for the MPC Group statemachine
260 * MPC Group Station FSM States
262 State Name When In This State
263 ====================== =======================================
264 MPCG_STATE_RESET Initial State When Driver Loaded
265 We receive and send NOTHING
267 MPCG_STATE_INOP INOP Received.
268 Group level non-recoverable error
270 MPCG_STATE_READY XID exchanges for at least 1 write and
271 1 read channel have completed.
272 Group is ready for data transfer.
274 States from ctc_mpc_alloc_channel
275 ==============================================================
276 MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation
277 ATTN from other side will start
278 XID negotiations.
279 Y-side protocol only.
281 MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.
282 At least 1, but not all, XID2(0)'s
283 have been received from partner.
285 MPCG_STATE_XID7INITW XID2(0) complete
286 No XID2(7)'s have yet been received.
287 XID2(7) negotiations pending.
289 MPCG_STATE_XID7INITX XID2(7) negotiations in progress.
290 At least 1, but not all, XID2(7)'s
291 have been received from partner.
293 MPCG_STATE_XID7INITF XID2(7) negotiations complete.
294 Transitioning to READY.
296 MPCG_STATE_READY Ready for Data Transfer.
299 States from ctc_mpc_establish_connectivity call
300 ==============================================================
301 MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.
302 X-side protocol only.
303 ATTN-BUSY from other side will convert
304 this to Y-side protocol and the
305 ctc_mpc_alloc_channel flow will begin.
307 MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.
308 At least 1, but not all, XID2(0)'s
309 have been received from partner.
311 MPCG_STATE_XID7INITI XID2(0) complete
312 No XID2(7)'s have yet been received.
313 XID2(7) negotiations pending.
315 MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.
316 At least 1, but not all, XID2(7)'s
317 have been received from partner.
319 MPCG_STATE_XID7INITF XID2(7) negotiations complete.
320 Transitioning to READY.
322 MPCG_STATE_READY Ready for Data Transfer.
326 enum mpcg_events {
327 MPCG_EVENT_INOP,
328 MPCG_EVENT_DISCONC,
329 MPCG_EVENT_XID0DO,
330 MPCG_EVENT_XID2,
331 MPCG_EVENT_XID2DONE,
332 MPCG_EVENT_XID7DONE,
333 MPCG_EVENT_TIMER,
334 MPCG_EVENT_DOIO,
335 MPCG_NR_EVENTS,
338 enum mpcg_states {
339 MPCG_STATE_RESET,
340 MPCG_STATE_INOP,
341 MPCG_STATE_XID2INITW,
342 MPCG_STATE_XID2INITX,
343 MPCG_STATE_XID7INITW,
344 MPCG_STATE_XID7INITX,
345 MPCG_STATE_XID0IOWAIT,
346 MPCG_STATE_XID0IOWAIX,
347 MPCG_STATE_XID7INITI,
348 MPCG_STATE_XID7INITZ,
349 MPCG_STATE_XID7INITF,
350 MPCG_STATE_FLOWC,
351 MPCG_STATE_READY,
352 MPCG_NR_STATES,
355 #endif
356 /* --- This is the END my friend --- */