x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / scsi / lpfc / lpfc_sli4.h
blob85120b77aa0e99aea4621c2204342a47e11ce5ef
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2013 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
21 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100
22 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
23 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
24 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
25 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
26 #define LPFC_RPI_LOW_WATER_MARK 10
28 #define LPFC_UNREG_FCF 1
29 #define LPFC_SKIP_UNREG_FCF 0
31 /* Amount of time in seconds for waiting FCF rediscovery to complete */
32 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
34 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
35 #define LPFC_NEMBED_MBOX_SGL_CNT 254
37 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
38 #define LPFC_FCP_IO_CHAN_DEF 4
39 #define LPFC_FCP_IO_CHAN_MIN 1
40 #define LPFC_FCP_IO_CHAN_MAX 16
43 * Provide the default FCF Record attributes used by the driver
44 * when nonFIP mode is configured and there is no other default
45 * FCF Record attributes.
47 #define LPFC_FCOE_FCF_DEF_INDEX 0
48 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
49 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
51 #define LPFC_FCOE_NULL_VID 0xFFF
52 #define LPFC_FCOE_IGNORE_VID 0xFFFF
54 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
55 #define LPFC_FCOE_FCF_MAC3 0xFF
56 #define LPFC_FCOE_FCF_MAC4 0xFF
57 #define LPFC_FCOE_FCF_MAC5 0xFE
58 #define LPFC_FCOE_FCF_MAP0 0x0E
59 #define LPFC_FCOE_FCF_MAP1 0xFC
60 #define LPFC_FCOE_FCF_MAP2 0x00
61 #define LPFC_FCOE_MAX_RCV_SIZE 0x800
62 #define LPFC_FCOE_FKA_ADV_PER 0
63 #define LPFC_FCOE_FIP_PRIORITY 0x80
65 #define sli4_sid_from_fc_hdr(fc_hdr) \
66 ((fc_hdr)->fh_s_id[0] << 16 | \
67 (fc_hdr)->fh_s_id[1] << 8 | \
68 (fc_hdr)->fh_s_id[2])
70 #define sli4_did_from_fc_hdr(fc_hdr) \
71 ((fc_hdr)->fh_d_id[0] << 16 | \
72 (fc_hdr)->fh_d_id[1] << 8 | \
73 (fc_hdr)->fh_d_id[2])
75 #define sli4_fctl_from_fc_hdr(fc_hdr) \
76 ((fc_hdr)->fh_f_ctl[0] << 16 | \
77 (fc_hdr)->fh_f_ctl[1] << 8 | \
78 (fc_hdr)->fh_f_ctl[2])
80 #define sli4_type_from_fc_hdr(fc_hdr) \
81 ((fc_hdr)->fh_type)
83 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
85 #define INT_FW_UPGRADE 0
86 #define RUN_FW_UPGRADE 1
88 enum lpfc_sli4_queue_type {
89 LPFC_EQ,
90 LPFC_GCQ,
91 LPFC_MCQ,
92 LPFC_WCQ,
93 LPFC_RCQ,
94 LPFC_MQ,
95 LPFC_WQ,
96 LPFC_HRQ,
97 LPFC_DRQ
100 /* The queue sub-type defines the functional purpose of the queue */
101 enum lpfc_sli4_queue_subtype {
102 LPFC_NONE,
103 LPFC_MBOX,
104 LPFC_FCP,
105 LPFC_ELS,
106 LPFC_USOL
109 union sli4_qe {
110 void *address;
111 struct lpfc_eqe *eqe;
112 struct lpfc_cqe *cqe;
113 struct lpfc_mcqe *mcqe;
114 struct lpfc_wcqe_complete *wcqe_complete;
115 struct lpfc_wcqe_release *wcqe_release;
116 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
117 struct lpfc_rcqe_complete *rcqe_complete;
118 struct lpfc_mqe *mqe;
119 union lpfc_wqe *wqe;
120 union lpfc_wqe128 *wqe128;
121 struct lpfc_rqe *rqe;
124 struct lpfc_queue {
125 struct list_head list;
126 enum lpfc_sli4_queue_type type;
127 enum lpfc_sli4_queue_subtype subtype;
128 struct lpfc_hba *phba;
129 struct list_head child_list;
130 uint32_t entry_count; /* Number of entries to support on the queue */
131 uint32_t entry_size; /* Size of each queue entry. */
132 uint32_t entry_repost; /* Count of entries before doorbell is rung */
133 #define LPFC_QUEUE_MIN_REPOST 8
134 uint32_t queue_id; /* Queue ID assigned by the hardware */
135 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
136 struct list_head page_list;
137 uint32_t page_count; /* Number of pages allocated for this queue */
138 uint32_t host_index; /* The host's index for putting or getting */
139 uint32_t hba_index; /* The last known hba index for get or put */
141 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
143 uint16_t db_format;
144 #define LPFC_DB_RING_FORMAT 0x01
145 #define LPFC_DB_LIST_FORMAT 0x02
146 void __iomem *db_regaddr;
147 /* For q stats */
148 uint32_t q_cnt_1;
149 uint32_t q_cnt_2;
150 uint32_t q_cnt_3;
151 uint64_t q_cnt_4;
152 /* defines for EQ stats */
153 #define EQ_max_eqe q_cnt_1
154 #define EQ_no_entry q_cnt_2
155 #define EQ_badstate q_cnt_3
156 #define EQ_processed q_cnt_4
158 /* defines for CQ stats */
159 #define CQ_mbox q_cnt_1
160 #define CQ_max_cqe q_cnt_1
161 #define CQ_release_wqe q_cnt_2
162 #define CQ_xri_aborted q_cnt_3
163 #define CQ_wq q_cnt_4
165 /* defines for WQ stats */
166 #define WQ_overflow q_cnt_1
167 #define WQ_posted q_cnt_4
169 /* defines for RQ stats */
170 #define RQ_no_posted_buf q_cnt_1
171 #define RQ_no_buf_found q_cnt_2
172 #define RQ_buf_trunc q_cnt_3
173 #define RQ_rcv_buf q_cnt_4
175 union sli4_qe qe[1]; /* array to index entries (must be last) */
178 struct lpfc_sli4_link {
179 uint16_t speed;
180 uint8_t duplex;
181 uint8_t status;
182 uint8_t type;
183 uint8_t number;
184 uint8_t fault;
185 uint16_t logical_speed;
186 uint16_t topology;
189 struct lpfc_fcf_rec {
190 uint8_t fabric_name[8];
191 uint8_t switch_name[8];
192 uint8_t mac_addr[6];
193 uint16_t fcf_indx;
194 uint32_t priority;
195 uint16_t vlan_id;
196 uint32_t addr_mode;
197 uint32_t flag;
198 #define BOOT_ENABLE 0x01
199 #define RECORD_VALID 0x02
202 struct lpfc_fcf_pri_rec {
203 uint16_t fcf_index;
204 #define LPFC_FCF_ON_PRI_LIST 0x0001
205 #define LPFC_FCF_FLOGI_FAILED 0x0002
206 uint16_t flag;
207 uint32_t priority;
210 struct lpfc_fcf_pri {
211 struct list_head list;
212 struct lpfc_fcf_pri_rec fcf_rec;
216 * Maximum FCF table index, it is for driver internal book keeping, it
217 * just needs to be no less than the supported HBA's FCF table size.
219 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32
221 struct lpfc_fcf {
222 uint16_t fcfi;
223 uint32_t fcf_flag;
224 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */
225 #define FCF_REGISTERED 0x02 /* FCF registered with FW */
226 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */
227 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */
228 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
229 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
230 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
231 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
232 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
233 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
234 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
235 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
236 uint32_t addr_mode;
237 uint32_t eligible_fcf_cnt;
238 struct lpfc_fcf_rec current_rec;
239 struct lpfc_fcf_rec failover_rec;
240 struct list_head fcf_pri_list;
241 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
242 uint32_t current_fcf_scan_pri;
243 struct timer_list redisc_wait;
244 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
248 #define LPFC_REGION23_SIGNATURE "RG23"
249 #define LPFC_REGION23_VERSION 1
250 #define LPFC_REGION23_LAST_REC 0xff
251 #define DRIVER_SPECIFIC_TYPE 0xA2
252 #define LINUX_DRIVER_ID 0x20
253 #define PORT_STE_TYPE 0x1
255 struct lpfc_fip_param_hdr {
256 uint8_t type;
257 #define FCOE_PARAM_TYPE 0xA0
258 uint8_t length;
259 #define FCOE_PARAM_LENGTH 2
260 uint8_t parm_version;
261 #define FIPP_VERSION 0x01
262 uint8_t parm_flags;
263 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
264 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
265 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
266 #define FIPP_MODE_ON 0x1
267 #define FIPP_MODE_OFF 0x0
268 #define FIPP_VLAN_VALID 0x1
271 struct lpfc_fcoe_params {
272 uint8_t fc_map[3];
273 uint8_t reserved1;
274 uint16_t vlan_tag;
275 uint8_t reserved[2];
278 struct lpfc_fcf_conn_hdr {
279 uint8_t type;
280 #define FCOE_CONN_TBL_TYPE 0xA1
281 uint8_t length; /* words */
282 uint8_t reserved[2];
285 struct lpfc_fcf_conn_rec {
286 uint16_t flags;
287 #define FCFCNCT_VALID 0x0001
288 #define FCFCNCT_BOOT 0x0002
289 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
290 #define FCFCNCT_FBNM_VALID 0x0008
291 #define FCFCNCT_SWNM_VALID 0x0010
292 #define FCFCNCT_VLAN_VALID 0x0020
293 #define FCFCNCT_AM_VALID 0x0040
294 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
295 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
297 uint16_t vlan_tag;
298 uint8_t fabric_name[8];
299 uint8_t switch_name[8];
302 struct lpfc_fcf_conn_entry {
303 struct list_head list;
304 struct lpfc_fcf_conn_rec conn_rec;
308 * Define the host's bootstrap mailbox. This structure contains
309 * the member attributes needed to create, use, and destroy the
310 * bootstrap mailbox region.
312 * The macro definitions for the bmbx data structure are defined
313 * in lpfc_hw4.h with the register definition.
315 struct lpfc_bmbx {
316 struct lpfc_dmabuf *dmabuf;
317 struct dma_address dma_address;
318 void *avirt;
319 dma_addr_t aphys;
320 uint32_t bmbx_size;
323 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
325 #define LPFC_EQE_SIZE_4B 4
326 #define LPFC_EQE_SIZE_16B 16
327 #define LPFC_CQE_SIZE 16
328 #define LPFC_WQE_SIZE 64
329 #define LPFC_WQE128_SIZE 128
330 #define LPFC_MQE_SIZE 256
331 #define LPFC_RQE_SIZE 8
333 #define LPFC_EQE_DEF_COUNT 1024
334 #define LPFC_CQE_DEF_COUNT 1024
335 #define LPFC_WQE_DEF_COUNT 256
336 #define LPFC_WQE128_DEF_COUNT 128
337 #define LPFC_MQE_DEF_COUNT 16
338 #define LPFC_RQE_DEF_COUNT 512
340 #define LPFC_QUEUE_NOARM false
341 #define LPFC_QUEUE_REARM true
345 * SLI4 CT field defines
347 #define SLI4_CT_RPI 0
348 #define SLI4_CT_VPI 1
349 #define SLI4_CT_VFI 2
350 #define SLI4_CT_FCFI 3
353 * SLI4 specific data structures
355 struct lpfc_max_cfg_param {
356 uint16_t max_xri;
357 uint16_t xri_base;
358 uint16_t xri_used;
359 uint16_t max_rpi;
360 uint16_t rpi_base;
361 uint16_t rpi_used;
362 uint16_t max_vpi;
363 uint16_t vpi_base;
364 uint16_t vpi_used;
365 uint16_t max_vfi;
366 uint16_t vfi_base;
367 uint16_t vfi_used;
368 uint16_t max_fcfi;
369 uint16_t fcfi_used;
370 uint16_t max_eq;
371 uint16_t max_rq;
372 uint16_t max_cq;
373 uint16_t max_wq;
376 struct lpfc_hba;
377 /* SLI4 HBA multi-fcp queue handler struct */
378 struct lpfc_fcp_eq_hdl {
379 uint32_t idx;
380 struct lpfc_hba *phba;
381 atomic_t fcp_eq_in_use;
384 /* Port Capabilities for SLI4 Parameters */
385 struct lpfc_pc_sli4_params {
386 uint32_t supported;
387 uint32_t if_type;
388 uint32_t sli_rev;
389 uint32_t sli_family;
390 uint32_t featurelevel_1;
391 uint32_t featurelevel_2;
392 uint32_t proto_types;
393 #define LPFC_SLI4_PROTO_FCOE 0x0000001
394 #define LPFC_SLI4_PROTO_FC 0x0000002
395 #define LPFC_SLI4_PROTO_NIC 0x0000004
396 #define LPFC_SLI4_PROTO_ISCSI 0x0000008
397 #define LPFC_SLI4_PROTO_RDMA 0x0000010
398 uint32_t sge_supp_len;
399 uint32_t if_page_sz;
400 uint32_t rq_db_window;
401 uint32_t loopbk_scope;
402 uint32_t eq_pages_max;
403 uint32_t eqe_size;
404 uint32_t cq_pages_max;
405 uint32_t cqe_size;
406 uint32_t mq_pages_max;
407 uint32_t mqe_size;
408 uint32_t mq_elem_cnt;
409 uint32_t wq_pages_max;
410 uint32_t wqe_size;
411 uint32_t rq_pages_max;
412 uint32_t rqe_size;
413 uint32_t hdr_pages_max;
414 uint32_t hdr_size;
415 uint32_t hdr_pp_align;
416 uint32_t sgl_pages_max;
417 uint32_t sgl_pp_align;
418 uint8_t cqv;
419 uint8_t mqv;
420 uint8_t wqv;
421 uint8_t rqv;
422 uint8_t wqsize;
423 #define LPFC_WQ_SZ64_SUPPORT 1
424 #define LPFC_WQ_SZ128_SUPPORT 2
427 struct lpfc_iov {
428 uint32_t pf_number;
429 uint32_t vf_number;
432 struct lpfc_sli4_lnk_info {
433 uint8_t lnk_dv;
434 #define LPFC_LNK_DAT_INVAL 0
435 #define LPFC_LNK_DAT_VAL 1
436 uint8_t lnk_tp;
437 #define LPFC_LNK_GE 0x0 /* FCoE */
438 #define LPFC_LNK_FC 0x1 /* FC */
439 uint8_t lnk_no;
442 #define LPFC_SLI4_HANDLER_NAME_SZ 16
444 /* Used for IRQ vector to CPU mapping */
445 struct lpfc_vector_map_info {
446 uint16_t phys_id;
447 uint16_t core_id;
448 uint16_t irq;
449 uint16_t channel_id;
450 struct cpumask maskbits;
452 #define LPFC_VECTOR_MAP_EMPTY 0xffff
454 /* SLI4 HBA data structure entries */
455 struct lpfc_sli4_hba {
456 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
457 PCI BAR0, config space registers */
458 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
459 PCI BAR1, control registers */
460 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
461 PCI BAR2, doorbell registers */
462 union {
463 struct {
464 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
465 void __iomem *UERRLOregaddr;
466 void __iomem *UERRHIregaddr;
467 void __iomem *UEMASKLOregaddr;
468 void __iomem *UEMASKHIregaddr;
469 } if_type0;
470 struct {
471 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
472 void __iomem *STATUSregaddr;
473 void __iomem *CTRLregaddr;
474 void __iomem *ERR1regaddr;
475 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
476 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
477 void __iomem *ERR2regaddr;
478 #define SLIPORT_ERR2_REG_FW_RESTART 0x0
479 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
480 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
481 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
482 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
483 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
484 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
485 } if_type2;
486 } u;
488 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
489 void __iomem *PSMPHRregaddr;
491 /* Well-known SLI INTF register memory map. */
492 void __iomem *SLIINTFregaddr;
494 /* IF type 0, BAR 1 function CSR register memory map */
495 void __iomem *ISRregaddr; /* HST_ISR register */
496 void __iomem *IMRregaddr; /* HST_IMR register */
497 void __iomem *ISCRregaddr; /* HST_ISCR register */
498 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
499 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
500 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
501 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */
502 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
503 void __iomem *BMBXregaddr; /* BootStrap MBX register */
505 uint32_t ue_mask_lo;
506 uint32_t ue_mask_hi;
507 struct lpfc_register sli_intf;
508 struct lpfc_pc_sli4_params pc_sli4_params;
509 struct msix_entry *msix_entries;
510 uint8_t handler_name[LPFC_FCP_IO_CHAN_MAX][LPFC_SLI4_HANDLER_NAME_SZ];
511 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
513 /* Pointers to the constructed SLI4 queues */
514 struct lpfc_queue **hba_eq;/* Event queues for HBA */
515 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
516 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
517 uint16_t *fcp_cq_map;
519 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
520 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
521 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
522 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
523 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
524 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
526 uint32_t fw_func_mode; /* FW function protocol mode */
527 uint32_t ulp0_mode; /* ULP0 protocol mode */
528 uint32_t ulp1_mode; /* ULP1 protocol mode */
530 /* Setup information for various queue parameters */
531 int eq_esize;
532 int eq_ecount;
533 int cq_esize;
534 int cq_ecount;
535 int wq_esize;
536 int wq_ecount;
537 int mq_esize;
538 int mq_ecount;
539 int rq_esize;
540 int rq_ecount;
541 #define LPFC_SP_EQ_MAX_INTR_SEC 10000
542 #define LPFC_FP_EQ_MAX_INTR_SEC 10000
544 uint32_t intr_enable;
545 struct lpfc_bmbx bmbx;
546 struct lpfc_max_cfg_param max_cfg_param;
547 uint16_t extents_in_use; /* must allocate resource extents. */
548 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
549 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
550 uint16_t next_rpi;
551 uint16_t scsi_xri_max;
552 uint16_t scsi_xri_cnt;
553 uint16_t els_xri_cnt;
554 uint16_t scsi_xri_start;
555 struct list_head lpfc_free_sgl_list;
556 struct list_head lpfc_sgl_list;
557 struct list_head lpfc_abts_els_sgl_list;
558 struct list_head lpfc_abts_scsi_buf_list;
559 struct lpfc_sglq **lpfc_sglq_active_list;
560 struct list_head lpfc_rpi_hdr_list;
561 unsigned long *rpi_bmask;
562 uint16_t *rpi_ids;
563 uint16_t rpi_count;
564 struct list_head lpfc_rpi_blk_list;
565 unsigned long *xri_bmask;
566 uint16_t *xri_ids;
567 struct list_head lpfc_xri_blk_list;
568 unsigned long *vfi_bmask;
569 uint16_t *vfi_ids;
570 uint16_t vfi_count;
571 struct list_head lpfc_vfi_blk_list;
572 struct lpfc_sli4_flags sli4_flags;
573 struct list_head sp_queue_event;
574 struct list_head sp_cqe_event_pool;
575 struct list_head sp_asynce_work_queue;
576 struct list_head sp_fcp_xri_aborted_work_queue;
577 struct list_head sp_els_xri_aborted_work_queue;
578 struct list_head sp_unsol_work_queue;
579 struct lpfc_sli4_link link_state;
580 struct lpfc_sli4_lnk_info lnk_info;
581 uint32_t pport_name_sta;
582 #define LPFC_SLI4_PPNAME_NON 0
583 #define LPFC_SLI4_PPNAME_GET 1
584 struct lpfc_iov iov;
585 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
586 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
588 /* CPU to vector mapping information */
589 struct lpfc_vector_map_info *cpu_map;
590 uint16_t num_online_cpu;
591 uint16_t num_present_cpu;
594 enum lpfc_sge_type {
595 GEN_BUFF_TYPE,
596 SCSI_BUFF_TYPE
599 enum lpfc_sgl_state {
600 SGL_FREED,
601 SGL_ALLOCATED,
602 SGL_XRI_ABORTED
605 struct lpfc_sglq {
606 /* lpfc_sglqs are used in double linked lists */
607 struct list_head list;
608 struct list_head clist;
609 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
610 enum lpfc_sgl_state state;
611 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
612 uint16_t iotag; /* pre-assigned IO tag */
613 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
614 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
615 struct sli4_sge *sgl; /* pre-assigned SGL */
616 void *virt; /* virtual address. */
617 dma_addr_t phys; /* physical address */
620 struct lpfc_rpi_hdr {
621 struct list_head list;
622 uint32_t len;
623 struct lpfc_dmabuf *dmabuf;
624 uint32_t page_count;
625 uint32_t start_rpi;
628 struct lpfc_rsrc_blks {
629 struct list_head list;
630 uint16_t rsrc_start;
631 uint16_t rsrc_size;
632 uint16_t rsrc_used;
636 * SLI4 specific function prototypes
638 int lpfc_pci_function_reset(struct lpfc_hba *);
639 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
640 int lpfc_sli4_hba_setup(struct lpfc_hba *);
641 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
642 uint8_t, uint32_t, bool);
643 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
644 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
645 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
646 struct lpfc_mbx_sge *);
647 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
648 uint16_t);
650 void lpfc_sli4_hba_reset(struct lpfc_hba *);
651 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
652 uint32_t);
653 void lpfc_sli4_queue_free(struct lpfc_queue *);
654 uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
655 uint32_t lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint16_t);
656 uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
657 struct lpfc_queue *, uint32_t, uint32_t);
658 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
659 struct lpfc_queue *, uint32_t);
660 uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
661 struct lpfc_queue *, uint32_t);
662 uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
663 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
664 void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int);
665 uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
666 uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
667 uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
668 uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
669 uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
670 struct lpfc_queue *);
671 int lpfc_sli4_queue_setup(struct lpfc_hba *);
672 void lpfc_sli4_queue_unset(struct lpfc_hba *);
673 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
674 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
675 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
676 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
677 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
678 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
679 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
680 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
681 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
682 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
683 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
684 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
685 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
686 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
687 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
688 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
689 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
690 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
691 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
692 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
693 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
694 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
695 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
696 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
697 struct sli4_wcqe_xri_aborted *);
698 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
699 struct sli4_wcqe_xri_aborted *);
700 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
701 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
702 int lpfc_sli4_brdreset(struct lpfc_hba *);
703 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
704 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
705 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
706 int lpfc_sli4_init_vpi(struct lpfc_vport *);
707 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
708 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
709 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
710 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
711 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
712 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
713 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
714 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
715 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
716 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
717 int lpfc_sli4_post_status_check(struct lpfc_hba *);
718 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
719 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);