x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / scsi / mpt2sas / mpi / mpi2_init.h
blob9d284dae6553745b8a97af1552a619fa9f7a66aa
1 /*
2 * Copyright (c) 2000-2013 LSI Corporation.
5 * Name: mpi2_init.h
6 * Title: MPI SCSI initiator mode messages and structures
7 * Creation Date: June 23, 2006
9 * mpi2_init.h Version: 02.00.14
11 * Version History
12 * ---------------
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
18 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
19 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
20 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
21 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
22 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
23 * Control field Task Attribute flags.
24 * Moved LUN field defines to mpi2.h because they are
25 * common to many structures.
26 * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
27 * Query Asynchronous Event.
28 * Defined two new bits in the SlotStatus field of the SCSI
29 * Enclosure Processor Request and Reply.
30 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
31 * both SCSI IO Error Reply and SCSI Task Management Reply.
32 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
33 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
34 * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
35 * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
36 * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
37 * 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
38 * Priority to match SAM-4.
39 * 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
40 * --------------------------------------------------------------------------
43 #ifndef MPI2_INIT_H
44 #define MPI2_INIT_H
46 /*****************************************************************************
48 * SCSI Initiator Messages
50 *****************************************************************************/
52 /****************************************************************************
53 * SCSI IO messages and associated structures
54 ****************************************************************************/
56 typedef struct
58 U8 CDB[20]; /* 0x00 */
59 U32 PrimaryReferenceTag; /* 0x14 */
60 U16 PrimaryApplicationTag; /* 0x18 */
61 U16 PrimaryApplicationTagMask; /* 0x1A */
62 U32 TransferLength; /* 0x1C */
63 } MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
64 Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
66 typedef union
68 U8 CDB32[32];
69 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
70 MPI2_SGE_SIMPLE_UNION SGE;
71 } MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
72 Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
74 /* SCSI IO Request Message */
75 typedef struct _MPI2_SCSI_IO_REQUEST
77 U16 DevHandle; /* 0x00 */
78 U8 ChainOffset; /* 0x02 */
79 U8 Function; /* 0x03 */
80 U16 Reserved1; /* 0x04 */
81 U8 Reserved2; /* 0x06 */
82 U8 MsgFlags; /* 0x07 */
83 U8 VP_ID; /* 0x08 */
84 U8 VF_ID; /* 0x09 */
85 U16 Reserved3; /* 0x0A */
86 U32 SenseBufferLowAddress; /* 0x0C */
87 U16 SGLFlags; /* 0x10 */
88 U8 SenseBufferLength; /* 0x12 */
89 U8 Reserved4; /* 0x13 */
90 U8 SGLOffset0; /* 0x14 */
91 U8 SGLOffset1; /* 0x15 */
92 U8 SGLOffset2; /* 0x16 */
93 U8 SGLOffset3; /* 0x17 */
94 U32 SkipCount; /* 0x18 */
95 U32 DataLength; /* 0x1C */
96 U32 BidirectionalDataLength; /* 0x20 */
97 U16 IoFlags; /* 0x24 */
98 U16 EEDPFlags; /* 0x26 */
99 U32 EEDPBlockSize; /* 0x28 */
100 U32 SecondaryReferenceTag; /* 0x2C */
101 U16 SecondaryApplicationTag; /* 0x30 */
102 U16 ApplicationTagTranslationMask; /* 0x32 */
103 U8 LUN[8]; /* 0x34 */
104 U32 Control; /* 0x3C */
105 MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
107 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
108 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
109 #endif
111 MPI2_SGE_IO_UNION SGL; /* 0x60 */
113 } MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
114 Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
116 /* SCSI IO MsgFlags bits */
118 /* MsgFlags for SenseBufferAddressSpace */
119 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
120 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
121 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
122 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
123 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
125 /* SCSI IO SGLFlags bits */
127 /* base values for Data Location Address Space */
128 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
129 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
130 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
131 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
132 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
134 /* base values for Type */
135 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
136 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
137 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
138 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
140 /* shift values for each sub-field */
141 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
142 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
143 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
144 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
146 /* number of SGLOffset fields */
147 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
149 /* SCSI IO IoFlags bits */
151 /* Large CDB Address Space */
152 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
153 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
154 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
155 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
156 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
158 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
159 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
160 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
161 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
162 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
164 /* SCSI IO EEDPFlags bits */
166 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
167 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
168 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
169 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
171 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
172 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
173 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
175 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
177 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
178 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
179 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
180 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
181 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
182 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
183 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
184 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
186 /* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
188 /* SCSI IO Control bits */
189 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
190 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
192 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
193 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
194 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
195 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
196 #define MPI2_SCSIIO_CONTROL_READ (0x02000000)
197 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
199 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
200 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
201 /* alternate name for the previous field; called Command Priority in SAM-4 */
202 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
203 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
205 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
206 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
207 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
208 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
209 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
211 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
212 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
213 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
214 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
217 /* SCSI IO Error Reply Message */
218 typedef struct _MPI2_SCSI_IO_REPLY
220 U16 DevHandle; /* 0x00 */
221 U8 MsgLength; /* 0x02 */
222 U8 Function; /* 0x03 */
223 U16 Reserved1; /* 0x04 */
224 U8 Reserved2; /* 0x06 */
225 U8 MsgFlags; /* 0x07 */
226 U8 VP_ID; /* 0x08 */
227 U8 VF_ID; /* 0x09 */
228 U16 Reserved3; /* 0x0A */
229 U8 SCSIStatus; /* 0x0C */
230 U8 SCSIState; /* 0x0D */
231 U16 IOCStatus; /* 0x0E */
232 U32 IOCLogInfo; /* 0x10 */
233 U32 TransferCount; /* 0x14 */
234 U32 SenseCount; /* 0x18 */
235 U32 ResponseInfo; /* 0x1C */
236 U16 TaskTag; /* 0x20 */
237 U16 Reserved4; /* 0x22 */
238 U32 BidirectionalTransferCount; /* 0x24 */
239 U32 Reserved5; /* 0x28 */
240 U32 Reserved6; /* 0x2C */
241 } MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
242 Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
244 /* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
246 #define MPI2_SCSI_STATUS_GOOD (0x00)
247 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
248 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
249 #define MPI2_SCSI_STATUS_BUSY (0x08)
250 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
251 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
252 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
253 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
254 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
255 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
256 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
258 /* SCSI IO Reply SCSIState flags */
260 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
261 #define MPI2_SCSI_STATE_TERMINATED (0x08)
262 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
263 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
264 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
266 /* masks and shifts for the ResponseInfo field */
268 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
269 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
271 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
274 /****************************************************************************
275 * SCSI Task Management messages
276 ****************************************************************************/
278 /* SCSI Task Management Request Message */
279 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
281 U16 DevHandle; /* 0x00 */
282 U8 ChainOffset; /* 0x02 */
283 U8 Function; /* 0x03 */
284 U8 Reserved1; /* 0x04 */
285 U8 TaskType; /* 0x05 */
286 U8 Reserved2; /* 0x06 */
287 U8 MsgFlags; /* 0x07 */
288 U8 VP_ID; /* 0x08 */
289 U8 VF_ID; /* 0x09 */
290 U16 Reserved3; /* 0x0A */
291 U8 LUN[8]; /* 0x0C */
292 U32 Reserved4[7]; /* 0x14 */
293 U16 TaskMID; /* 0x30 */
294 U16 Reserved5; /* 0x32 */
295 } MPI2_SCSI_TASK_MANAGE_REQUEST,
296 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
297 Mpi2SCSITaskManagementRequest_t,
298 MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
300 /* TaskType values */
302 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
303 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
304 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
305 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
306 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
307 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
308 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
309 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
310 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
312 /* obsolete TaskType name */
313 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
314 (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
316 /* MsgFlags bits */
318 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
319 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
320 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
321 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
323 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
327 /* SCSI Task Management Reply Message */
328 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
330 U16 DevHandle; /* 0x00 */
331 U8 MsgLength; /* 0x02 */
332 U8 Function; /* 0x03 */
333 U8 ResponseCode; /* 0x04 */
334 U8 TaskType; /* 0x05 */
335 U8 Reserved1; /* 0x06 */
336 U8 MsgFlags; /* 0x07 */
337 U8 VP_ID; /* 0x08 */
338 U8 VF_ID; /* 0x09 */
339 U16 Reserved2; /* 0x0A */
340 U16 Reserved3; /* 0x0C */
341 U16 IOCStatus; /* 0x0E */
342 U32 IOCLogInfo; /* 0x10 */
343 U32 TerminationCount; /* 0x14 */
344 U32 ResponseInfo; /* 0x18 */
345 } MPI2_SCSI_TASK_MANAGE_REPLY,
346 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
347 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
349 /* ResponseCode values */
351 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
352 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
353 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
354 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
355 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
356 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
357 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
358 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
360 /* masks and shifts for the ResponseInfo field */
362 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
363 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
364 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
365 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
366 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
367 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
368 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
369 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
372 /****************************************************************************
373 * SCSI Enclosure Processor messages
374 ****************************************************************************/
376 /* SCSI Enclosure Processor Request Message */
377 typedef struct _MPI2_SEP_REQUEST
379 U16 DevHandle; /* 0x00 */
380 U8 ChainOffset; /* 0x02 */
381 U8 Function; /* 0x03 */
382 U8 Action; /* 0x04 */
383 U8 Flags; /* 0x05 */
384 U8 Reserved1; /* 0x06 */
385 U8 MsgFlags; /* 0x07 */
386 U8 VP_ID; /* 0x08 */
387 U8 VF_ID; /* 0x09 */
388 U16 Reserved2; /* 0x0A */
389 U32 SlotStatus; /* 0x0C */
390 U32 Reserved3; /* 0x10 */
391 U32 Reserved4; /* 0x14 */
392 U32 Reserved5; /* 0x18 */
393 U16 Slot; /* 0x1C */
394 U16 EnclosureHandle; /* 0x1E */
395 } MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
396 Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
398 /* Action defines */
399 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
400 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
402 /* Flags defines */
403 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
404 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
406 /* SlotStatus defines */
407 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
408 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
409 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
410 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
411 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
412 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
413 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
414 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
415 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
416 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
417 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
420 /* SCSI Enclosure Processor Reply Message */
421 typedef struct _MPI2_SEP_REPLY
423 U16 DevHandle; /* 0x00 */
424 U8 MsgLength; /* 0x02 */
425 U8 Function; /* 0x03 */
426 U8 Action; /* 0x04 */
427 U8 Flags; /* 0x05 */
428 U8 Reserved1; /* 0x06 */
429 U8 MsgFlags; /* 0x07 */
430 U8 VP_ID; /* 0x08 */
431 U8 VF_ID; /* 0x09 */
432 U16 Reserved2; /* 0x0A */
433 U16 Reserved3; /* 0x0C */
434 U16 IOCStatus; /* 0x0E */
435 U32 IOCLogInfo; /* 0x10 */
436 U32 SlotStatus; /* 0x14 */
437 U32 Reserved4; /* 0x18 */
438 U16 Slot; /* 0x1C */
439 U16 EnclosureHandle; /* 0x1E */
440 } MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
441 Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
443 /* SlotStatus defines */
444 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
445 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
446 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
447 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
448 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
449 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
450 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
451 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
452 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
453 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
454 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
457 #endif