2 * Copyright (c) 2001-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
23 /* check the values in the HCSPARAMS register
24 * (host controller _Structural_ parameters)
25 * see EHCI spec, Table 2-4 for each value
27 static void dbg_hcs_params (struct ehci_hcd
*ehci
, char *label
)
29 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
32 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
34 HCS_DEBUG_PORT (params
),
35 HCS_INDICATOR (params
) ? " ind" : "",
38 HCS_PORTROUTED (params
) ? "" : " ordered",
39 HCS_PPC (params
) ? "" : " !ppc",
42 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
43 if (HCS_PORTROUTED (params
)) {
45 char buf
[46], tmp
[7], byte
;
48 for (i
= 0; i
< HCS_N_PORTS (params
); i
++) {
49 // FIXME MIPS won't readb() ...
50 byte
= readb (&ehci
->caps
->portroute
[(i
>>1)]);
52 ((i
& 0x1) ? ((byte
)&0xf) : ((byte
>>4)&0xf)));
55 ehci_dbg (ehci
, "%s portroute %s\n",
61 static inline void dbg_hcs_params (struct ehci_hcd
*ehci
, char *label
) {}
65 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
67 /* check the values in the HCCPARAMS register
68 * (host controller _Capability_ parameters)
69 * see EHCI Spec, Table 2-5 for each value
71 static void dbg_hcc_params (struct ehci_hcd
*ehci
, char *label
)
73 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
75 if (HCC_ISOC_CACHE (params
)) {
77 "%s hcc_params %04x caching frame %s%s%s\n",
79 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
80 HCC_CANPARK(params
) ? " park" : "",
81 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "");
84 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
87 HCC_ISOC_THRES(params
),
88 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
89 HCC_CANPARK(params
) ? " park" : "",
90 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "",
91 HCC_LPM(params
) ? " LPM" : "",
92 HCC_PER_PORT_CHANGE_EVENT(params
) ? " ppce" : "",
93 HCC_HW_PREFETCH(params
) ? " hw prefetch" : "",
94 HCC_32FRAME_PERIODIC_LIST(params
) ?
95 " 32 periodic list" : "");
100 static inline void dbg_hcc_params (struct ehci_hcd
*ehci
, char *label
) {}
104 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
106 static void __maybe_unused
107 dbg_qtd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
109 ehci_dbg(ehci
, "%s td %p n%08x %08x t%08x p0=%08x\n", label
, qtd
,
110 hc32_to_cpup(ehci
, &qtd
->hw_next
),
111 hc32_to_cpup(ehci
, &qtd
->hw_alt_next
),
112 hc32_to_cpup(ehci
, &qtd
->hw_token
),
113 hc32_to_cpup(ehci
, &qtd
->hw_buf
[0]));
115 ehci_dbg(ehci
, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
116 hc32_to_cpup(ehci
, &qtd
->hw_buf
[1]),
117 hc32_to_cpup(ehci
, &qtd
->hw_buf
[2]),
118 hc32_to_cpup(ehci
, &qtd
->hw_buf
[3]),
119 hc32_to_cpup(ehci
, &qtd
->hw_buf
[4]));
122 static void __maybe_unused
123 dbg_qh (const char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
125 struct ehci_qh_hw
*hw
= qh
->hw
;
127 ehci_dbg (ehci
, "%s qh %p n%08x info %x %x qtd %x\n", label
,
128 qh
, hw
->hw_next
, hw
->hw_info1
, hw
->hw_info2
, hw
->hw_current
);
129 dbg_qtd("overlay", ehci
, (struct ehci_qtd
*) &hw
->hw_qtd_next
);
132 static void __maybe_unused
133 dbg_itd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_itd
*itd
)
135 ehci_dbg (ehci
, "%s [%d] itd %p, next %08x, urb %p\n",
136 label
, itd
->frame
, itd
, hc32_to_cpu(ehci
, itd
->hw_next
),
139 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
140 hc32_to_cpu(ehci
, itd
->hw_transaction
[0]),
141 hc32_to_cpu(ehci
, itd
->hw_transaction
[1]),
142 hc32_to_cpu(ehci
, itd
->hw_transaction
[2]),
143 hc32_to_cpu(ehci
, itd
->hw_transaction
[3]),
144 hc32_to_cpu(ehci
, itd
->hw_transaction
[4]),
145 hc32_to_cpu(ehci
, itd
->hw_transaction
[5]),
146 hc32_to_cpu(ehci
, itd
->hw_transaction
[6]),
147 hc32_to_cpu(ehci
, itd
->hw_transaction
[7]));
149 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
150 hc32_to_cpu(ehci
, itd
->hw_bufp
[0]),
151 hc32_to_cpu(ehci
, itd
->hw_bufp
[1]),
152 hc32_to_cpu(ehci
, itd
->hw_bufp
[2]),
153 hc32_to_cpu(ehci
, itd
->hw_bufp
[3]),
154 hc32_to_cpu(ehci
, itd
->hw_bufp
[4]),
155 hc32_to_cpu(ehci
, itd
->hw_bufp
[5]),
156 hc32_to_cpu(ehci
, itd
->hw_bufp
[6]));
157 ehci_dbg (ehci
, " index: %d %d %d %d %d %d %d %d\n",
158 itd
->index
[0], itd
->index
[1], itd
->index
[2],
159 itd
->index
[3], itd
->index
[4], itd
->index
[5],
160 itd
->index
[6], itd
->index
[7]);
163 static void __maybe_unused
164 dbg_sitd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_sitd
*sitd
)
166 ehci_dbg (ehci
, "%s [%d] sitd %p, next %08x, urb %p\n",
167 label
, sitd
->frame
, sitd
, hc32_to_cpu(ehci
, sitd
->hw_next
),
170 " addr %08x sched %04x result %08x buf %08x %08x\n",
171 hc32_to_cpu(ehci
, sitd
->hw_fullspeed_ep
),
172 hc32_to_cpu(ehci
, sitd
->hw_uframe
),
173 hc32_to_cpu(ehci
, sitd
->hw_results
),
174 hc32_to_cpu(ehci
, sitd
->hw_buf
[0]),
175 hc32_to_cpu(ehci
, sitd
->hw_buf
[1]));
178 static int __maybe_unused
179 dbg_status_buf (char *buf
, unsigned len
, const char *label
, u32 status
)
181 return scnprintf (buf
, len
,
182 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
183 label
, label
[0] ? " " : "", status
,
184 (status
& STS_PPCE_MASK
) ? " PPCE" : "",
185 (status
& STS_ASS
) ? " Async" : "",
186 (status
& STS_PSS
) ? " Periodic" : "",
187 (status
& STS_RECL
) ? " Recl" : "",
188 (status
& STS_HALT
) ? " Halt" : "",
189 (status
& STS_IAA
) ? " IAA" : "",
190 (status
& STS_FATAL
) ? " FATAL" : "",
191 (status
& STS_FLR
) ? " FLR" : "",
192 (status
& STS_PCD
) ? " PCD" : "",
193 (status
& STS_ERR
) ? " ERR" : "",
194 (status
& STS_INT
) ? " INT" : ""
198 static int __maybe_unused
199 dbg_intr_buf (char *buf
, unsigned len
, const char *label
, u32 enable
)
201 return scnprintf (buf
, len
,
202 "%s%sintrenable %02x%s%s%s%s%s%s%s",
203 label
, label
[0] ? " " : "", enable
,
204 (enable
& STS_PPCE_MASK
) ? " PPCE" : "",
205 (enable
& STS_IAA
) ? " IAA" : "",
206 (enable
& STS_FATAL
) ? " FATAL" : "",
207 (enable
& STS_FLR
) ? " FLR" : "",
208 (enable
& STS_PCD
) ? " PCD" : "",
209 (enable
& STS_ERR
) ? " ERR" : "",
210 (enable
& STS_INT
) ? " INT" : ""
214 static const char *const fls_strings
[] =
215 { "1024", "512", "256", "??" };
218 dbg_command_buf (char *buf
, unsigned len
, const char *label
, u32 command
)
220 return scnprintf (buf
, len
,
221 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
223 label
, label
[0] ? " " : "", command
,
224 (command
& CMD_HIRD
) ? " HIRD" : "",
225 (command
& CMD_PPCEE
) ? " PPCEE" : "",
226 (command
& CMD_FSP
) ? " FSP" : "",
227 (command
& CMD_ASPE
) ? " ASPE" : "",
228 (command
& CMD_PSPE
) ? " PSPE" : "",
229 (command
& CMD_PARK
) ? " park" : "(park)",
230 CMD_PARK_CNT (command
),
231 (command
>> 16) & 0x3f,
232 (command
& CMD_LRESET
) ? " LReset" : "",
233 (command
& CMD_IAAD
) ? " IAAD" : "",
234 (command
& CMD_ASE
) ? " Async" : "",
235 (command
& CMD_PSE
) ? " Periodic" : "",
236 fls_strings
[(command
>> 2) & 0x3],
237 (command
& CMD_RESET
) ? " Reset" : "",
238 (command
& CMD_RUN
) ? "RUN" : "HALT"
243 dbg_port_buf (char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
247 /* signaling state */
248 switch (status
& (3 << 10)) {
249 case 0 << 10: sig
= "se0"; break;
250 case 1 << 10: sig
= "k"; break; /* low speed */
251 case 2 << 10: sig
= "j"; break;
252 default: sig
= "?"; break;
255 return scnprintf (buf
, len
,
256 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
257 "sig=%s%s%s%s%s%s%s%s%s%s%s",
258 label
, label
[0] ? " " : "", port
, status
,
259 status
>>25,/*device address */
260 (status
& PORT_SSTS
)>>23 == PORTSC_SUSPEND_STS_ACK
?
262 (status
& PORT_SSTS
)>>23 == PORTSC_SUSPEND_STS_NYET
?
264 (status
& PORT_SSTS
)>>23 == PORTSC_SUSPEND_STS_STALL
?
266 (status
& PORT_SSTS
)>>23 == PORTSC_SUSPEND_STS_ERR
?
268 (status
& PORT_POWER
) ? " POWER" : "",
269 (status
& PORT_OWNER
) ? " OWNER" : "",
271 (status
& PORT_LPM
) ? " LPM" : "",
272 (status
& PORT_RESET
) ? " RESET" : "",
273 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
274 (status
& PORT_RESUME
) ? " RESUME" : "",
275 (status
& PORT_OCC
) ? " OCC" : "",
276 (status
& PORT_OC
) ? " OC" : "",
277 (status
& PORT_PEC
) ? " PEC" : "",
278 (status
& PORT_PE
) ? " PE" : "",
279 (status
& PORT_CSC
) ? " CSC" : "",
280 (status
& PORT_CONNECT
) ? " CONNECT" : "");
284 static inline void __maybe_unused
285 dbg_qh (char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
288 static inline int __maybe_unused
289 dbg_status_buf (char *buf
, unsigned len
, const char *label
, u32 status
)
292 static inline int __maybe_unused
293 dbg_command_buf (char *buf
, unsigned len
, const char *label
, u32 command
)
296 static inline int __maybe_unused
297 dbg_intr_buf (char *buf
, unsigned len
, const char *label
, u32 enable
)
300 static inline int __maybe_unused
301 dbg_port_buf (char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
304 #endif /* DEBUG || CONFIG_DYNAMIC_DEBUG */
306 /* functions have the "wrong" filename when they're output... */
307 #define dbg_status(ehci, label, status) { \
309 dbg_status_buf (_buf, sizeof _buf, label, status); \
310 ehci_dbg (ehci, "%s\n", _buf); \
313 #define dbg_cmd(ehci, label, command) { \
315 dbg_command_buf (_buf, sizeof _buf, label, command); \
316 ehci_dbg (ehci, "%s\n", _buf); \
319 #define dbg_port(ehci, label, port, status) { \
321 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
322 ehci_dbg (ehci, "%s\n", _buf); \
325 /*-------------------------------------------------------------------------*/
327 #ifdef STUB_DEBUG_FILES
329 static inline void create_debug_files (struct ehci_hcd
*bus
) { }
330 static inline void remove_debug_files (struct ehci_hcd
*bus
) { }
334 /* troubleshooting help: expose state in debugfs */
336 static int debug_async_open(struct inode
*, struct file
*);
337 static int debug_periodic_open(struct inode
*, struct file
*);
338 static int debug_registers_open(struct inode
*, struct file
*);
340 static ssize_t
debug_output(struct file
*, char __user
*, size_t, loff_t
*);
341 static int debug_close(struct inode
*, struct file
*);
343 static const struct file_operations debug_async_fops
= {
344 .owner
= THIS_MODULE
,
345 .open
= debug_async_open
,
346 .read
= debug_output
,
347 .release
= debug_close
,
348 .llseek
= default_llseek
,
350 static const struct file_operations debug_periodic_fops
= {
351 .owner
= THIS_MODULE
,
352 .open
= debug_periodic_open
,
353 .read
= debug_output
,
354 .release
= debug_close
,
355 .llseek
= default_llseek
,
357 static const struct file_operations debug_registers_fops
= {
358 .owner
= THIS_MODULE
,
359 .open
= debug_registers_open
,
360 .read
= debug_output
,
361 .release
= debug_close
,
362 .llseek
= default_llseek
,
365 static struct dentry
*ehci_debug_root
;
367 struct debug_buffer
{
368 ssize_t (*fill_func
)(struct debug_buffer
*); /* fill method */
370 struct mutex mutex
; /* protect filling of buffer */
371 size_t count
; /* number of characters filled into buffer */
376 #define speed_char(info1) ({ char tmp; \
377 switch (info1 & (3 << 12)) { \
378 case QH_FULL_SPEED: tmp = 'f'; break; \
379 case QH_LOW_SPEED: tmp = 'l'; break; \
380 case QH_HIGH_SPEED: tmp = 'h'; break; \
381 default: tmp = '?'; break; \
384 static inline char token_mark(struct ehci_hcd
*ehci
, __hc32 token
)
386 __u32 v
= hc32_to_cpu(ehci
, token
);
388 if (v
& QTD_STS_ACTIVE
)
390 if (v
& QTD_STS_HALT
)
392 if (!IS_SHORT_READ (v
))
394 /* tries to advance through hw_alt_next */
398 static void qh_lines (
399 struct ehci_hcd
*ehci
,
407 struct list_head
*entry
;
410 unsigned size
= *sizep
;
413 __le32 list_end
= EHCI_LIST_END(ehci
);
414 struct ehci_qh_hw
*hw
= qh
->hw
;
416 if (hw
->hw_qtd_next
== list_end
) /* NEC does this */
419 mark
= token_mark(ehci
, hw
->hw_token
);
420 if (mark
== '/') { /* qh_alt_next controls qh advance? */
421 if ((hw
->hw_alt_next
& QTD_MASK(ehci
))
422 == ehci
->async
->hw
->hw_alt_next
)
423 mark
= '#'; /* blocked */
424 else if (hw
->hw_alt_next
== list_end
)
425 mark
= '.'; /* use hw_qtd_next */
426 /* else alt_next points to some other qtd */
428 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
429 hw_curr
= (mark
== '*') ? hc32_to_cpup(ehci
, &hw
->hw_current
) : 0;
430 temp
= scnprintf (next
, size
,
431 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
432 qh
, scratch
& 0x007f,
433 speed_char (scratch
),
434 (scratch
>> 8) & 0x000f,
435 scratch
, hc32_to_cpup(ehci
, &hw
->hw_info2
),
436 hc32_to_cpup(ehci
, &hw
->hw_token
), mark
,
437 (cpu_to_hc32(ehci
, QTD_TOGGLE
) & hw
->hw_token
)
439 (hc32_to_cpup(ehci
, &hw
->hw_alt_next
) >> 1) & 0x0f);
443 /* hc may be modifying the list as we read it ... */
444 list_for_each (entry
, &qh
->qtd_list
) {
445 td
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
446 scratch
= hc32_to_cpup(ehci
, &td
->hw_token
);
448 if (hw_curr
== td
->qtd_dma
)
450 else if (hw
->hw_qtd_next
== cpu_to_hc32(ehci
, td
->qtd_dma
))
452 else if (QTD_LENGTH (scratch
)) {
453 if (td
->hw_alt_next
== ehci
->async
->hw
->hw_alt_next
)
455 else if (td
->hw_alt_next
!= list_end
)
458 temp
= snprintf (next
, size
,
459 "\n\t%p%c%s len=%d %08x urb %p",
460 td
, mark
, ({ char *tmp
;
461 switch ((scratch
>>8)&0x03) {
462 case 0: tmp
= "out"; break;
463 case 1: tmp
= "in"; break;
464 case 2: tmp
= "setup"; break;
465 default: tmp
= "?"; break;
467 (scratch
>> 16) & 0x7fff,
478 temp
= snprintf (next
, size
, "\n");
489 static ssize_t
fill_async_buffer(struct debug_buffer
*buf
)
492 struct ehci_hcd
*ehci
;
498 hcd
= bus_to_hcd(buf
->bus
);
499 ehci
= hcd_to_ehci (hcd
);
500 next
= buf
->output_buf
;
501 size
= buf
->alloc_size
;
505 /* dumps a snapshot of the async schedule.
506 * usually empty except for long-term bulk reads, or head.
507 * one QH per line, and TDs we know about
509 spin_lock_irqsave (&ehci
->lock
, flags
);
510 for (qh
= ehci
->async
->qh_next
.qh
; size
> 0 && qh
; qh
= qh
->qh_next
.qh
)
511 qh_lines (ehci
, qh
, &next
, &size
);
512 if (!list_empty(&ehci
->async_unlink
) && size
> 0) {
513 temp
= scnprintf(next
, size
, "\nunlink =\n");
517 list_for_each_entry(qh
, &ehci
->async_unlink
, unlink_node
) {
520 qh_lines(ehci
, qh
, &next
, &size
);
523 spin_unlock_irqrestore (&ehci
->lock
, flags
);
525 return strlen(buf
->output_buf
);
528 #define DBG_SCHED_LIMIT 64
529 static ssize_t
fill_periodic_buffer(struct debug_buffer
*buf
)
532 struct ehci_hcd
*ehci
;
534 union ehci_shadow p
, *seen
;
535 unsigned temp
, size
, seen_count
;
540 if (!(seen
= kmalloc (DBG_SCHED_LIMIT
* sizeof *seen
, GFP_ATOMIC
)))
544 hcd
= bus_to_hcd(buf
->bus
);
545 ehci
= hcd_to_ehci (hcd
);
546 next
= buf
->output_buf
;
547 size
= buf
->alloc_size
;
549 temp
= scnprintf (next
, size
, "size = %d\n", ehci
->periodic_size
);
553 /* dump a snapshot of the periodic schedule.
554 * iso changes, interrupt usually doesn't.
556 spin_lock_irqsave (&ehci
->lock
, flags
);
557 for (i
= 0; i
< ehci
->periodic_size
; i
++) {
558 p
= ehci
->pshadow
[i
];
561 tag
= Q_NEXT_TYPE(ehci
, ehci
->periodic
[i
]);
563 temp
= scnprintf (next
, size
, "%4d: ", i
);
568 struct ehci_qh_hw
*hw
;
570 switch (hc32_to_cpu(ehci
, tag
)) {
573 temp
= scnprintf (next
, size
, " qh%d-%04x/%p",
578 & (QH_CMASK
| QH_SMASK
),
582 /* don't repeat what follows this qh */
583 for (temp
= 0; temp
< seen_count
; temp
++) {
584 if (seen
[temp
].ptr
!= p
.ptr
)
586 if (p
.qh
->qh_next
.ptr
) {
587 temp
= scnprintf (next
, size
,
594 /* show more info the first time around */
595 if (temp
== seen_count
) {
596 u32 scratch
= hc32_to_cpup(ehci
,
598 struct ehci_qtd
*qtd
;
601 /* count tds, get ep direction */
603 list_for_each_entry (qtd
,
607 switch (0x03 & (hc32_to_cpu(
609 qtd
->hw_token
) >> 8)) {
610 case 0: type
= "out"; continue;
611 case 1: type
= "in"; continue;
615 temp
= scnprintf (next
, size
,
618 speed_char (scratch
),
620 (scratch
>> 8) & 0x000f, type
,
621 p
.qh
->usecs
, p
.qh
->c_usecs
,
623 0x7ff & (scratch
>> 16));
625 if (seen_count
< DBG_SCHED_LIMIT
)
626 seen
[seen_count
++].qh
= p
.qh
;
629 tag
= Q_NEXT_TYPE(ehci
, hw
->hw_next
);
633 temp
= scnprintf (next
, size
,
634 " fstn-%8x/%p", p
.fstn
->hw_prev
,
636 tag
= Q_NEXT_TYPE(ehci
, p
.fstn
->hw_next
);
637 p
= p
.fstn
->fstn_next
;
640 temp
= scnprintf (next
, size
,
642 tag
= Q_NEXT_TYPE(ehci
, p
.itd
->hw_next
);
646 temp
= scnprintf (next
, size
,
648 p
.sitd
->stream
->interval
,
649 hc32_to_cpup(ehci
, &p
.sitd
->hw_uframe
)
652 tag
= Q_NEXT_TYPE(ehci
, p
.sitd
->hw_next
);
653 p
= p
.sitd
->sitd_next
;
660 temp
= scnprintf (next
, size
, "\n");
664 spin_unlock_irqrestore (&ehci
->lock
, flags
);
667 return buf
->alloc_size
- size
;
669 #undef DBG_SCHED_LIMIT
671 static const char *rh_state_string(struct ehci_hcd
*ehci
)
673 switch (ehci
->rh_state
) {
676 case EHCI_RH_SUSPENDED
:
678 case EHCI_RH_RUNNING
:
680 case EHCI_RH_STOPPING
:
686 static ssize_t
fill_registers_buffer(struct debug_buffer
*buf
)
689 struct ehci_hcd
*ehci
;
691 unsigned temp
, size
, i
;
692 char *next
, scratch
[80];
693 static char fmt
[] = "%*s\n";
694 static char label
[] = "";
696 hcd
= bus_to_hcd(buf
->bus
);
697 ehci
= hcd_to_ehci (hcd
);
698 next
= buf
->output_buf
;
699 size
= buf
->alloc_size
;
701 spin_lock_irqsave (&ehci
->lock
, flags
);
703 if (!HCD_HW_ACCESSIBLE(hcd
)) {
704 size
= scnprintf (next
, size
,
705 "bus %s, device %s\n"
707 "SUSPENDED (no register access)\n",
708 hcd
->self
.controller
->bus
->name
,
709 dev_name(hcd
->self
.controller
),
714 /* Capability Registers */
715 i
= HC_VERSION(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
716 temp
= scnprintf (next
, size
,
717 "bus %s, device %s\n"
719 "EHCI %x.%02x, rh state %s\n",
720 hcd
->self
.controller
->bus
->name
,
721 dev_name(hcd
->self
.controller
),
723 i
>> 8, i
& 0x0ff, rh_state_string(ehci
));
728 /* EHCI 0.96 and later may have "extended capabilities" */
729 if (hcd
->self
.controller
->bus
== &pci_bus_type
) {
730 struct pci_dev
*pdev
;
731 u32 offset
, cap
, cap2
;
732 unsigned count
= 256/4;
734 pdev
= to_pci_dev(ehci_to_hcd(ehci
)->self
.controller
);
735 offset
= HCC_EXT_CAPS(ehci_readl(ehci
,
736 &ehci
->caps
->hcc_params
));
737 while (offset
&& count
--) {
738 pci_read_config_dword (pdev
, offset
, &cap
);
739 switch (cap
& 0xff) {
741 temp
= scnprintf (next
, size
,
742 "ownership %08x%s%s\n", cap
,
743 (cap
& (1 << 24)) ? " linux" : "",
744 (cap
& (1 << 16)) ? " firmware" : "");
749 pci_read_config_dword (pdev
, offset
, &cap2
);
750 temp
= scnprintf (next
, size
,
751 "SMI sts/enable 0x%08x\n", cap2
);
755 case 0: /* illegal reserved capability */
758 default: /* unknown */
761 temp
= (cap
>> 8) & 0xff;
766 // FIXME interpret both types of params
767 i
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
768 temp
= scnprintf (next
, size
, "structural params 0x%08x\n", i
);
772 i
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
773 temp
= scnprintf (next
, size
, "capability params 0x%08x\n", i
);
777 /* Operational Registers */
778 temp
= dbg_status_buf (scratch
, sizeof scratch
, label
,
779 ehci_readl(ehci
, &ehci
->regs
->status
));
780 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
784 temp
= dbg_command_buf (scratch
, sizeof scratch
, label
,
785 ehci_readl(ehci
, &ehci
->regs
->command
));
786 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
790 temp
= dbg_intr_buf (scratch
, sizeof scratch
, label
,
791 ehci_readl(ehci
, &ehci
->regs
->intr_enable
));
792 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
796 temp
= scnprintf (next
, size
, "uframe %04x\n",
797 ehci_read_frame_index(ehci
));
801 for (i
= 1; i
<= HCS_N_PORTS (ehci
->hcs_params
); i
++) {
802 temp
= dbg_port_buf (scratch
, sizeof scratch
, label
, i
,
804 &ehci
->regs
->port_status
[i
- 1]));
805 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
808 if (i
== HCS_DEBUG_PORT(ehci
->hcs_params
) && ehci
->debug
) {
809 temp
= scnprintf (next
, size
,
810 " debug control %08x\n",
812 &ehci
->debug
->control
));
818 if (!list_empty(&ehci
->async_unlink
)) {
819 temp
= scnprintf(next
, size
, "async unlink qh %p\n",
820 list_first_entry(&ehci
->async_unlink
,
821 struct ehci_qh
, unlink_node
));
827 temp
= scnprintf (next
, size
,
828 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
829 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.iaa
,
830 ehci
->stats
.lost_iaa
);
834 temp
= scnprintf (next
, size
, "complete %ld unlink %ld\n",
835 ehci
->stats
.complete
, ehci
->stats
.unlink
);
841 spin_unlock_irqrestore (&ehci
->lock
, flags
);
843 return buf
->alloc_size
- size
;
846 static struct debug_buffer
*alloc_buffer(struct usb_bus
*bus
,
847 ssize_t (*fill_func
)(struct debug_buffer
*))
849 struct debug_buffer
*buf
;
851 buf
= kzalloc(sizeof(struct debug_buffer
), GFP_KERNEL
);
855 buf
->fill_func
= fill_func
;
856 mutex_init(&buf
->mutex
);
857 buf
->alloc_size
= PAGE_SIZE
;
863 static int fill_buffer(struct debug_buffer
*buf
)
867 if (!buf
->output_buf
)
868 buf
->output_buf
= vmalloc(buf
->alloc_size
);
870 if (!buf
->output_buf
) {
875 ret
= buf
->fill_func(buf
);
886 static ssize_t
debug_output(struct file
*file
, char __user
*user_buf
,
887 size_t len
, loff_t
*offset
)
889 struct debug_buffer
*buf
= file
->private_data
;
892 mutex_lock(&buf
->mutex
);
893 if (buf
->count
== 0) {
894 ret
= fill_buffer(buf
);
896 mutex_unlock(&buf
->mutex
);
900 mutex_unlock(&buf
->mutex
);
902 ret
= simple_read_from_buffer(user_buf
, len
, offset
,
903 buf
->output_buf
, buf
->count
);
910 static int debug_close(struct inode
*inode
, struct file
*file
)
912 struct debug_buffer
*buf
= file
->private_data
;
915 vfree(buf
->output_buf
);
921 static int debug_async_open(struct inode
*inode
, struct file
*file
)
923 file
->private_data
= alloc_buffer(inode
->i_private
, fill_async_buffer
);
925 return file
->private_data
? 0 : -ENOMEM
;
928 static int debug_periodic_open(struct inode
*inode
, struct file
*file
)
930 struct debug_buffer
*buf
;
931 buf
= alloc_buffer(inode
->i_private
, fill_periodic_buffer
);
935 buf
->alloc_size
= (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE
;
936 file
->private_data
= buf
;
940 static int debug_registers_open(struct inode
*inode
, struct file
*file
)
942 file
->private_data
= alloc_buffer(inode
->i_private
,
943 fill_registers_buffer
);
945 return file
->private_data
? 0 : -ENOMEM
;
948 static inline void create_debug_files (struct ehci_hcd
*ehci
)
950 struct usb_bus
*bus
= &ehci_to_hcd(ehci
)->self
;
952 ehci
->debug_dir
= debugfs_create_dir(bus
->bus_name
, ehci_debug_root
);
953 if (!ehci
->debug_dir
)
956 if (!debugfs_create_file("async", S_IRUGO
, ehci
->debug_dir
, bus
,
960 if (!debugfs_create_file("periodic", S_IRUGO
, ehci
->debug_dir
, bus
,
961 &debug_periodic_fops
))
964 if (!debugfs_create_file("registers", S_IRUGO
, ehci
->debug_dir
, bus
,
965 &debug_registers_fops
))
971 debugfs_remove_recursive(ehci
->debug_dir
);
974 static inline void remove_debug_files (struct ehci_hcd
*ehci
)
976 debugfs_remove_recursive(ehci
->debug_dir
);
979 #endif /* STUB_DEBUG_FILES */