x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / watchdog / sp805_wdt.c
blob2cf02ffbf9d896dad9fa373fd885911526b9324e
1 /*
2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/init.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/kernel.h>
23 #include <linux/math64.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/pm.h>
27 #include <linux/slab.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
32 /* default timeout in seconds */
33 #define DEFAULT_TIMEOUT 60
35 #define MODULE_NAME "sp805-wdt"
37 /* watchdog register offsets and masks */
38 #define WDTLOAD 0x000
39 #define LOAD_MIN 0x00000001
40 #define LOAD_MAX 0xFFFFFFFF
41 #define WDTVALUE 0x004
42 #define WDTCONTROL 0x008
43 /* control register masks */
44 #define INT_ENABLE (1 << 0)
45 #define RESET_ENABLE (1 << 1)
46 #define WDTINTCLR 0x00C
47 #define WDTRIS 0x010
48 #define WDTMIS 0x014
49 #define INT_MASK (1 << 0)
50 #define WDTLOCK 0xC00
51 #define UNLOCK 0x1ACCE551
52 #define LOCK 0x00000001
54 /**
55 * struct sp805_wdt: sp805 wdt device structure
56 * @wdd: instance of struct watchdog_device
57 * @lock: spin lock protecting dev structure and io access
58 * @base: base address of wdt
59 * @clk: clock structure of wdt
60 * @adev: amba device structure of wdt
61 * @status: current status of wdt
62 * @load_val: load value to be set for current timeout
64 struct sp805_wdt {
65 struct watchdog_device wdd;
66 spinlock_t lock;
67 void __iomem *base;
68 struct clk *clk;
69 struct amba_device *adev;
70 unsigned int load_val;
73 static bool nowayout = WATCHDOG_NOWAYOUT;
74 module_param(nowayout, bool, 0);
75 MODULE_PARM_DESC(nowayout,
76 "Set to 1 to keep watchdog running after device release");
78 /* This routine finds load value that will reset system in required timout */
79 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
81 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
82 u64 load, rate;
84 rate = clk_get_rate(wdt->clk);
87 * sp805 runs counter with given value twice, after the end of first
88 * counter it gives an interrupt and then starts counter again. If
89 * interrupt already occurred then it resets the system. This is why
90 * load is half of what should be required.
92 load = div_u64(rate, 2) * timeout - 1;
94 load = (load > LOAD_MAX) ? LOAD_MAX : load;
95 load = (load < LOAD_MIN) ? LOAD_MIN : load;
97 spin_lock(&wdt->lock);
98 wdt->load_val = load;
99 /* roundup timeout to closest positive integer value */
100 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
101 spin_unlock(&wdt->lock);
103 return 0;
106 /* returns number of seconds left for reset to occur */
107 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
109 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
110 u64 load, rate;
112 rate = clk_get_rate(wdt->clk);
114 spin_lock(&wdt->lock);
115 load = readl_relaxed(wdt->base + WDTVALUE);
117 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
118 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
119 load += wdt->load_val + 1;
120 spin_unlock(&wdt->lock);
122 return div_u64(load, rate);
125 static int wdt_config(struct watchdog_device *wdd, bool ping)
127 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
128 int ret;
130 if (!ping) {
132 ret = clk_prepare_enable(wdt->clk);
133 if (ret) {
134 dev_err(&wdt->adev->dev, "clock enable fail");
135 return ret;
139 spin_lock(&wdt->lock);
141 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
142 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
144 if (!ping) {
145 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
146 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
147 WDTCONTROL);
150 writel_relaxed(LOCK, wdt->base + WDTLOCK);
152 /* Flush posted writes. */
153 readl_relaxed(wdt->base + WDTLOCK);
154 spin_unlock(&wdt->lock);
156 return 0;
159 static int wdt_ping(struct watchdog_device *wdd)
161 return wdt_config(wdd, true);
164 /* enables watchdog timers reset */
165 static int wdt_enable(struct watchdog_device *wdd)
167 return wdt_config(wdd, false);
170 /* disables watchdog timers reset */
171 static int wdt_disable(struct watchdog_device *wdd)
173 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
175 spin_lock(&wdt->lock);
177 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
178 writel_relaxed(0, wdt->base + WDTCONTROL);
179 writel_relaxed(LOCK, wdt->base + WDTLOCK);
181 /* Flush posted writes. */
182 readl_relaxed(wdt->base + WDTLOCK);
183 spin_unlock(&wdt->lock);
185 clk_disable_unprepare(wdt->clk);
187 return 0;
190 static const struct watchdog_info wdt_info = {
191 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
192 .identity = MODULE_NAME,
195 static const struct watchdog_ops wdt_ops = {
196 .owner = THIS_MODULE,
197 .start = wdt_enable,
198 .stop = wdt_disable,
199 .ping = wdt_ping,
200 .set_timeout = wdt_setload,
201 .get_timeleft = wdt_timeleft,
204 static int
205 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
207 struct sp805_wdt *wdt;
208 int ret = 0;
210 if (!devm_request_mem_region(&adev->dev, adev->res.start,
211 resource_size(&adev->res), "sp805_wdt")) {
212 dev_warn(&adev->dev, "Failed to get memory region resource\n");
213 ret = -ENOENT;
214 goto err;
217 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
218 if (!wdt) {
219 dev_warn(&adev->dev, "Kzalloc failed\n");
220 ret = -ENOMEM;
221 goto err;
224 wdt->base = devm_ioremap(&adev->dev, adev->res.start,
225 resource_size(&adev->res));
226 if (!wdt->base) {
227 ret = -ENOMEM;
228 dev_warn(&adev->dev, "ioremap fail\n");
229 goto err;
232 wdt->clk = devm_clk_get(&adev->dev, NULL);
233 if (IS_ERR(wdt->clk)) {
234 dev_warn(&adev->dev, "Clock not found\n");
235 ret = PTR_ERR(wdt->clk);
236 goto err;
239 wdt->adev = adev;
240 wdt->wdd.info = &wdt_info;
241 wdt->wdd.ops = &wdt_ops;
243 spin_lock_init(&wdt->lock);
244 watchdog_set_nowayout(&wdt->wdd, nowayout);
245 watchdog_set_drvdata(&wdt->wdd, wdt);
246 wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
248 ret = watchdog_register_device(&wdt->wdd);
249 if (ret) {
250 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
251 ret);
252 goto err;
254 amba_set_drvdata(adev, wdt);
256 dev_info(&adev->dev, "registration successful\n");
257 return 0;
259 err:
260 dev_err(&adev->dev, "Probe Failed!!!\n");
261 return ret;
264 static int sp805_wdt_remove(struct amba_device *adev)
266 struct sp805_wdt *wdt = amba_get_drvdata(adev);
268 watchdog_unregister_device(&wdt->wdd);
269 amba_set_drvdata(adev, NULL);
270 watchdog_set_drvdata(&wdt->wdd, NULL);
272 return 0;
275 static int __maybe_unused sp805_wdt_suspend(struct device *dev)
277 struct sp805_wdt *wdt = dev_get_drvdata(dev);
279 if (watchdog_active(&wdt->wdd))
280 return wdt_disable(&wdt->wdd);
282 return 0;
285 static int __maybe_unused sp805_wdt_resume(struct device *dev)
287 struct sp805_wdt *wdt = dev_get_drvdata(dev);
289 if (watchdog_active(&wdt->wdd))
290 return wdt_enable(&wdt->wdd);
292 return 0;
295 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
296 sp805_wdt_resume);
298 static struct amba_id sp805_wdt_ids[] = {
300 .id = 0x00141805,
301 .mask = 0x00ffffff,
303 { 0, 0 },
306 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
308 static struct amba_driver sp805_wdt_driver = {
309 .drv = {
310 .name = MODULE_NAME,
311 .pm = &sp805_wdt_dev_pm_ops,
313 .id_table = sp805_wdt_ids,
314 .probe = sp805_wdt_probe,
315 .remove = sp805_wdt_remove,
318 module_amba_driver(sp805_wdt_driver);
320 MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
321 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
322 MODULE_LICENSE("GPL");