sound/soc/codecs/tas5086.c

   1 /*
   2  * TAS5086 ASoC codec driver
   3  *
   4  * Copyright (c) 2013 Daniel Mack <zonque@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * TODO:
  17  *  - implement DAPM and input muxing
  18  *  - implement modulation limit
  19  *  - implement non-default PWM start
  20  *
  21  * Note that this chip has a very unusual register layout, specifically
  22  * because the registers are of unequal size, and multi-byte registers
  23  * require bulk writes to take effect. Regmap does not support that kind
  24  * of devices.
  25  *
  26  * Currently, the driver does not touch any of the registers >= 0x20, so
  27  * it doesn't matter because the entire map can be accessed as 8-bit
  28  * array. In case more features will be added in the future
  29  * that require access to higher registers, the entire regmap H/W I/O
  30  * routines have to be open-coded.
  31  */
  32
  33 #include <linux/module.h>
  34 #include <linux/slab.h>
  35 #include <linux/delay.h>
  36 #include <linux/gpio.h>
  37 #include <linux/i2c.h>
  38 #include <linux/regmap.h>
  39 #include <linux/spi/spi.h>
  40 #include <linux/of_device.h>
  41 #include <linux/of_gpio.h>
  42 #include <sound/pcm.h>
  43 #include <sound/pcm_params.h>
  44 #include <sound/soc.h>
  45 #include <sound/tlv.h>
  46 #include <sound/tas5086.h>
  47
  48 #define TAS5086_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE  |         \
  49                              SNDRV_PCM_FMTBIT_S20_3LE |         \
  50                              SNDRV_PCM_FMTBIT_S24_3LE)
  51
  52 #define TAS5086_PCM_RATES   (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100  | \
  53                              SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200  | \
  54                              SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
  55                              SNDRV_PCM_RATE_192000)
  56
  57 /*
  58  * TAS5086 registers
  59  */
  60 #define TAS5086_CLOCK_CONTROL           0x00    /* Clock control register  */
  61 #define TAS5086_CLOCK_RATE(val)         (val << 5)
  62 #define TAS5086_CLOCK_RATE_MASK         (0x7 << 5)
  63 #define TAS5086_CLOCK_RATIO(val)        (val << 2)
  64 #define TAS5086_CLOCK_RATIO_MASK        (0x7 << 2)
  65 #define TAS5086_CLOCK_SCLK_RATIO_48     (1 << 1)
  66 #define TAS5086_CLOCK_VALID             (1 << 0)
  67
  68 #define TAS5086_DEEMPH_MASK             0x03
  69 #define TAS5086_SOFT_MUTE_ALL           0x3f
  70
  71 #define TAS5086_DEV_ID                  0x01    /* Device ID register */
  72 #define TAS5086_ERROR_STATUS            0x02    /* Error status register */
  73 #define TAS5086_SYS_CONTROL_1           0x03    /* System control register 1 */
  74 #define TAS5086_SERIAL_DATA_IF          0x04    /* Serial data interface register  */
  75 #define TAS5086_SYS_CONTROL_2           0x05    /* System control register 2 */
  76 #define TAS5086_SOFT_MUTE               0x06    /* Soft mute register */
  77 #define TAS5086_MASTER_VOL              0x07    /* Master volume  */
  78 #define TAS5086_CHANNEL_VOL(X)          (0x08 + (X))    /* Channel 1-6 volume */
  79 #define TAS5086_VOLUME_CONTROL          0x09    /* Volume control register */
  80 #define TAS5086_MOD_LIMIT               0x10    /* Modulation limit register */
  81 #define TAS5086_PWM_START               0x18    /* PWM start register */
  82 #define TAS5086_SURROUND                0x19    /* Surround register */
  83 #define TAS5086_SPLIT_CAP_CHARGE        0x1a    /* Split cap charge period register */
  84 #define TAS5086_OSC_TRIM                0x1b    /* Oscillator trim register */
  85 #define TAS5086_BKNDERR                 0x1c
  86 #define TAS5086_INPUT_MUX               0x20
  87 #define TAS5086_PWM_OUTPUT_MUX          0x25
  88
  89 #define TAS5086_MAX_REGISTER            TAS5086_PWM_OUTPUT_MUX
  90
  91 #define TAS5086_PWM_START_MIDZ_FOR_START_1      (1 << 7)
  92 #define TAS5086_PWM_START_MIDZ_FOR_START_2      (1 << 6)
  93 #define TAS5086_PWM_START_CHANNEL_MASK          (0x3f)
  94
  95 /*
  96  * Default TAS5086 power-up configuration
  97  */
  98 static const struct reg_default tas5086_reg_defaults[] = {
  99         { 0x00, 0x6c },
 100         { 0x01, 0x03 },
 101         { 0x02, 0x00 },
 102         { 0x03, 0xa0 },
 103         { 0x04, 0x05 },
 104         { 0x05, 0x60 },
 105         { 0x06, 0x00 },
 106         { 0x07, 0xff },
 107         { 0x08, 0x30 },
 108         { 0x09, 0x30 },
 109         { 0x0a, 0x30 },
 110         { 0x0b, 0x30 },
 111         { 0x0c, 0x30 },
 112         { 0x0d, 0x30 },
 113         { 0x0e, 0xb1 },
 114         { 0x0f, 0x00 },
 115         { 0x10, 0x02 },
 116         { 0x11, 0x00 },
 117         { 0x12, 0x00 },
 118         { 0x13, 0x00 },
 119         { 0x14, 0x00 },
 120         { 0x15, 0x00 },
 121         { 0x16, 0x00 },
 122         { 0x17, 0x00 },
 123         { 0x18, 0x3f },
 124         { 0x19, 0x00 },
 125         { 0x1a, 0x18 },
 126         { 0x1b, 0x82 },
 127         { 0x1c, 0x05 },
 128 };
 129
 130 static int tas5086_register_size(struct device *dev, unsigned int reg)
 131 {
 132         switch (reg) {
 133         case TAS5086_CLOCK_CONTROL ... TAS5086_BKNDERR:
 134                 return 1;
 135         case TAS5086_INPUT_MUX:
 136         case TAS5086_PWM_OUTPUT_MUX:
 137                 return 4;
 138         }
 139
 140         dev_err(dev, "Unsupported register address: %d\n", reg);
 141         return 0;
 142 }
 143
 144 static bool tas5086_accessible_reg(struct device *dev, unsigned int reg)
 145 {
 146         switch (reg) {
 147         case 0x0f:
 148         case 0x11 ... 0x17:
 149         case 0x1d ... 0x1f:
 150                 return false;
 151         default:
 152                 return true;
 153         }
 154 }
 155
 156 static bool tas5086_volatile_reg(struct device *dev, unsigned int reg)
 157 {
 158         switch (reg) {
 159         case TAS5086_DEV_ID:
 160         case TAS5086_ERROR_STATUS:
 161                 return true;
 162         }
 163
 164         return false;
 165 }
 166
 167 static bool tas5086_writeable_reg(struct device *dev, unsigned int reg)
 168 {
 169         return tas5086_accessible_reg(dev, reg) && (reg != TAS5086_DEV_ID);
 170 }
 171
 172 static int tas5086_reg_write(void *context, unsigned int reg,
 173                               unsigned int value)
 174 {
 175         struct i2c_client *client = context;
 176         unsigned int i, size;
 177         uint8_t buf[5];
 178         int ret;
 179
 180         size = tas5086_register_size(&client->dev, reg);
 181         if (size == 0)
 182                 return -EINVAL;
 183
 184         buf[0] = reg;
 185
 186         for (i = size; i >= 1; --i) {
 187                 buf[i] = value;
 188                 value >>= 8;
 189         }
 190
 191         ret = i2c_master_send(client, buf, size + 1);
 192         if (ret == size + 1)
 193                 return 0;
 194         else if (ret < 0)
 195                 return ret;
 196         else
 197                 return -EIO;
 198 }
 199
 200 static int tas5086_reg_read(void *context, unsigned int reg,
 201                              unsigned int *value)
 202 {
 203         struct i2c_client *client = context;
 204         uint8_t send_buf, recv_buf[4];
 205         struct i2c_msg msgs[2];
 206         unsigned int size;
 207         unsigned int i;
 208         int ret;
 209
 210         size = tas5086_register_size(&client->dev, reg);
 211         if (size == 0)
 212                 return -EINVAL;
 213
 214         send_buf = reg;
 215
 216         msgs[0].addr = client->addr;
 217         msgs[0].len = sizeof(send_buf);
 218         msgs[0].buf = &send_buf;
 219         msgs[0].flags = 0;
 220
 221         msgs[1].addr = client->addr;
 222         msgs[1].len = size;
 223         msgs[1].buf = recv_buf;
 224         msgs[1].flags = I2C_M_RD;
 225
 226         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 227         if (ret < 0)
 228                 return ret;
 229         else if (ret != ARRAY_SIZE(msgs))
 230                 return -EIO;
 231
 232         *value = 0;
 233
 234         for (i = 0; i < size; i++) {
 235                 *value <<= 8;
 236                 *value |= recv_buf[i];
 237         }
 238
 239         return 0;
 240 }
 241
 242 struct tas5086_private {
 243         struct regmap   *regmap;
 244         unsigned int    mclk, sclk;
 245         unsigned int    format;
 246         bool            deemph;
 247         /* Current sample rate for de-emphasis control */
 248         int             rate;
 249         /* GPIO driving Reset pin, if any */
 250         int             gpio_nreset;
 251 };
 252
 253 static int tas5086_deemph[] = { 0, 32000, 44100, 48000 };
 254
 255 static int tas5086_set_deemph(struct snd_soc_codec *codec)
 256 {
 257         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 258         int i, val = 0;
 259
 260         if (priv->deemph)
 261                 for (i = 0; i < ARRAY_SIZE(tas5086_deemph); i++)
 262                         if (tas5086_deemph[i] == priv->rate)
 263                                 val = i;
 264
 265         return regmap_update_bits(priv->regmap, TAS5086_SYS_CONTROL_1,
 266                                   TAS5086_DEEMPH_MASK, val);
 267 }
 268
 269 static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
 270                               struct snd_ctl_elem_value *ucontrol)
 271 {
 272         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 273         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 274
 275         ucontrol->value.enumerated.item[0] = priv->deemph;
 276
 277         return 0;
 278 }
 279
 280 static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
 281                               struct snd_ctl_elem_value *ucontrol)
 282 {
 283         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 284         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 285
 286         priv->deemph = ucontrol->value.enumerated.item[0];
 287
 288         return tas5086_set_deemph(codec);
 289 }
 290
 291
 292 static int tas5086_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 293                                   int clk_id, unsigned int freq, int dir)
 294 {
 295         struct snd_soc_codec *codec = codec_dai->codec;
 296         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 297
 298         switch (clk_id) {
 299         case TAS5086_CLK_IDX_MCLK:
 300                 priv->mclk = freq;
 301                 break;
 302         case TAS5086_CLK_IDX_SCLK:
 303                 priv->sclk = freq;
 304                 break;
 305         }
 306
 307         return 0;
 308 }
 309
 310 static int tas5086_set_dai_fmt(struct snd_soc_dai *codec_dai,
 311                                unsigned int format)
 312 {
 313         struct snd_soc_codec *codec = codec_dai->codec;
 314         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 315
 316         /* The TAS5086 can only be slave to all clocks */
 317         if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
 318                 dev_err(codec->dev, "Invalid clocking mode\n");
 319                 return -EINVAL;
 320         }
 321
 322         /* we need to refer to the data format from hw_params() */
 323         priv->format = format;
 324
 325         return 0;
 326 }
 327
 328 static const int tas5086_sample_rates[] = {
 329         32000, 38000, 44100, 48000, 88200, 96000, 176400, 192000
 330 };
 331
 332 static const int tas5086_ratios[] = {
 333         64, 128, 192, 256, 384, 512
 334 };
 335
 336 static int index_in_array(const int *array, int len, int needle)
 337 {
 338         int i;
 339
 340         for (i = 0; i < len; i++)
 341                 if (array[i] == needle)
 342                         return i;
 343
 344         return -ENOENT;
 345 }
 346
 347 static int tas5086_hw_params(struct snd_pcm_substream *substream,
 348                              struct snd_pcm_hw_params *params,
 349                              struct snd_soc_dai *dai)
 350 {
 351         struct snd_soc_codec *codec = dai->codec;
 352         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 353         int val;
 354         int ret;
 355
 356         priv->rate = params_rate(params);
 357
 358         /* Look up the sample rate and refer to the offset in the list */
 359         val = index_in_array(tas5086_sample_rates,
 360                              ARRAY_SIZE(tas5086_sample_rates), priv->rate);
 361
 362         if (val < 0) {
 363                 dev_err(codec->dev, "Invalid sample rate\n");
 364                 return -EINVAL;
 365         }
 366
 367         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 368                                  TAS5086_CLOCK_RATE_MASK,
 369                                  TAS5086_CLOCK_RATE(val));
 370         if (ret < 0)
 371                 return ret;
 372
 373         /* MCLK / Fs ratio */
 374         val = index_in_array(tas5086_ratios, ARRAY_SIZE(tas5086_ratios),
 375                              priv->mclk / priv->rate);
 376         if (val < 0) {
 377                 dev_err(codec->dev, "Inavlid MCLK / Fs ratio\n");
 378                 return -EINVAL;
 379         }
 380
 381         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 382                                  TAS5086_CLOCK_RATIO_MASK,
 383                                  TAS5086_CLOCK_RATIO(val));
 384         if (ret < 0)
 385                 return ret;
 386
 387
 388         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 389                                  TAS5086_CLOCK_SCLK_RATIO_48,
 390                                  (priv->sclk == 48 * priv->rate) ?
 391                                         TAS5086_CLOCK_SCLK_RATIO_48 : 0);
 392         if (ret < 0)
 393                 return ret;
 394
 395         /*
 396          * The chip has a very unituitive register mapping and muxes information
 397          * about data format and sample depth into the same register, but not on
 398          * a logical bit-boundary. Hence, we have to refer to the format passed
 399          * in the set_dai_fmt() callback and set up everything from here.
 400          *
 401          * First, determine the 'base' value, using the format ...
 402          */
 403         switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
 404         case SND_SOC_DAIFMT_RIGHT_J:
 405                 val = 0x00;
 406                 break;
 407         case SND_SOC_DAIFMT_I2S:
 408                 val = 0x03;
 409                 break;
 410         case SND_SOC_DAIFMT_LEFT_J:
 411                 val = 0x06;
 412                 break;
 413         default:
 414                 dev_err(codec->dev, "Invalid DAI format\n");
 415                 return -EINVAL;
 416         }
 417
 418         /* ... then add the offset for the sample bit depth. */
 419         switch (params_format(params)) {
 420         case SNDRV_PCM_FORMAT_S16_LE:
 421                 val += 0;
 422                 break;
 423         case SNDRV_PCM_FORMAT_S20_3LE:
 424                 val += 1;
 425                 break;
 426         case SNDRV_PCM_FORMAT_S24_3LE:
 427                 val += 2;
 428                 break;
 429         default:
 430                 dev_err(codec->dev, "Invalid bit width\n");
 431                 return -EINVAL;
 432         };
 433
 434         ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val);
 435         if (ret < 0)
 436                 return ret;
 437
 438         /* clock is considered valid now */
 439         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 440                                  TAS5086_CLOCK_VALID, TAS5086_CLOCK_VALID);
 441         if (ret < 0)
 442                 return ret;
 443
 444         return tas5086_set_deemph(codec);
 445 }
 446
 447 static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
 448 {
 449         struct snd_soc_codec *codec = dai->codec;
 450         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 451         unsigned int val = 0;
 452
 453         if (mute)
 454                 val = TAS5086_SOFT_MUTE_ALL;
 455
 456         return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val);
 457 }
 458
 459 /* TAS5086 controls */
 460 static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1);
 461
 462 static const struct snd_kcontrol_new tas5086_controls[] = {
 463         SOC_SINGLE_TLV("Master Playback Volume", TAS5086_MASTER_VOL,
 464                        0, 0xff, 1, tas5086_dac_tlv),
 465         SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
 466                          TAS5086_CHANNEL_VOL(0), TAS5086_CHANNEL_VOL(1),
 467                          0, 0xff, 1, tas5086_dac_tlv),
 468         SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
 469                          TAS5086_CHANNEL_VOL(2), TAS5086_CHANNEL_VOL(3),
 470                          0, 0xff, 1, tas5086_dac_tlv),
 471         SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
 472                          TAS5086_CHANNEL_VOL(4), TAS5086_CHANNEL_VOL(5),
 473                          0, 0xff, 1, tas5086_dac_tlv),
 474         SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0,
 475                             tas5086_get_deemph, tas5086_put_deemph),
 476 };
 477
 478 /* Input mux controls */
 479 static const char *tas5086_dapm_sdin_texts[] =
 480 {
 481         "SDIN1-L", "SDIN1-R", "SDIN2-L", "SDIN2-R",
 482         "SDIN3-L", "SDIN3-R", "Ground (0)", "nc"
 483 };
 484
 485 static const struct soc_enum tas5086_dapm_input_mux_enum[] = {
 486         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 20, 8, tas5086_dapm_sdin_texts),
 487         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 16, 8, tas5086_dapm_sdin_texts),
 488         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 12, 8, tas5086_dapm_sdin_texts),
 489         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 8,  8, tas5086_dapm_sdin_texts),
 490         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 4,  8, tas5086_dapm_sdin_texts),
 491         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 0,  8, tas5086_dapm_sdin_texts),
 492 };
 493
 494 static const struct snd_kcontrol_new tas5086_dapm_input_mux_controls[] = {
 495         SOC_DAPM_ENUM("Channel 1 input", tas5086_dapm_input_mux_enum[0]),
 496         SOC_DAPM_ENUM("Channel 2 input", tas5086_dapm_input_mux_enum[1]),
 497         SOC_DAPM_ENUM("Channel 3 input", tas5086_dapm_input_mux_enum[2]),
 498         SOC_DAPM_ENUM("Channel 4 input", tas5086_dapm_input_mux_enum[3]),
 499         SOC_DAPM_ENUM("Channel 5 input", tas5086_dapm_input_mux_enum[4]),
 500         SOC_DAPM_ENUM("Channel 6 input", tas5086_dapm_input_mux_enum[5]),
 501 };
 502
 503 /* Output mux controls */
 504 static const char *tas5086_dapm_channel_texts[] =
 505         { "Channel 1 Mux", "Channel 2 Mux", "Channel 3 Mux",
 506           "Channel 4 Mux", "Channel 5 Mux", "Channel 6 Mux" };
 507
 508 static const struct soc_enum tas5086_dapm_output_mux_enum[] = {
 509         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 20, 6, tas5086_dapm_channel_texts),
 510         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 16, 6, tas5086_dapm_channel_texts),
 511         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 12, 6, tas5086_dapm_channel_texts),
 512         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 8,  6, tas5086_dapm_channel_texts),
 513         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 4,  6, tas5086_dapm_channel_texts),
 514         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 0,  6, tas5086_dapm_channel_texts),
 515 };
 516
 517 static const struct snd_kcontrol_new tas5086_dapm_output_mux_controls[] = {
 518         SOC_DAPM_ENUM("PWM1 Output", tas5086_dapm_output_mux_enum[0]),
 519         SOC_DAPM_ENUM("PWM2 Output", tas5086_dapm_output_mux_enum[1]),
 520         SOC_DAPM_ENUM("PWM3 Output", tas5086_dapm_output_mux_enum[2]),
 521         SOC_DAPM_ENUM("PWM4 Output", tas5086_dapm_output_mux_enum[3]),
 522         SOC_DAPM_ENUM("PWM5 Output", tas5086_dapm_output_mux_enum[4]),
 523         SOC_DAPM_ENUM("PWM6 Output", tas5086_dapm_output_mux_enum[5]),
 524 };
 525
 526 static const struct snd_soc_dapm_widget tas5086_dapm_widgets[] = {
 527         SND_SOC_DAPM_INPUT("SDIN1-L"),
 528         SND_SOC_DAPM_INPUT("SDIN1-R"),
 529         SND_SOC_DAPM_INPUT("SDIN2-L"),
 530         SND_SOC_DAPM_INPUT("SDIN2-R"),
 531         SND_SOC_DAPM_INPUT("SDIN3-L"),
 532         SND_SOC_DAPM_INPUT("SDIN3-R"),
 533         SND_SOC_DAPM_INPUT("SDIN4-L"),
 534         SND_SOC_DAPM_INPUT("SDIN4-R"),
 535
 536         SND_SOC_DAPM_OUTPUT("PWM1"),
 537         SND_SOC_DAPM_OUTPUT("PWM2"),
 538         SND_SOC_DAPM_OUTPUT("PWM3"),
 539         SND_SOC_DAPM_OUTPUT("PWM4"),
 540         SND_SOC_DAPM_OUTPUT("PWM5"),
 541         SND_SOC_DAPM_OUTPUT("PWM6"),
 542
 543         SND_SOC_DAPM_MUX("Channel 1 Mux", SND_SOC_NOPM, 0, 0,
 544                          &tas5086_dapm_input_mux_controls[0]),
 545         SND_SOC_DAPM_MUX("Channel 2 Mux", SND_SOC_NOPM, 0, 0,
 546                          &tas5086_dapm_input_mux_controls[1]),
 547         SND_SOC_DAPM_MUX("Channel 3 Mux", SND_SOC_NOPM, 0, 0,
 548                          &tas5086_dapm_input_mux_controls[2]),
 549         SND_SOC_DAPM_MUX("Channel 4 Mux", SND_SOC_NOPM, 0, 0,
 550                          &tas5086_dapm_input_mux_controls[3]),
 551         SND_SOC_DAPM_MUX("Channel 5 Mux", SND_SOC_NOPM, 0, 0,
 552                          &tas5086_dapm_input_mux_controls[4]),
 553         SND_SOC_DAPM_MUX("Channel 6 Mux", SND_SOC_NOPM, 0, 0,
 554                          &tas5086_dapm_input_mux_controls[5]),
 555
 556         SND_SOC_DAPM_MUX("PWM1 Mux", SND_SOC_NOPM, 0, 0,
 557                          &tas5086_dapm_output_mux_controls[0]),
 558         SND_SOC_DAPM_MUX("PWM2 Mux", SND_SOC_NOPM, 0, 0,
 559                          &tas5086_dapm_output_mux_controls[1]),
 560         SND_SOC_DAPM_MUX("PWM3 Mux", SND_SOC_NOPM, 0, 0,
 561                          &tas5086_dapm_output_mux_controls[2]),
 562         SND_SOC_DAPM_MUX("PWM4 Mux", SND_SOC_NOPM, 0, 0,
 563                          &tas5086_dapm_output_mux_controls[3]),
 564         SND_SOC_DAPM_MUX("PWM5 Mux", SND_SOC_NOPM, 0, 0,
 565                          &tas5086_dapm_output_mux_controls[4]),
 566         SND_SOC_DAPM_MUX("PWM6 Mux", SND_SOC_NOPM, 0, 0,
 567                          &tas5086_dapm_output_mux_controls[5]),
 568 };
 569
 570 static const struct snd_soc_dapm_route tas5086_dapm_routes[] = {
 571         /* SDIN inputs -> channel muxes */
 572         { "Channel 1 Mux", "SDIN1-L", "SDIN1-L" },
 573         { "Channel 1 Mux", "SDIN1-R", "SDIN1-R" },
 574         { "Channel 1 Mux", "SDIN2-L", "SDIN2-L" },
 575         { "Channel 1 Mux", "SDIN2-R", "SDIN2-R" },
 576         { "Channel 1 Mux", "SDIN3-L", "SDIN3-L" },
 577         { "Channel 1 Mux", "SDIN3-R", "SDIN3-R" },
 578
 579         { "Channel 2 Mux", "SDIN1-L", "SDIN1-L" },
 580         { "Channel 2 Mux", "SDIN1-R", "SDIN1-R" },
 581         { "Channel 2 Mux", "SDIN2-L", "SDIN2-L" },
 582         { "Channel 2 Mux", "SDIN2-R", "SDIN2-R" },
 583         { "Channel 2 Mux", "SDIN3-L", "SDIN3-L" },
 584         { "Channel 2 Mux", "SDIN3-R", "SDIN3-R" },
 585
 586         { "Channel 2 Mux", "SDIN1-L", "SDIN1-L" },
 587         { "Channel 2 Mux", "SDIN1-R", "SDIN1-R" },
 588         { "Channel 2 Mux", "SDIN2-L", "SDIN2-L" },
 589         { "Channel 2 Mux", "SDIN2-R", "SDIN2-R" },
 590         { "Channel 2 Mux", "SDIN3-L", "SDIN3-L" },
 591         { "Channel 2 Mux", "SDIN3-R", "SDIN3-R" },
 592
 593         { "Channel 3 Mux", "SDIN1-L", "SDIN1-L" },
 594         { "Channel 3 Mux", "SDIN1-R", "SDIN1-R" },
 595         { "Channel 3 Mux", "SDIN2-L", "SDIN2-L" },
 596         { "Channel 3 Mux", "SDIN2-R", "SDIN2-R" },
 597         { "Channel 3 Mux", "SDIN3-L", "SDIN3-L" },
 598         { "Channel 3 Mux", "SDIN3-R", "SDIN3-R" },
 599
 600         { "Channel 4 Mux", "SDIN1-L", "SDIN1-L" },
 601         { "Channel 4 Mux", "SDIN1-R", "SDIN1-R" },
 602         { "Channel 4 Mux", "SDIN2-L", "SDIN2-L" },
 603         { "Channel 4 Mux", "SDIN2-R", "SDIN2-R" },
 604         { "Channel 4 Mux", "SDIN3-L", "SDIN3-L" },
 605         { "Channel 4 Mux", "SDIN3-R", "SDIN3-R" },
 606
 607         { "Channel 5 Mux", "SDIN1-L", "SDIN1-L" },
 608         { "Channel 5 Mux", "SDIN1-R", "SDIN1-R" },
 609         { "Channel 5 Mux", "SDIN2-L", "SDIN2-L" },
 610         { "Channel 5 Mux", "SDIN2-R", "SDIN2-R" },
 611         { "Channel 5 Mux", "SDIN3-L", "SDIN3-L" },
 612         { "Channel 5 Mux", "SDIN3-R", "SDIN3-R" },
 613
 614         { "Channel 6 Mux", "SDIN1-L", "SDIN1-L" },
 615         { "Channel 6 Mux", "SDIN1-R", "SDIN1-R" },
 616         { "Channel 6 Mux", "SDIN2-L", "SDIN2-L" },
 617         { "Channel 6 Mux", "SDIN2-R", "SDIN2-R" },
 618         { "Channel 6 Mux", "SDIN3-L", "SDIN3-L" },
 619         { "Channel 6 Mux", "SDIN3-R", "SDIN3-R" },
 620
 621         /* Channel muxes -> PWM muxes */
 622         { "PWM1 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 623         { "PWM2 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 624         { "PWM3 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 625         { "PWM4 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 626         { "PWM5 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 627         { "PWM6 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 628
 629         { "PWM1 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 630         { "PWM2 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 631         { "PWM3 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 632         { "PWM4 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 633         { "PWM5 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 634         { "PWM6 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 635
 636         { "PWM1 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 637         { "PWM2 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 638         { "PWM3 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 639         { "PWM4 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 640         { "PWM5 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 641         { "PWM6 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 642
 643         { "PWM1 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 644         { "PWM2 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 645         { "PWM3 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 646         { "PWM4 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 647         { "PWM5 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 648         { "PWM6 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 649
 650         { "PWM1 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 651         { "PWM2 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 652         { "PWM3 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 653         { "PWM4 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 654         { "PWM5 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 655         { "PWM6 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 656
 657         { "PWM1 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 658         { "PWM2 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 659         { "PWM3 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 660         { "PWM4 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 661         { "PWM5 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 662         { "PWM6 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 663
 664         /* The PWM muxes are directly connected to the PWM outputs */
 665         { "PWM1", NULL, "PWM1 Mux" },
 666         { "PWM2", NULL, "PWM2 Mux" },
 667         { "PWM3", NULL, "PWM3 Mux" },
 668         { "PWM4", NULL, "PWM4 Mux" },
 669         { "PWM5", NULL, "PWM5 Mux" },
 670         { "PWM6", NULL, "PWM6 Mux" },
 671
 672 };
 673
 674 static const struct snd_soc_dai_ops tas5086_dai_ops = {
 675         .hw_params      = tas5086_hw_params,
 676         .set_sysclk     = tas5086_set_dai_sysclk,
 677         .set_fmt        = tas5086_set_dai_fmt,
 678         .mute_stream    = tas5086_mute_stream,
 679 };
 680
 681 static struct snd_soc_dai_driver tas5086_dai = {
 682         .name = "tas5086-hifi",
 683         .playback = {
 684                 .stream_name    = "Playback",
 685                 .channels_min   = 2,
 686                 .channels_max   = 6,
 687                 .rates          = TAS5086_PCM_RATES,
 688                 .formats        = TAS5086_PCM_FORMATS,
 689         },
 690         .ops = &tas5086_dai_ops,
 691 };
 692
 693 #ifdef CONFIG_PM
 694 static int tas5086_soc_resume(struct snd_soc_codec *codec)
 695 {
 696         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 697
 698         /* Restore codec state */
 699         return regcache_sync(priv->regmap);
 700 }
 701 #else
 702 #define tas5086_soc_resume      NULL
 703 #endif /* CONFIG_PM */
 704
 705 #ifdef CONFIG_OF
 706 static const struct of_device_id tas5086_dt_ids[] = {
 707         { .compatible = "ti,tas5086", },
 708         { }
 709 };
 710 MODULE_DEVICE_TABLE(of, tas5086_dt_ids);
 711 #endif
 712
 713 /* charge period values in microseconds */
 714 static const int tas5086_charge_period[] = {
 715           13000,  16900,   23400,   31200,   41600,   54600,   72800,   96200,
 716          130000, 156000,  234000,  312000,  416000,  546000,  728000,  962000,
 717         1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000,
 718 };
 719
 720 static int tas5086_probe(struct snd_soc_codec *codec)
 721 {
 722         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 723         int charge_period = 1300000; /* hardware default is 1300 ms */
 724         u8 pwm_start_mid_z = 0;
 725         int i, ret;
 726
 727         if (of_match_device(of_match_ptr(tas5086_dt_ids), codec->dev)) {
 728                 struct device_node *of_node = codec->dev->of_node;
 729                 of_property_read_u32(of_node, "ti,charge-period", &charge_period);
 730
 731                 for (i = 0; i < 6; i++) {
 732                         char name[25];
 733
 734                         snprintf(name, sizeof(name),
 735                                  "ti,mid-z-channel-%d", i + 1);
 736
 737                         if (of_get_property(of_node, name, NULL) != NULL)
 738                                 pwm_start_mid_z |= 1 << i;
 739                 }
 740         }
 741
 742         /*
 743          * If any of the channels is configured to start in Mid-Z mode,
 744          * configure 'part 1' of the PWM starts to use Mid-Z, and tell
 745          * all configured mid-z channels to start start under 'part 1'.
 746          */
 747         if (pwm_start_mid_z)
 748                 regmap_write(priv->regmap, TAS5086_PWM_START,
 749                              TAS5086_PWM_START_MIDZ_FOR_START_1 |
 750                                 pwm_start_mid_z);
 751
 752         /* lookup and set split-capacitor charge period */
 753         if (charge_period == 0) {
 754                 regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0);
 755         } else {
 756                 i = index_in_array(tas5086_charge_period,
 757                                    ARRAY_SIZE(tas5086_charge_period),
 758                                    charge_period);
 759                 if (i >= 0)
 760                         regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE,
 761                                      i + 0x08);
 762                 else
 763                         dev_warn(codec->dev,
 764                                  "Invalid split-cap charge period of %d ns.\n",
 765                                  charge_period);
 766         }
 767
 768         /* enable factory trim */
 769         ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00);
 770         if (ret < 0)
 771                 return ret;
 772
 773         /* start all channels */
 774         ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20);
 775         if (ret < 0)
 776                 return ret;
 777
 778         /* set master volume to 0 dB */
 779         ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30);
 780         if (ret < 0)
 781                 return ret;
 782
 783         /* mute all channels for now */
 784         ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE,
 785                            TAS5086_SOFT_MUTE_ALL);
 786         if (ret < 0)
 787                 return ret;
 788
 789         return 0;
 790 }
 791
 792 static int tas5086_remove(struct snd_soc_codec *codec)
 793 {
 794         struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
 795
 796         if (gpio_is_valid(priv->gpio_nreset))
 797                 /* Set codec to the reset state */
 798                 gpio_set_value(priv->gpio_nreset, 0);
 799
 800         return 0;
 801 };
 802
 803 static struct snd_soc_codec_driver soc_codec_dev_tas5086 = {
 804         .probe                  = tas5086_probe,
 805         .remove                 = tas5086_remove,
 806         .resume                 = tas5086_soc_resume,
 807         .controls               = tas5086_controls,
 808         .num_controls           = ARRAY_SIZE(tas5086_controls),
 809         .dapm_widgets           = tas5086_dapm_widgets,
 810         .num_dapm_widgets       = ARRAY_SIZE(tas5086_dapm_widgets),
 811         .dapm_routes            = tas5086_dapm_routes,
 812         .num_dapm_routes        = ARRAY_SIZE(tas5086_dapm_routes),
 813 };
 814
 815 static const struct i2c_device_id tas5086_i2c_id[] = {
 816         { "tas5086", 0 },
 817         { }
 818 };
 819 MODULE_DEVICE_TABLE(i2c, tas5086_i2c_id);
 820
 821 static const struct regmap_config tas5086_regmap = {
 822         .reg_bits               = 8,
 823         .val_bits               = 32,
 824         .max_register           = TAS5086_MAX_REGISTER,
 825         .reg_defaults           = tas5086_reg_defaults,
 826         .num_reg_defaults       = ARRAY_SIZE(tas5086_reg_defaults),
 827         .cache_type             = REGCACHE_RBTREE,
 828         .volatile_reg           = tas5086_volatile_reg,
 829         .writeable_reg          = tas5086_writeable_reg,
 830         .readable_reg           = tas5086_accessible_reg,
 831         .reg_read               = tas5086_reg_read,
 832         .reg_write              = tas5086_reg_write,
 833 };
 834
 835 static int tas5086_i2c_probe(struct i2c_client *i2c,
 836                              const struct i2c_device_id *id)
 837 {
 838         struct tas5086_private *priv;
 839         struct device *dev = &i2c->dev;
 840         int gpio_nreset = -EINVAL;
 841         int i, ret;
 842
 843         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 844         if (!priv)
 845                 return -ENOMEM;
 846
 847         priv->regmap = devm_regmap_init(dev, NULL, i2c, &tas5086_regmap);
 848         if (IS_ERR(priv->regmap)) {
 849                 ret = PTR_ERR(priv->regmap);
 850                 dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
 851                 return ret;
 852         }
 853
 854         i2c_set_clientdata(i2c, priv);
 855
 856         if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) {
 857                 struct device_node *of_node = dev->of_node;
 858                 gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0);
 859         }
 860
 861         if (gpio_is_valid(gpio_nreset))
 862                 if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset"))
 863                         gpio_nreset = -EINVAL;
 864
 865         if (gpio_is_valid(gpio_nreset)) {
 866                 /* Reset codec - minimum assertion time is 400ns */
 867                 gpio_direction_output(gpio_nreset, 0);
 868                 udelay(1);
 869                 gpio_set_value(gpio_nreset, 1);
 870
 871                 /* Codec needs ~15ms to wake up */
 872                 msleep(15);
 873         }
 874
 875         priv->gpio_nreset = gpio_nreset;
 876
 877         /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */
 878         ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i);
 879         if (ret < 0)
 880                 return ret;
 881
 882         if (i != 0x3) {
 883                 dev_err(dev,
 884                         "Failed to identify TAS5086 codec (got %02x)\n", i);
 885                 return -ENODEV;
 886         }
 887
 888         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086,
 889                 &tas5086_dai, 1);
 890 }
 891
 892 static int tas5086_i2c_remove(struct i2c_client *i2c)
 893 {
 894         snd_soc_unregister_codec(&i2c->dev);
 895         return 0;
 896 }
 897
 898 static struct i2c_driver tas5086_i2c_driver = {
 899         .driver = {
 900                 .name   = "tas5086",
 901                 .owner  = THIS_MODULE,
 902                 .of_match_table = of_match_ptr(tas5086_dt_ids),
 903         },
 904         .id_table       = tas5086_i2c_id,
 905         .probe          = tas5086_i2c_probe,
 906         .remove         = tas5086_i2c_remove,
 907 };
 908
 909 module_i2c_driver(tas5086_i2c_driver);
 910
 911 MODULE_AUTHOR("Daniel Mack <zonque@gmail.com>");
 912 MODULE_DESCRIPTION("Texas Instruments TAS5086 ALSA SoC Codec Driver");
 913 MODULE_LICENSE("GPL");