x86/xen: resume timer irqs early
[linux/fpc-iii.git] / sound / soc / codecs / tlv320aic26.h
blob67f19c3bebe6a88a6d86a81f32b2f6dca25c65ec
1 /*
2 * Texas Instruments TLV320AIC26 low power audio CODEC
3 * register definitions
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 */
8 #ifndef _TLV320AIC16_H_
9 #define _TLV320AIC16_H_
11 /* AIC26 Registers */
12 #define AIC26_READ_COMMAND_WORD(addr) ((1 << 15) | (addr << 5))
13 #define AIC26_WRITE_COMMAND_WORD(addr) ((0 << 15) | (addr << 5))
14 #define AIC26_PAGE_ADDR(page, offset) ((page << 6) | offset)
15 #define AIC26_NUM_REGS AIC26_PAGE_ADDR(3, 0)
17 /* Page 0: Auxiliary data registers */
18 #define AIC26_REG_BAT1 AIC26_PAGE_ADDR(0, 0x05)
19 #define AIC26_REG_BAT2 AIC26_PAGE_ADDR(0, 0x06)
20 #define AIC26_REG_AUX AIC26_PAGE_ADDR(0, 0x07)
21 #define AIC26_REG_TEMP1 AIC26_PAGE_ADDR(0, 0x09)
22 #define AIC26_REG_TEMP2 AIC26_PAGE_ADDR(0, 0x0A)
24 /* Page 1: Auxiliary control registers */
25 #define AIC26_REG_AUX_ADC AIC26_PAGE_ADDR(1, 0x00)
26 #define AIC26_REG_STATUS AIC26_PAGE_ADDR(1, 0x01)
27 #define AIC26_REG_REFERENCE AIC26_PAGE_ADDR(1, 0x03)
28 #define AIC26_REG_RESET AIC26_PAGE_ADDR(1, 0x04)
30 /* Page 2: Audio control registers */
31 #define AIC26_REG_AUDIO_CTRL1 AIC26_PAGE_ADDR(2, 0x00)
32 #define AIC26_REG_ADC_GAIN AIC26_PAGE_ADDR(2, 0x01)
33 #define AIC26_REG_DAC_GAIN AIC26_PAGE_ADDR(2, 0x02)
34 #define AIC26_REG_SIDETONE AIC26_PAGE_ADDR(2, 0x03)
35 #define AIC26_REG_AUDIO_CTRL2 AIC26_PAGE_ADDR(2, 0x04)
36 #define AIC26_REG_POWER_CTRL AIC26_PAGE_ADDR(2, 0x05)
37 #define AIC26_REG_AUDIO_CTRL3 AIC26_PAGE_ADDR(2, 0x06)
39 #define AIC26_REG_FILTER_COEFF_L_N0 AIC26_PAGE_ADDR(2, 0x07)
40 #define AIC26_REG_FILTER_COEFF_L_N1 AIC26_PAGE_ADDR(2, 0x08)
41 #define AIC26_REG_FILTER_COEFF_L_N2 AIC26_PAGE_ADDR(2, 0x09)
42 #define AIC26_REG_FILTER_COEFF_L_N3 AIC26_PAGE_ADDR(2, 0x0A)
43 #define AIC26_REG_FILTER_COEFF_L_N4 AIC26_PAGE_ADDR(2, 0x0B)
44 #define AIC26_REG_FILTER_COEFF_L_N5 AIC26_PAGE_ADDR(2, 0x0C)
45 #define AIC26_REG_FILTER_COEFF_L_D1 AIC26_PAGE_ADDR(2, 0x0D)
46 #define AIC26_REG_FILTER_COEFF_L_D2 AIC26_PAGE_ADDR(2, 0x0E)
47 #define AIC26_REG_FILTER_COEFF_L_D4 AIC26_PAGE_ADDR(2, 0x0F)
48 #define AIC26_REG_FILTER_COEFF_L_D5 AIC26_PAGE_ADDR(2, 0x10)
49 #define AIC26_REG_FILTER_COEFF_R_N0 AIC26_PAGE_ADDR(2, 0x11)
50 #define AIC26_REG_FILTER_COEFF_R_N1 AIC26_PAGE_ADDR(2, 0x12)
51 #define AIC26_REG_FILTER_COEFF_R_N2 AIC26_PAGE_ADDR(2, 0x13)
52 #define AIC26_REG_FILTER_COEFF_R_N3 AIC26_PAGE_ADDR(2, 0x14)
53 #define AIC26_REG_FILTER_COEFF_R_N4 AIC26_PAGE_ADDR(2, 0x15)
54 #define AIC26_REG_FILTER_COEFF_R_N5 AIC26_PAGE_ADDR(2, 0x16)
55 #define AIC26_REG_FILTER_COEFF_R_D1 AIC26_PAGE_ADDR(2, 0x17)
56 #define AIC26_REG_FILTER_COEFF_R_D2 AIC26_PAGE_ADDR(2, 0x18)
57 #define AIC26_REG_FILTER_COEFF_R_D4 AIC26_PAGE_ADDR(2, 0x19)
58 #define AIC26_REG_FILTER_COEFF_R_D5 AIC26_PAGE_ADDR(2, 0x1A)
60 #define AIC26_REG_PLL_PROG1 AIC26_PAGE_ADDR(2, 0x1B)
61 #define AIC26_REG_PLL_PROG2 AIC26_PAGE_ADDR(2, 0x1C)
62 #define AIC26_REG_AUDIO_CTRL4 AIC26_PAGE_ADDR(2, 0x1D)
63 #define AIC26_REG_AUDIO_CTRL5 AIC26_PAGE_ADDR(2, 0x1E)
65 /* fsref dividers; used in register 'Audio Control 1' */
66 enum aic26_divisors {
67 AIC26_DIV_1 = 0,
68 AIC26_DIV_1_5 = 1,
69 AIC26_DIV_2 = 2,
70 AIC26_DIV_3 = 3,
71 AIC26_DIV_4 = 4,
72 AIC26_DIV_5 = 5,
73 AIC26_DIV_5_5 = 6,
74 AIC26_DIV_6 = 7,
77 /* Digital data format */
78 enum aic26_datfm {
79 AIC26_DATFM_I2S = 0 << 8,
80 AIC26_DATFM_DSP = 1 << 8,
81 AIC26_DATFM_RIGHTJ = 2 << 8, /* right justified */
82 AIC26_DATFM_LEFTJ = 3 << 8, /* left justified */
85 /* Sample word length in bits; used in register 'Audio Control 1' */
86 enum aic26_wlen {
87 AIC26_WLEN_16 = 0 << 10,
88 AIC26_WLEN_20 = 1 << 10,
89 AIC26_WLEN_24 = 2 << 10,
90 AIC26_WLEN_32 = 3 << 10,
93 #endif /* _TLV320AIC16_H_ */