x86/xen: resume timer irqs early
[linux/fpc-iii.git] / sound / soc / codecs / uda134x.c
blobc94d4c1e3dacc1d7a51f2c6708848d56af6ecf9e
1 /*
2 * uda134x.c -- UDA134X ALSA SoC Codec driver
4 * Modifications by Christian Pellegrin <chripell@evolware.org>
6 * Copyright 2007 Dension Audio Systems Ltd.
7 * Author: Zoltan Devai
9 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/module.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
24 #include <sound/uda134x.h>
25 #include <sound/l3.h>
27 #include "uda134x.h"
30 #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
31 #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
32 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
34 struct uda134x_priv {
35 int sysclk;
36 int dai_fmt;
38 struct snd_pcm_substream *master_substream;
39 struct snd_pcm_substream *slave_substream;
42 /* In-data addresses are hard-coded into the reg-cache values */
43 static const char uda134x_reg[UDA134X_REGS_NUM] = {
44 /* Extended address registers */
45 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
46 /* Status, data regs */
47 0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00,
51 * The codec has no support for reading its registers except for peak level...
53 static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
54 unsigned int reg)
56 u8 *cache = codec->reg_cache;
58 if (reg >= UDA134X_REGS_NUM)
59 return -1;
60 return cache[reg];
64 * Write the register cache
66 static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
67 u8 reg, unsigned int value)
69 u8 *cache = codec->reg_cache;
71 if (reg >= UDA134X_REGS_NUM)
72 return;
73 cache[reg] = value;
77 * Write to the uda134x registers
80 static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
81 unsigned int value)
83 int ret;
84 u8 addr;
85 u8 data = value;
86 struct uda134x_platform_data *pd = codec->control_data;
88 pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
90 if (reg >= UDA134X_REGS_NUM) {
91 printk(KERN_ERR "%s unknown register: reg: %u",
92 __func__, reg);
93 return -EINVAL;
96 uda134x_write_reg_cache(codec, reg, value);
98 switch (reg) {
99 case UDA134X_STATUS0:
100 case UDA134X_STATUS1:
101 addr = UDA134X_STATUS_ADDR;
102 break;
103 case UDA134X_DATA000:
104 case UDA134X_DATA001:
105 case UDA134X_DATA010:
106 case UDA134X_DATA011:
107 addr = UDA134X_DATA0_ADDR;
108 break;
109 case UDA134X_DATA1:
110 addr = UDA134X_DATA1_ADDR;
111 break;
112 default:
113 /* It's an extended address register */
114 addr = (reg | UDA134X_EXTADDR_PREFIX);
116 ret = l3_write(&pd->l3,
117 UDA134X_DATA0_ADDR, &addr, 1);
118 if (ret != 1)
119 return -EIO;
121 addr = UDA134X_DATA0_ADDR;
122 data = (value | UDA134X_EXTDATA_PREFIX);
123 break;
126 ret = l3_write(&pd->l3,
127 addr, &data, 1);
128 if (ret != 1)
129 return -EIO;
131 return 0;
134 static inline void uda134x_reset(struct snd_soc_codec *codec)
136 u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
137 uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
138 msleep(1);
139 uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
142 static int uda134x_mute(struct snd_soc_dai *dai, int mute)
144 struct snd_soc_codec *codec = dai->codec;
145 u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
147 pr_debug("%s mute: %d\n", __func__, mute);
149 if (mute)
150 mute_reg |= (1<<2);
151 else
152 mute_reg &= ~(1<<2);
154 uda134x_write(codec, UDA134X_DATA010, mute_reg);
156 return 0;
159 static int uda134x_startup(struct snd_pcm_substream *substream,
160 struct snd_soc_dai *dai)
162 struct snd_soc_codec *codec = dai->codec;
163 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
164 struct snd_pcm_runtime *master_runtime;
166 if (uda134x->master_substream) {
167 master_runtime = uda134x->master_substream->runtime;
169 pr_debug("%s constraining to %d bits at %d\n", __func__,
170 master_runtime->sample_bits,
171 master_runtime->rate);
173 snd_pcm_hw_constraint_minmax(substream->runtime,
174 SNDRV_PCM_HW_PARAM_RATE,
175 master_runtime->rate,
176 master_runtime->rate);
178 snd_pcm_hw_constraint_minmax(substream->runtime,
179 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
180 master_runtime->sample_bits,
181 master_runtime->sample_bits);
183 uda134x->slave_substream = substream;
184 } else
185 uda134x->master_substream = substream;
187 return 0;
190 static void uda134x_shutdown(struct snd_pcm_substream *substream,
191 struct snd_soc_dai *dai)
193 struct snd_soc_codec *codec = dai->codec;
194 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
196 if (uda134x->master_substream == substream)
197 uda134x->master_substream = uda134x->slave_substream;
199 uda134x->slave_substream = NULL;
202 static int uda134x_hw_params(struct snd_pcm_substream *substream,
203 struct snd_pcm_hw_params *params,
204 struct snd_soc_dai *dai)
206 struct snd_soc_pcm_runtime *rtd = substream->private_data;
207 struct snd_soc_codec *codec = rtd->codec;
208 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
209 u8 hw_params;
211 if (substream == uda134x->slave_substream) {
212 pr_debug("%s ignoring hw_params for slave substream\n",
213 __func__);
214 return 0;
217 hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
218 hw_params &= STATUS0_SYSCLK_MASK;
219 hw_params &= STATUS0_DAIFMT_MASK;
221 pr_debug("%s sysclk: %d, rate:%d\n", __func__,
222 uda134x->sysclk, params_rate(params));
224 /* set SYSCLK / fs ratio */
225 switch (uda134x->sysclk / params_rate(params)) {
226 case 512:
227 break;
228 case 384:
229 hw_params |= (1<<4);
230 break;
231 case 256:
232 hw_params |= (1<<5);
233 break;
234 default:
235 printk(KERN_ERR "%s unsupported fs\n", __func__);
236 return -EINVAL;
239 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
240 uda134x->dai_fmt, params_format(params));
242 /* set DAI format and word length */
243 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
244 case SND_SOC_DAIFMT_I2S:
245 break;
246 case SND_SOC_DAIFMT_RIGHT_J:
247 switch (params_format(params)) {
248 case SNDRV_PCM_FORMAT_S16_LE:
249 hw_params |= (1<<1);
250 break;
251 case SNDRV_PCM_FORMAT_S18_3LE:
252 hw_params |= (1<<2);
253 break;
254 case SNDRV_PCM_FORMAT_S20_3LE:
255 hw_params |= ((1<<2) | (1<<1));
256 break;
257 default:
258 printk(KERN_ERR "%s unsupported format (right)\n",
259 __func__);
260 return -EINVAL;
262 break;
263 case SND_SOC_DAIFMT_LEFT_J:
264 hw_params |= (1<<3);
265 break;
266 default:
267 printk(KERN_ERR "%s unsupported format\n", __func__);
268 return -EINVAL;
271 uda134x_write(codec, UDA134X_STATUS0, hw_params);
273 return 0;
276 static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
277 int clk_id, unsigned int freq, int dir)
279 struct snd_soc_codec *codec = codec_dai->codec;
280 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
282 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
283 clk_id, freq, dir);
285 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
286 because the codec is slave. Of course limitations of the clock
287 master (the IIS controller) apply.
288 We'll error out on set_hw_params if it's not OK */
289 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
290 uda134x->sysclk = freq;
291 return 0;
294 printk(KERN_ERR "%s unsupported sysclk\n", __func__);
295 return -EINVAL;
298 static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
299 unsigned int fmt)
301 struct snd_soc_codec *codec = codec_dai->codec;
302 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
304 pr_debug("%s fmt: %08X\n", __func__, fmt);
306 /* codec supports only full slave mode */
307 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
308 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
309 return -EINVAL;
312 /* no support for clock inversion */
313 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
314 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
315 return -EINVAL;
318 /* We can't setup DAI format here as it depends on the word bit num */
319 /* so let's just store the value for later */
320 uda134x->dai_fmt = fmt;
322 return 0;
325 static int uda134x_set_bias_level(struct snd_soc_codec *codec,
326 enum snd_soc_bias_level level)
328 struct uda134x_platform_data *pd = codec->control_data;
329 int i;
330 u8 *cache = codec->reg_cache;
332 pr_debug("%s bias level %d\n", __func__, level);
334 switch (level) {
335 case SND_SOC_BIAS_ON:
336 break;
337 case SND_SOC_BIAS_PREPARE:
338 /* power on */
339 if (pd->power) {
340 pd->power(1);
341 /* Sync reg_cache with the hardware */
342 for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
343 codec->driver->write(codec, i, *cache++);
345 break;
346 case SND_SOC_BIAS_STANDBY:
347 break;
348 case SND_SOC_BIAS_OFF:
349 /* power off */
350 if (pd->power)
351 pd->power(0);
352 break;
354 codec->dapm.bias_level = level;
355 return 0;
358 static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
359 "Minimum2", "Maximum"};
360 static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
361 static const char *uda134x_mixmode[] = {"Differential", "Analog1",
362 "Analog2", "Both"};
364 static const struct soc_enum uda134x_mixer_enum[] = {
365 SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
366 SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
367 SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
370 static const struct snd_kcontrol_new uda1341_snd_controls[] = {
371 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
372 SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
373 SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
374 SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
376 SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
377 SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
379 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
380 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
382 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
383 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
384 SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
386 SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
387 SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
388 SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
390 SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
391 SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
392 SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
393 SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
394 SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
395 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
398 static const struct snd_kcontrol_new uda1340_snd_controls[] = {
399 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
401 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
402 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
404 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
405 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
407 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
410 static const struct snd_kcontrol_new uda1345_snd_controls[] = {
411 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
413 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
415 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
418 /* UDA1341 has the DAC/ADC power down in STATUS1 */
419 static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
420 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
421 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
424 /* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
425 static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
426 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
427 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
430 /* Common DAPM widgets */
431 static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
432 SND_SOC_DAPM_INPUT("VINL1"),
433 SND_SOC_DAPM_INPUT("VINR1"),
434 SND_SOC_DAPM_INPUT("VINL2"),
435 SND_SOC_DAPM_INPUT("VINR2"),
436 SND_SOC_DAPM_OUTPUT("VOUTL"),
437 SND_SOC_DAPM_OUTPUT("VOUTR"),
440 static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
441 { "ADC", NULL, "VINL1" },
442 { "ADC", NULL, "VINR1" },
443 { "ADC", NULL, "VINL2" },
444 { "ADC", NULL, "VINR2" },
445 { "VOUTL", NULL, "DAC" },
446 { "VOUTR", NULL, "DAC" },
449 static const struct snd_soc_dai_ops uda134x_dai_ops = {
450 .startup = uda134x_startup,
451 .shutdown = uda134x_shutdown,
452 .hw_params = uda134x_hw_params,
453 .digital_mute = uda134x_mute,
454 .set_sysclk = uda134x_set_dai_sysclk,
455 .set_fmt = uda134x_set_dai_fmt,
458 static struct snd_soc_dai_driver uda134x_dai = {
459 .name = "uda134x-hifi",
460 /* playback capabilities */
461 .playback = {
462 .stream_name = "Playback",
463 .channels_min = 1,
464 .channels_max = 2,
465 .rates = UDA134X_RATES,
466 .formats = UDA134X_FORMATS,
468 /* capture capabilities */
469 .capture = {
470 .stream_name = "Capture",
471 .channels_min = 1,
472 .channels_max = 2,
473 .rates = UDA134X_RATES,
474 .formats = UDA134X_FORMATS,
476 /* pcm operations */
477 .ops = &uda134x_dai_ops,
480 static int uda134x_soc_probe(struct snd_soc_codec *codec)
482 struct uda134x_priv *uda134x;
483 struct uda134x_platform_data *pd = codec->card->dev->platform_data;
484 const struct snd_soc_dapm_widget *widgets;
485 unsigned num_widgets;
487 int ret;
489 printk(KERN_INFO "UDA134X SoC Audio Codec\n");
491 if (!pd) {
492 printk(KERN_ERR "UDA134X SoC codec: "
493 "missing L3 bitbang function\n");
494 return -ENODEV;
497 switch (pd->model) {
498 case UDA134X_UDA1340:
499 case UDA134X_UDA1341:
500 case UDA134X_UDA1344:
501 case UDA134X_UDA1345:
502 break;
503 default:
504 printk(KERN_ERR "UDA134X SoC codec: "
505 "unsupported model %d\n",
506 pd->model);
507 return -EINVAL;
510 uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
511 if (uda134x == NULL)
512 return -ENOMEM;
513 snd_soc_codec_set_drvdata(codec, uda134x);
515 codec->control_data = pd;
517 if (pd->power)
518 pd->power(1);
520 uda134x_reset(codec);
522 if (pd->is_powered_on_standby)
523 uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
524 else
525 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
527 if (pd->model == UDA134X_UDA1341) {
528 widgets = uda1341_dapm_widgets;
529 num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
530 } else {
531 widgets = uda1340_dapm_widgets;
532 num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
535 ret = snd_soc_dapm_new_controls(&codec->dapm, widgets, num_widgets);
536 if (ret) {
537 printk(KERN_ERR "%s failed to register dapm controls: %d",
538 __func__, ret);
539 kfree(uda134x);
540 return ret;
543 switch (pd->model) {
544 case UDA134X_UDA1340:
545 case UDA134X_UDA1344:
546 ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls,
547 ARRAY_SIZE(uda1340_snd_controls));
548 break;
549 case UDA134X_UDA1341:
550 ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls,
551 ARRAY_SIZE(uda1341_snd_controls));
552 break;
553 case UDA134X_UDA1345:
554 ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls,
555 ARRAY_SIZE(uda1345_snd_controls));
556 break;
557 default:
558 printk(KERN_ERR "%s unknown codec type: %d",
559 __func__, pd->model);
560 kfree(uda134x);
561 return -EINVAL;
564 if (ret < 0) {
565 printk(KERN_ERR "UDA134X: failed to register controls\n");
566 kfree(uda134x);
567 return ret;
570 return 0;
573 /* power down chip */
574 static int uda134x_soc_remove(struct snd_soc_codec *codec)
576 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
578 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
579 uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
581 kfree(uda134x);
582 return 0;
585 #if defined(CONFIG_PM)
586 static int uda134x_soc_suspend(struct snd_soc_codec *codec)
588 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
589 uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
590 return 0;
593 static int uda134x_soc_resume(struct snd_soc_codec *codec)
595 uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
596 uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
597 return 0;
599 #else
600 #define uda134x_soc_suspend NULL
601 #define uda134x_soc_resume NULL
602 #endif /* CONFIG_PM */
604 static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
605 .probe = uda134x_soc_probe,
606 .remove = uda134x_soc_remove,
607 .suspend = uda134x_soc_suspend,
608 .resume = uda134x_soc_resume,
609 .reg_cache_size = sizeof(uda134x_reg),
610 .reg_word_size = sizeof(u8),
611 .reg_cache_default = uda134x_reg,
612 .reg_cache_step = 1,
613 .read = uda134x_read_reg_cache,
614 .write = uda134x_write,
615 .set_bias_level = uda134x_set_bias_level,
616 .dapm_widgets = uda134x_dapm_widgets,
617 .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets),
618 .dapm_routes = uda134x_dapm_routes,
619 .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes),
622 static int uda134x_codec_probe(struct platform_device *pdev)
624 return snd_soc_register_codec(&pdev->dev,
625 &soc_codec_dev_uda134x, &uda134x_dai, 1);
628 static int uda134x_codec_remove(struct platform_device *pdev)
630 snd_soc_unregister_codec(&pdev->dev);
631 return 0;
634 static struct platform_driver uda134x_codec_driver = {
635 .driver = {
636 .name = "uda134x-codec",
637 .owner = THIS_MODULE,
639 .probe = uda134x_codec_probe,
640 .remove = uda134x_codec_remove,
643 module_platform_driver(uda134x_codec_driver);
645 MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
646 MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
647 MODULE_LICENSE("GPL");