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x86/xen: resume timer irqs early
[linux/fpc-iii.git] / sound / soc / sh / rcar / ssi.c
blobfae26d3f79d26bf827cc931bd16fe186800f777d
1 /*
2 * Renesas R-Car SSIU/SSI support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * Based on fsi.c
8 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14 #include <linux/delay.h>
15 #include "rsnd.h"
16 #define RSND_SSI_NAME_SIZE 16
17
18 /*
19 * SSICR
20 */
21 #define FORCE (1 << 31) /* Fixed */
22 #define DMEN (1 << 28) /* DMA Enable */
23 #define UIEN (1 << 27) /* Underflow Interrupt Enable */
24 #define OIEN (1 << 26) /* Overflow Interrupt Enable */
25 #define IIEN (1 << 25) /* Idle Mode Interrupt Enable */
26 #define DIEN (1 << 24) /* Data Interrupt Enable */
27
28 #define DWL_8 (0 << 19) /* Data Word Length */
29 #define DWL_16 (1 << 19) /* Data Word Length */
30 #define DWL_18 (2 << 19) /* Data Word Length */
31 #define DWL_20 (3 << 19) /* Data Word Length */
32 #define DWL_22 (4 << 19) /* Data Word Length */
33 #define DWL_24 (5 << 19) /* Data Word Length */
34 #define DWL_32 (6 << 19) /* Data Word Length */
35
36 #define SWL_32 (3 << 16) /* R/W System Word Length */
37 #define SCKD (1 << 15) /* Serial Bit Clock Direction */
38 #define SWSD (1 << 14) /* Serial WS Direction */
39 #define SCKP (1 << 13) /* Serial Bit Clock Polarity */
40 #define SWSP (1 << 12) /* Serial WS Polarity */
41 #define SDTA (1 << 10) /* Serial Data Alignment */
42 #define DEL (1 << 8) /* Serial Data Delay */
43 #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */
44 #define TRMD (1 << 1) /* Transmit/Receive Mode Select */
45 #define EN (1 << 0) /* SSI Module Enable */
46
47 /*
48 * SSISR
49 */
50 #define UIRQ (1 << 27) /* Underflow Error Interrupt Status */
51 #define OIRQ (1 << 26) /* Overflow Error Interrupt Status */
52 #define IIRQ (1 << 25) /* Idle Mode Interrupt Status */
53 #define DIRQ (1 << 24) /* Data Interrupt Status Flag */
54
55 /*
56 * SSIWSR
57 */
58 #define CONT (1 << 8) /* WS Continue Function */
59
60 struct rsnd_ssi {
61 struct clk *clk;
62 struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
63 struct rsnd_ssi *parent;
64 struct rsnd_mod mod;
65
66 struct rsnd_dai *rdai;
67 struct rsnd_dai_stream *io;
68 u32 cr_own;
69 u32 cr_clk;
70 u32 cr_etc;
71 int err;
72 int dma_offset;
73 unsigned int usrcnt;
74 unsigned int rate;
75 };
76
77 struct rsnd_ssiu {
78 u32 ssi_mode0;
79 u32 ssi_mode1;
80
81 int ssi_nr;
82 struct rsnd_ssi *ssi;
83 };
84
85 #define for_each_rsnd_ssi(pos, priv, i) \
86 for (i = 0; \
87 (i < rsnd_ssi_nr(priv)) && \
88 ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
89 i++)
90
91 #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
92 #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
93 #define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
94 #define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0)
95 #define rsnd_ssi_dma_available(ssi) \
96 rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod))
97 #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
98 #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
99 #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
100 #define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id)
101 #define rsnd_ssi_to_ssiu(ssi)\
102 (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
103
104 static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
105 struct rsnd_ssiu *ssiu)
106 {
107 struct device *dev = rsnd_priv_to_dev(priv);
108 struct rsnd_ssi *ssi;
109 u32 flags;
110 u32 val;
111 int i;
112
113 /*
114 * SSI_MODE0
115 */
116 ssiu->ssi_mode0 = 0;
117 for_each_rsnd_ssi(ssi, priv, i) {
118 flags = rsnd_ssi_mode_flags(ssi);
119
120 /* see also BUSIF_MODE */
121 if (!(flags & RSND_SSI_DEPENDENT)) {
122 ssiu->ssi_mode0 |= (1 << i);
123 dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
124 } else {
125 dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
126 }
127 }
128
129 /*
130 * SSI_MODE1
131 */
132 #define ssi_parent_set(p, sync, adg, ext) \
133 do { \
134 ssi->parent = ssiu->ssi + p; \
135 if (flags & RSND_SSI_CLK_FROM_ADG) \
136 val = adg; \
137 else \
138 val = ext; \
139 if (flags & RSND_SSI_SYNC) \
140 val |= sync; \
141 } while (0)
142
143 ssiu->ssi_mode1 = 0;
144 for_each_rsnd_ssi(ssi, priv, i) {
145 flags = rsnd_ssi_mode_flags(ssi);
146
147 if (!(flags & RSND_SSI_CLK_PIN_SHARE))
148 continue;
149
150 val = 0;
151 switch (i) {
152 case 1:
153 ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
154 break;
155 case 2:
156 ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
157 break;
158 case 4:
159 ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
160 break;
161 case 8:
162 ssi_parent_set(7, 0, 0, 0);
163 break;
164 }
165
166 ssiu->ssi_mode1 |= val;
167 }
168 }
169
170 static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
171 {
172 struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
173
174 rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
175 rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
176 }
177
178 static void rsnd_ssi_status_check(struct rsnd_mod *mod,
179 u32 bit)
180 {
181 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
182 struct device *dev = rsnd_priv_to_dev(priv);
183 u32 status;
184 int i;
185
186 for (i = 0; i < 1024; i++) {
187 status = rsnd_mod_read(mod, SSISR);
188 if (status & bit)
189 return;
190
191 udelay(50);
192 }
193
194 dev_warn(dev, "status check failed\n");
195 }
196
197 static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
198 unsigned int rate)
199 {
200 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
201 struct device *dev = rsnd_priv_to_dev(priv);
202 int i, j, ret;
203 int adg_clk_div_table[] = {
204 1, 6, /* see adg.c */
205 };
206 int ssi_clk_mul_table[] = {
207 1, 2, 4, 8, 16, 6, 12,
208 };
209 unsigned int main_rate;
210
211 /*
212 * Find best clock, and try to start ADG
213 */
214 for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
215 for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
216
217 /*
218 * this driver is assuming that
219 * system word is 64fs (= 2 x 32bit)
220 * see rsnd_ssi_start()
221 */
222 main_rate = rate / adg_clk_div_table[i]
223 * 32 * 2 * ssi_clk_mul_table[j];
224
225 ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
226 if (0 == ret) {
227 ssi->rate = rate;
228 ssi->cr_clk = FORCE | SWL_32 |
229 SCKD | SWSD | CKDV(j);
230
231 dev_dbg(dev, "ssi%d outputs %u Hz\n",
232 rsnd_mod_id(&ssi->mod), rate);
233
234 return 0;
235 }
236 }
237 }
238
239 dev_err(dev, "unsupported clock rate\n");
240 return -EIO;
241 }
242
243 static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
244 {
245 ssi->rate = 0;
246 ssi->cr_clk = 0;
247 rsnd_adg_ssi_clk_stop(&ssi->mod);
248 }
249
250 static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
251 struct rsnd_dai *rdai,
252 struct rsnd_dai_stream *io)
253 {
254 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
255 struct device *dev = rsnd_priv_to_dev(priv);
256 u32 cr;
257
258 if (0 == ssi->usrcnt) {
259 clk_enable(ssi->clk);
260
261 if (rsnd_rdai_is_clk_master(rdai)) {
262 struct snd_pcm_runtime *runtime;
263
264 runtime = rsnd_io_to_runtime(io);
265
266 if (rsnd_ssi_clk_from_parent(ssi))
267 rsnd_ssi_hw_start(ssi->parent, rdai, io);
268 else
269 rsnd_ssi_master_clk_start(ssi, runtime->rate);
270 }
271 }
272
273 cr = ssi->cr_own |
274 ssi->cr_clk |
275 ssi->cr_etc |
276 EN;
277
278 rsnd_mod_write(&ssi->mod, SSICR, cr);
279
280 ssi->usrcnt++;
281
282 dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
283 }
284
285 static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
286 struct rsnd_dai *rdai)
287 {
288 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
289 struct device *dev = rsnd_priv_to_dev(priv);
290 u32 cr;
291
292 if (0 == ssi->usrcnt) /* stop might be called without start */
293 return;
294
295 ssi->usrcnt--;
296
297 if (0 == ssi->usrcnt) {
298 /*
299 * disable all IRQ,
300 * and, wait all data was sent
301 */
302 cr = ssi->cr_own |
303 ssi->cr_clk;
304
305 rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
306 rsnd_ssi_status_check(&ssi->mod, DIRQ);
307
308 /*
309 * disable SSI,
310 * and, wait idle state
311 */
312 rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */
313 rsnd_ssi_status_check(&ssi->mod, IIRQ);
314
315 if (rsnd_rdai_is_clk_master(rdai)) {
316 if (rsnd_ssi_clk_from_parent(ssi))
317 rsnd_ssi_hw_stop(ssi->parent, rdai);
318 else
319 rsnd_ssi_master_clk_stop(ssi);
320 }
321
322 clk_disable(ssi->clk);
323 }
324
325 dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
326 }
327
328 /*
329 * SSI mod common functions
330 */
331 static int rsnd_ssi_init(struct rsnd_mod *mod,
332 struct rsnd_dai *rdai,
333 struct rsnd_dai_stream *io)
334 {
335 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
336 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
337 struct device *dev = rsnd_priv_to_dev(priv);
338 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
339 u32 cr;
340
341 cr = FORCE;
342
343 /*
344 * always use 32bit system word for easy clock calculation.
345 * see also rsnd_ssi_master_clk_enable()
346 */
347 cr |= SWL_32;
348
349 /*
350 * init clock settings for SSICR
351 */
352 switch (runtime->sample_bits) {
353 case 16:
354 cr |= DWL_16;
355 break;
356 case 32:
357 cr |= DWL_24;
358 break;
359 default:
360 return -EIO;
361 }
362
363 if (rdai->bit_clk_inv)
364 cr |= SCKP;
365 if (rdai->frm_clk_inv)
366 cr |= SWSP;
367 if (rdai->data_alignment)
368 cr |= SDTA;
369 if (rdai->sys_delay)
370 cr |= DEL;
371 if (rsnd_dai_is_play(rdai, io))
372 cr |= TRMD;
373
374 /*
375 * set ssi parameter
376 */
377 ssi->rdai = rdai;
378 ssi->io = io;
379 ssi->cr_own = cr;
380 ssi->err = -1; /* ignore 1st error */
381
382 rsnd_ssi_mode_set(ssi);
383
384 dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
385
386 return 0;
387 }
388
389 static int rsnd_ssi_quit(struct rsnd_mod *mod,
390 struct rsnd_dai *rdai,
391 struct rsnd_dai_stream *io)
392 {
393 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
394 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
395 struct device *dev = rsnd_priv_to_dev(priv);
396
397 dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
398
399 if (ssi->err > 0)
400 dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
401
402 ssi->rdai = NULL;
403 ssi->io = NULL;
404 ssi->cr_own = 0;
405 ssi->err = 0;
406
407 return 0;
408 }
409
410 static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
411 {
412 /* under/over flow error */
413 if (status & (UIRQ | OIRQ)) {
414 ssi->err++;
415
416 /* clear error status */
417 rsnd_mod_write(&ssi->mod, SSISR, 0);
418 }
419 }
420
421 /*
422 * SSI PIO
423 */
424 static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
425 {
426 struct rsnd_ssi *ssi = data;
427 struct rsnd_dai_stream *io = ssi->io;
428 u32 status = rsnd_mod_read(&ssi->mod, SSISR);
429 irqreturn_t ret = IRQ_NONE;
430
431 if (io && (status & DIRQ)) {
432 struct rsnd_dai *rdai = ssi->rdai;
433 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
434 u32 *buf = (u32 *)(runtime->dma_area +
435 rsnd_dai_pointer_offset(io, 0));
436
437 rsnd_ssi_record_error(ssi, status);
438
439 /*
440 * 8/16/32 data can be assesse to TDR/RDR register
441 * directly as 32bit data
442 * see rsnd_ssi_init()
443 */
444 if (rsnd_dai_is_play(rdai, io))
445 rsnd_mod_write(&ssi->mod, SSITDR, *buf);
446 else
447 *buf = rsnd_mod_read(&ssi->mod, SSIRDR);
448
449 rsnd_dai_pointer_update(io, sizeof(*buf));
450
451 ret = IRQ_HANDLED;
452 }
453
454 return ret;
455 }
456
457 static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
458 struct rsnd_dai *rdai,
459 struct rsnd_dai_stream *io)
460 {
461 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
462 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
463 struct device *dev = rsnd_priv_to_dev(priv);
464
465 /* enable PIO IRQ */
466 ssi->cr_etc = UIEN | OIEN | DIEN;
467
468 rsnd_ssi_hw_start(ssi, rdai, io);
469
470 dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
471
472 return 0;
473 }
474
475 static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
476 struct rsnd_dai *rdai,
477 struct rsnd_dai_stream *io)
478 {
479 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
480 struct device *dev = rsnd_priv_to_dev(priv);
481 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
482
483 dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
484
485 ssi->cr_etc = 0;
486
487 rsnd_ssi_hw_stop(ssi, rdai);
488
489 return 0;
490 }
491
492 static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
493 .name = "ssi (pio)",
494 .init = rsnd_ssi_init,
495 .quit = rsnd_ssi_quit,
496 .start = rsnd_ssi_pio_start,
497 .stop = rsnd_ssi_pio_stop,
498 };
499
500 static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len)
501 {
502 struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
503 struct rsnd_dai_stream *io = ssi->io;
504 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
505
506 *len = io->byte_per_period;
507 *buf = runtime->dma_addr +
508 rsnd_dai_pointer_offset(io, ssi->dma_offset + *len);
509 ssi->dma_offset = *len; /* it cares A/B plane */
510
511 return 0;
512 }
513
514 static int rsnd_ssi_dma_complete(struct rsnd_dma *dma)
515 {
516 struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
517 struct rsnd_dai_stream *io = ssi->io;
518 u32 status = rsnd_mod_read(&ssi->mod, SSISR);
519
520 rsnd_ssi_record_error(ssi, status);
521
522 rsnd_dai_pointer_update(ssi->io, io->byte_per_period);
523
524 return 0;
525 }
526
527 static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
528 struct rsnd_dai *rdai,
529 struct rsnd_dai_stream *io)
530 {
531 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
532 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
533
534 /* enable DMA transfer */
535 ssi->cr_etc = DMEN;
536 ssi->dma_offset = 0;
537
538 rsnd_dma_start(dma);
539
540 rsnd_ssi_hw_start(ssi, ssi->rdai, io);
541
542 /* enable WS continue */
543 if (rsnd_rdai_is_clk_master(rdai))
544 rsnd_mod_write(&ssi->mod, SSIWSR, CONT);
545
546 return 0;
547 }
548
549 static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
550 struct rsnd_dai *rdai,
551 struct rsnd_dai_stream *io)
552 {
553 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
554 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
555
556 ssi->cr_etc = 0;
557
558 rsnd_ssi_hw_stop(ssi, rdai);
559
560 rsnd_dma_stop(dma);
561
562 return 0;
563 }
564
565 static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
566 .name = "ssi (dma)",
567 .init = rsnd_ssi_init,
568 .quit = rsnd_ssi_quit,
569 .start = rsnd_ssi_dma_start,
570 .stop = rsnd_ssi_dma_stop,
571 };
572
573 /*
574 * Non SSI
575 */
576 static int rsnd_ssi_non(struct rsnd_mod *mod,
577 struct rsnd_dai *rdai,
578 struct rsnd_dai_stream *io)
579 {
580 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
581 struct device *dev = rsnd_priv_to_dev(priv);
582
583 dev_dbg(dev, "%s\n", __func__);
584
585 return 0;
586 }
587
588 static struct rsnd_mod_ops rsnd_ssi_non_ops = {
589 .name = "ssi (non)",
590 .init = rsnd_ssi_non,
591 .quit = rsnd_ssi_non,
592 .start = rsnd_ssi_non,
593 .stop = rsnd_ssi_non,
594 };
595
596 /*
597 * ssi mod function
598 */
599 struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
600 int dai_id, int is_play)
601 {
602 struct rsnd_ssi *ssi;
603 int i, has_play;
604
605 is_play = !!is_play;
606
607 for_each_rsnd_ssi(ssi, priv, i) {
608 if (rsnd_ssi_dai_id(ssi) != dai_id)
609 continue;
610
611 has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
612
613 if (is_play == has_play)
614 return &ssi->mod;
615 }
616
617 return NULL;
618 }
619
620 struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
621 {
622 BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
623
624 return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
625 }
626
627 int rsnd_ssi_probe(struct platform_device *pdev,
628 struct rcar_snd_info *info,
629 struct rsnd_priv *priv)
630 {
631 struct rsnd_ssi_platform_info *pinfo;
632 struct device *dev = rsnd_priv_to_dev(priv);
633 struct rsnd_mod_ops *ops;
634 struct clk *clk;
635 struct rsnd_ssiu *ssiu;
636 struct rsnd_ssi *ssi;
637 char name[RSND_SSI_NAME_SIZE];
638 int i, nr, ret;
639
640 /*
641 * init SSI
642 */
643 nr = info->ssi_info_nr;
644 ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
645 GFP_KERNEL);
646 if (!ssiu) {
647 dev_err(dev, "SSI allocate failed\n");
648 return -ENOMEM;
649 }
650
651 priv->ssiu = ssiu;
652 ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1);
653 ssiu->ssi_nr = nr;
654
655 for_each_rsnd_ssi(ssi, priv, i) {
656 pinfo = &info->ssi_info[i];
657
658 snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
659
660 clk = clk_get(dev, name);
661 if (IS_ERR(clk))
662 return PTR_ERR(clk);
663
664 ssi->info = pinfo;
665 ssi->clk = clk;
666
667 ops = &rsnd_ssi_non_ops;
668
669 /*
670 * SSI DMA case
671 */
672 if (pinfo->dma_id > 0) {
673 ret = rsnd_dma_init(
674 priv, rsnd_mod_to_dma(&ssi->mod),
675 (rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY),
676 pinfo->dma_id,
677 rsnd_ssi_dma_inquiry,
678 rsnd_ssi_dma_complete);
679 if (ret < 0)
680 dev_info(dev, "SSI DMA failed. try PIO transter\n");
681 else
682 ops = &rsnd_ssi_dma_ops;
683
684 dev_dbg(dev, "SSI%d use DMA transfer\n", i);
685 }
686
687 /*
688 * SSI PIO case
689 */
690 if (!rsnd_ssi_dma_available(ssi) &&
691 rsnd_ssi_pio_available(ssi)) {
692 ret = devm_request_irq(dev, pinfo->pio_irq,
693 &rsnd_ssi_pio_interrupt,
694 IRQF_SHARED,
695 dev_name(dev), ssi);
696 if (ret) {
697 dev_err(dev, "SSI request interrupt failed\n");
698 return ret;
699 }
700
701 ops = &rsnd_ssi_pio_ops;
702
703 dev_dbg(dev, "SSI%d use PIO transfer\n", i);
704 }
705
706 rsnd_mod_init(priv, &ssi->mod, ops, i);
707 }
708
709 rsnd_ssi_mode_init(priv, ssiu);
710
711 dev_dbg(dev, "ssi probed\n");
712
713 return 0;
714 }
715
716 void rsnd_ssi_remove(struct platform_device *pdev,
717 struct rsnd_priv *priv)
718 {
719 struct rsnd_ssi *ssi;
720 int i;
721
722 for_each_rsnd_ssi(ssi, priv, i) {
723 clk_put(ssi->clk);
724 if (rsnd_ssi_dma_available(ssi))
725 rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod));
726 }
727
728 }
Linux with added FPC-III support