2 * Copyright (C) ST-Ericsson SA 2012
4 * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
5 * Roger Nilsson <roger.xr.nilsson@stericsson.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/bitops.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/mfd/dbx500-prcmu.h>
22 #include <linux/platform_data/asoc-ux500-msp.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dai.h>
27 #include "ux500_msp_i2s.h"
28 #include "ux500_msp_dai.h"
29 #include "ux500_pcm.h"
31 static int setup_pcm_multichan(struct snd_soc_dai
*dai
,
32 struct ux500_msp_config
*msp_config
)
34 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
35 struct msp_multichannel_config
*multi
=
36 &msp_config
->multichannel_config
;
38 if (drvdata
->slots
> 1) {
39 msp_config
->multichannel_configured
= 1;
41 multi
->tx_multichannel_enable
= true;
42 multi
->rx_multichannel_enable
= true;
43 multi
->rx_comparison_enable_mode
= MSP_COMPARISON_DISABLED
;
45 multi
->tx_channel_0_enable
= drvdata
->tx_mask
;
46 multi
->tx_channel_1_enable
= 0;
47 multi
->tx_channel_2_enable
= 0;
48 multi
->tx_channel_3_enable
= 0;
50 multi
->rx_channel_0_enable
= drvdata
->rx_mask
;
51 multi
->rx_channel_1_enable
= 0;
52 multi
->rx_channel_2_enable
= 0;
53 multi
->rx_channel_3_enable
= 0;
56 "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
57 __func__
, drvdata
->slots
, multi
->tx_channel_0_enable
,
58 multi
->rx_channel_0_enable
);
64 static int setup_frameper(struct snd_soc_dai
*dai
, unsigned int rate
,
65 struct msp_protdesc
*prot_desc
)
67 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
69 switch (drvdata
->slots
) {
73 prot_desc
->frame_period
=
74 FRAME_PER_SINGLE_SLOT_8_KHZ
;
78 prot_desc
->frame_period
=
79 FRAME_PER_SINGLE_SLOT_16_KHZ
;
83 prot_desc
->frame_period
=
84 FRAME_PER_SINGLE_SLOT_44_1_KHZ
;
88 prot_desc
->frame_period
=
89 FRAME_PER_SINGLE_SLOT_48_KHZ
;
94 "%s: Error: Unsupported sample-rate (freq = %d)!\n",
101 prot_desc
->frame_period
= FRAME_PER_2_SLOTS
;
105 prot_desc
->frame_period
= FRAME_PER_8_SLOTS
;
109 prot_desc
->frame_period
= FRAME_PER_16_SLOTS
;
113 "%s: Error: Unsupported slot-count (slots = %d)!\n",
114 __func__
, drvdata
->slots
);
118 prot_desc
->clocks_per_frame
=
119 prot_desc
->frame_period
+1;
121 dev_dbg(dai
->dev
, "%s: Clocks per frame: %u\n",
123 prot_desc
->clocks_per_frame
);
128 static int setup_pcm_framing(struct snd_soc_dai
*dai
, unsigned int rate
,
129 struct msp_protdesc
*prot_desc
)
131 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
133 u32 frame_length
= MSP_FRAME_LEN_1
;
134 prot_desc
->frame_width
= 0;
136 switch (drvdata
->slots
) {
138 frame_length
= MSP_FRAME_LEN_1
;
142 frame_length
= MSP_FRAME_LEN_2
;
146 frame_length
= MSP_FRAME_LEN_8
;
150 frame_length
= MSP_FRAME_LEN_16
;
154 "%s: Error: Unsupported slot-count (slots = %d)!\n",
155 __func__
, drvdata
->slots
);
159 prot_desc
->tx_frame_len_1
= frame_length
;
160 prot_desc
->rx_frame_len_1
= frame_length
;
161 prot_desc
->tx_frame_len_2
= frame_length
;
162 prot_desc
->rx_frame_len_2
= frame_length
;
164 prot_desc
->tx_elem_len_1
= MSP_ELEM_LEN_16
;
165 prot_desc
->rx_elem_len_1
= MSP_ELEM_LEN_16
;
166 prot_desc
->tx_elem_len_2
= MSP_ELEM_LEN_16
;
167 prot_desc
->rx_elem_len_2
= MSP_ELEM_LEN_16
;
169 return setup_frameper(dai
, rate
, prot_desc
);
172 static int setup_clocking(struct snd_soc_dai
*dai
,
174 struct ux500_msp_config
*msp_config
)
176 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
177 case SND_SOC_DAIFMT_NB_NF
:
180 case SND_SOC_DAIFMT_NB_IF
:
181 msp_config
->tx_fsync_pol
^= 1 << TFSPOL_SHIFT
;
182 msp_config
->rx_fsync_pol
^= 1 << RFSPOL_SHIFT
;
188 "%s: Error: Unsopported inversion (fmt = 0x%x)!\n",
194 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
195 case SND_SOC_DAIFMT_CBM_CFM
:
196 dev_dbg(dai
->dev
, "%s: Codec is master.\n", __func__
);
198 msp_config
->iodelay
= 0x20;
199 msp_config
->rx_fsync_sel
= 0;
200 msp_config
->tx_fsync_sel
= 1 << TFSSEL_SHIFT
;
201 msp_config
->tx_clk_sel
= 0;
202 msp_config
->rx_clk_sel
= 0;
203 msp_config
->srg_clk_sel
= 0x2 << SCKSEL_SHIFT
;
207 case SND_SOC_DAIFMT_CBS_CFS
:
208 dev_dbg(dai
->dev
, "%s: Codec is slave.\n", __func__
);
210 msp_config
->tx_clk_sel
= TX_CLK_SEL_SRG
;
211 msp_config
->tx_fsync_sel
= TX_SYNC_SRG_PROG
;
212 msp_config
->rx_clk_sel
= RX_CLK_SEL_SRG
;
213 msp_config
->rx_fsync_sel
= RX_SYNC_SRG
;
214 msp_config
->srg_clk_sel
= 1 << SCKSEL_SHIFT
;
219 dev_err(dai
->dev
, "%s: Error: Unsopported master (fmt = 0x%x)!\n",
228 static int setup_pcm_protdesc(struct snd_soc_dai
*dai
,
230 struct msp_protdesc
*prot_desc
)
232 prot_desc
->rx_phase_mode
= MSP_SINGLE_PHASE
;
233 prot_desc
->tx_phase_mode
= MSP_SINGLE_PHASE
;
234 prot_desc
->rx_phase2_start_mode
= MSP_PHASE2_START_MODE_IMEDIATE
;
235 prot_desc
->tx_phase2_start_mode
= MSP_PHASE2_START_MODE_IMEDIATE
;
236 prot_desc
->rx_byte_order
= MSP_BTF_MS_BIT_FIRST
;
237 prot_desc
->tx_byte_order
= MSP_BTF_MS_BIT_FIRST
;
238 prot_desc
->tx_fsync_pol
= MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI
);
239 prot_desc
->rx_fsync_pol
= MSP_FSYNC_POL_ACT_HI
<< RFSPOL_SHIFT
;
241 if ((fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) == SND_SOC_DAIFMT_DSP_A
) {
242 dev_dbg(dai
->dev
, "%s: DSP_A.\n", __func__
);
243 prot_desc
->rx_clk_pol
= MSP_RISING_EDGE
;
244 prot_desc
->tx_clk_pol
= MSP_FALLING_EDGE
;
246 prot_desc
->rx_data_delay
= MSP_DELAY_1
;
247 prot_desc
->tx_data_delay
= MSP_DELAY_1
;
249 dev_dbg(dai
->dev
, "%s: DSP_B.\n", __func__
);
250 prot_desc
->rx_clk_pol
= MSP_FALLING_EDGE
;
251 prot_desc
->tx_clk_pol
= MSP_RISING_EDGE
;
253 prot_desc
->rx_data_delay
= MSP_DELAY_0
;
254 prot_desc
->tx_data_delay
= MSP_DELAY_0
;
257 prot_desc
->rx_half_word_swap
= MSP_SWAP_NONE
;
258 prot_desc
->tx_half_word_swap
= MSP_SWAP_NONE
;
259 prot_desc
->compression_mode
= MSP_COMPRESS_MODE_LINEAR
;
260 prot_desc
->expansion_mode
= MSP_EXPAND_MODE_LINEAR
;
261 prot_desc
->frame_sync_ignore
= MSP_FSYNC_IGNORE
;
266 static int setup_i2s_protdesc(struct msp_protdesc
*prot_desc
)
268 prot_desc
->rx_phase_mode
= MSP_DUAL_PHASE
;
269 prot_desc
->tx_phase_mode
= MSP_DUAL_PHASE
;
270 prot_desc
->rx_phase2_start_mode
= MSP_PHASE2_START_MODE_FSYNC
;
271 prot_desc
->tx_phase2_start_mode
= MSP_PHASE2_START_MODE_FSYNC
;
272 prot_desc
->rx_byte_order
= MSP_BTF_MS_BIT_FIRST
;
273 prot_desc
->tx_byte_order
= MSP_BTF_MS_BIT_FIRST
;
274 prot_desc
->tx_fsync_pol
= MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO
);
275 prot_desc
->rx_fsync_pol
= MSP_FSYNC_POL_ACT_LO
<< RFSPOL_SHIFT
;
277 prot_desc
->rx_frame_len_1
= MSP_FRAME_LEN_1
;
278 prot_desc
->rx_frame_len_2
= MSP_FRAME_LEN_1
;
279 prot_desc
->tx_frame_len_1
= MSP_FRAME_LEN_1
;
280 prot_desc
->tx_frame_len_2
= MSP_FRAME_LEN_1
;
281 prot_desc
->rx_elem_len_1
= MSP_ELEM_LEN_16
;
282 prot_desc
->rx_elem_len_2
= MSP_ELEM_LEN_16
;
283 prot_desc
->tx_elem_len_1
= MSP_ELEM_LEN_16
;
284 prot_desc
->tx_elem_len_2
= MSP_ELEM_LEN_16
;
286 prot_desc
->rx_clk_pol
= MSP_RISING_EDGE
;
287 prot_desc
->tx_clk_pol
= MSP_FALLING_EDGE
;
289 prot_desc
->rx_data_delay
= MSP_DELAY_0
;
290 prot_desc
->tx_data_delay
= MSP_DELAY_0
;
292 prot_desc
->tx_half_word_swap
= MSP_SWAP_NONE
;
293 prot_desc
->rx_half_word_swap
= MSP_SWAP_NONE
;
294 prot_desc
->compression_mode
= MSP_COMPRESS_MODE_LINEAR
;
295 prot_desc
->expansion_mode
= MSP_EXPAND_MODE_LINEAR
;
296 prot_desc
->frame_sync_ignore
= MSP_FSYNC_IGNORE
;
301 static int setup_msp_config(struct snd_pcm_substream
*substream
,
302 struct snd_soc_dai
*dai
,
303 struct ux500_msp_config
*msp_config
)
305 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
306 struct msp_protdesc
*prot_desc
= &msp_config
->protdesc
;
307 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
308 unsigned int fmt
= drvdata
->fmt
;
311 memset(msp_config
, 0, sizeof(*msp_config
));
313 msp_config
->f_inputclk
= drvdata
->master_clk
;
315 msp_config
->tx_fifo_config
= TX_FIFO_ENABLE
;
316 msp_config
->rx_fifo_config
= RX_FIFO_ENABLE
;
317 msp_config
->def_elem_len
= 1;
318 msp_config
->direction
= substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
?
319 MSP_DIR_TX
: MSP_DIR_RX
;
320 msp_config
->data_size
= MSP_DATA_BITS_32
;
321 msp_config
->frame_freq
= runtime
->rate
;
323 dev_dbg(dai
->dev
, "%s: f_inputclk = %u, frame_freq = %u.\n",
324 __func__
, msp_config
->f_inputclk
, msp_config
->frame_freq
);
325 /* To avoid division by zero */
326 prot_desc
->clocks_per_frame
= 1;
328 dev_dbg(dai
->dev
, "%s: rate: %u, channels: %d.\n", __func__
,
329 runtime
->rate
, runtime
->channels
);
331 (SND_SOC_DAIFMT_FORMAT_MASK
| SND_SOC_DAIFMT_MASTER_MASK
)) {
332 case SND_SOC_DAIFMT_I2S
| SND_SOC_DAIFMT_CBS_CFS
:
333 dev_dbg(dai
->dev
, "%s: SND_SOC_DAIFMT_I2S.\n", __func__
);
335 msp_config
->default_protdesc
= 1;
336 msp_config
->protocol
= MSP_I2S_PROTOCOL
;
339 case SND_SOC_DAIFMT_I2S
| SND_SOC_DAIFMT_CBM_CFM
:
340 dev_dbg(dai
->dev
, "%s: SND_SOC_DAIFMT_I2S.\n", __func__
);
342 msp_config
->data_size
= MSP_DATA_BITS_16
;
343 msp_config
->protocol
= MSP_I2S_PROTOCOL
;
345 ret
= setup_i2s_protdesc(prot_desc
);
351 case SND_SOC_DAIFMT_DSP_A
| SND_SOC_DAIFMT_CBS_CFS
:
352 case SND_SOC_DAIFMT_DSP_A
| SND_SOC_DAIFMT_CBM_CFM
:
353 case SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_CBS_CFS
:
354 case SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_CBM_CFM
:
355 dev_dbg(dai
->dev
, "%s: PCM format.\n", __func__
);
357 msp_config
->data_size
= MSP_DATA_BITS_16
;
358 msp_config
->protocol
= MSP_PCM_PROTOCOL
;
360 ret
= setup_pcm_protdesc(dai
, fmt
, prot_desc
);
364 ret
= setup_pcm_multichan(dai
, msp_config
);
368 ret
= setup_pcm_framing(dai
, runtime
->rate
, prot_desc
);
375 dev_err(dai
->dev
, "%s: Error: Unsopported format (%d)!\n",
380 return setup_clocking(dai
, fmt
, msp_config
);
383 static int ux500_msp_dai_startup(struct snd_pcm_substream
*substream
,
384 struct snd_soc_dai
*dai
)
387 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
389 dev_dbg(dai
->dev
, "%s: MSP %d (%s): Enter.\n", __func__
, dai
->id
,
390 snd_pcm_stream_str(substream
));
392 /* Enable regulator */
393 ret
= regulator_enable(drvdata
->reg_vape
);
395 dev_err(drvdata
->msp
->dev
,
396 "%s: Failed to enable regulator!\n", __func__
);
400 /* Prepare and enable clocks */
401 dev_dbg(dai
->dev
, "%s: Enabling MSP-clocks.\n", __func__
);
402 ret
= clk_prepare_enable(drvdata
->pclk
);
404 dev_err(drvdata
->msp
->dev
,
405 "%s: Failed to prepare/enable pclk!\n", __func__
);
409 ret
= clk_prepare_enable(drvdata
->clk
);
411 dev_err(drvdata
->msp
->dev
,
412 "%s: Failed to prepare/enable clk!\n", __func__
);
418 clk_disable_unprepare(drvdata
->pclk
);
420 regulator_disable(drvdata
->reg_vape
);
424 static void ux500_msp_dai_shutdown(struct snd_pcm_substream
*substream
,
425 struct snd_soc_dai
*dai
)
428 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
429 bool is_playback
= (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
);
431 dev_dbg(dai
->dev
, "%s: MSP %d (%s): Enter.\n", __func__
, dai
->id
,
432 snd_pcm_stream_str(substream
));
434 if (drvdata
->vape_opp_constraint
== 1) {
435 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP
,
436 "ux500_msp_i2s", 50);
437 drvdata
->vape_opp_constraint
= 0;
440 if (ux500_msp_i2s_close(drvdata
->msp
,
441 is_playback
? MSP_DIR_TX
: MSP_DIR_RX
)) {
443 "%s: Error: MSP %d (%s): Unable to close i2s.\n",
444 __func__
, dai
->id
, snd_pcm_stream_str(substream
));
447 /* Disable and unprepare clocks */
448 clk_disable_unprepare(drvdata
->clk
);
449 clk_disable_unprepare(drvdata
->pclk
);
451 /* Disable regulator */
452 ret
= regulator_disable(drvdata
->reg_vape
);
455 "%s: ERROR: Failed to disable regulator (%d)!\n",
459 static int ux500_msp_dai_prepare(struct snd_pcm_substream
*substream
,
460 struct snd_soc_dai
*dai
)
463 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
464 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
465 struct ux500_msp_config msp_config
;
467 dev_dbg(dai
->dev
, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__
,
468 dai
->id
, snd_pcm_stream_str(substream
), runtime
->rate
);
470 setup_msp_config(substream
, dai
, &msp_config
);
472 ret
= ux500_msp_i2s_open(drvdata
->msp
, &msp_config
);
474 dev_err(dai
->dev
, "%s: Error: msp_setup failed (ret = %d)!\n",
480 if ((drvdata
->fmt
& SND_SOC_DAIFMT_MASTER_MASK
) &&
481 (drvdata
->msp
->f_bitclk
> 19200000)) {
482 /* If the bit-clock is higher than 19.2MHz, Vape should be
483 * run in 100% OPP. Only when bit-clock is used (MSP master) */
484 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP
,
485 "ux500-msp-i2s", 100);
486 drvdata
->vape_opp_constraint
= 1;
488 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP
,
489 "ux500-msp-i2s", 50);
490 drvdata
->vape_opp_constraint
= 0;
496 static int ux500_msp_dai_hw_params(struct snd_pcm_substream
*substream
,
497 struct snd_pcm_hw_params
*params
,
498 struct snd_soc_dai
*dai
)
500 unsigned int mask
, slots_active
;
501 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
502 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
504 dev_dbg(dai
->dev
, "%s: MSP %d (%s): Enter.\n",
505 __func__
, dai
->id
, snd_pcm_stream_str(substream
));
507 switch (drvdata
->fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
508 case SND_SOC_DAIFMT_I2S
:
509 snd_pcm_hw_constraint_minmax(runtime
,
510 SNDRV_PCM_HW_PARAM_CHANNELS
,
514 case SND_SOC_DAIFMT_DSP_B
:
515 case SND_SOC_DAIFMT_DSP_A
:
516 mask
= substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
?
520 slots_active
= hweight32(mask
);
521 dev_dbg(dai
->dev
, "TDM-slots active: %d", slots_active
);
523 snd_pcm_hw_constraint_minmax(runtime
,
524 SNDRV_PCM_HW_PARAM_CHANNELS
,
525 slots_active
, slots_active
);
530 "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
531 __func__
, drvdata
->fmt
);
538 static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai
*dai
,
541 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
543 dev_dbg(dai
->dev
, "%s: MSP %d: Enter.\n", __func__
, dai
->id
);
545 switch (fmt
& (SND_SOC_DAIFMT_FORMAT_MASK
|
546 SND_SOC_DAIFMT_MASTER_MASK
)) {
547 case SND_SOC_DAIFMT_I2S
| SND_SOC_DAIFMT_CBS_CFS
:
548 case SND_SOC_DAIFMT_I2S
| SND_SOC_DAIFMT_CBM_CFM
:
549 case SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_CBS_CFS
:
550 case SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_CBM_CFM
:
551 case SND_SOC_DAIFMT_DSP_A
| SND_SOC_DAIFMT_CBS_CFS
:
552 case SND_SOC_DAIFMT_DSP_A
| SND_SOC_DAIFMT_CBM_CFM
:
557 "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
558 __func__
, drvdata
->fmt
);
562 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
563 case SND_SOC_DAIFMT_NB_NF
:
564 case SND_SOC_DAIFMT_NB_IF
:
565 case SND_SOC_DAIFMT_IB_IF
:
570 "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
571 __func__
, drvdata
->fmt
);
579 static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai
*dai
,
580 unsigned int tx_mask
,
581 unsigned int rx_mask
,
582 int slots
, int slot_width
)
584 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
601 dev_err(dai
->dev
, "%s: Error: Unsupported slot-count (%d)!\n",
605 drvdata
->slots
= slots
;
607 if (!(slot_width
== 16)) {
608 dev_err(dai
->dev
, "%s: Error: Unsupported slot-width (%d)!\n",
609 __func__
, slot_width
);
612 drvdata
->slot_width
= slot_width
;
614 drvdata
->tx_mask
= tx_mask
& cap
;
615 drvdata
->rx_mask
= rx_mask
& cap
;
620 static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai
*dai
,
621 int clk_id
, unsigned int freq
, int dir
)
623 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
625 dev_dbg(dai
->dev
, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
626 __func__
, dai
->id
, clk_id
, freq
);
629 case UX500_MSP_MASTER_CLOCK
:
630 drvdata
->master_clk
= freq
;
634 dev_err(dai
->dev
, "%s: MSP %d: Invalid clk-id (%d)!\n",
635 __func__
, dai
->id
, clk_id
);
642 static int ux500_msp_dai_trigger(struct snd_pcm_substream
*substream
,
643 int cmd
, struct snd_soc_dai
*dai
)
646 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
648 dev_dbg(dai
->dev
, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
649 __func__
, dai
->id
, snd_pcm_stream_str(substream
),
650 (int)drvdata
->msp
->id
, cmd
);
652 ret
= ux500_msp_i2s_trigger(drvdata
->msp
, cmd
, substream
->stream
);
657 static int ux500_msp_dai_probe(struct snd_soc_dai
*dai
)
659 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(dai
->dev
);
661 dai
->playback_dma_data
= &drvdata
->msp
->playback_dma_data
;
662 dai
->capture_dma_data
= &drvdata
->msp
->capture_dma_data
;
664 drvdata
->msp
->playback_dma_data
.data_size
= drvdata
->slot_width
;
665 drvdata
->msp
->capture_dma_data
.data_size
= drvdata
->slot_width
;
670 static struct snd_soc_dai_ops ux500_msp_dai_ops
[] = {
672 .set_sysclk
= ux500_msp_dai_set_dai_sysclk
,
673 .set_fmt
= ux500_msp_dai_set_dai_fmt
,
674 .set_tdm_slot
= ux500_msp_dai_set_tdm_slot
,
675 .startup
= ux500_msp_dai_startup
,
676 .shutdown
= ux500_msp_dai_shutdown
,
677 .prepare
= ux500_msp_dai_prepare
,
678 .trigger
= ux500_msp_dai_trigger
,
679 .hw_params
= ux500_msp_dai_hw_params
,
683 static struct snd_soc_dai_driver ux500_msp_dai_drv
[UX500_NBR_OF_DAI
] = {
685 .name
= "ux500-msp-i2s.0",
686 .probe
= ux500_msp_dai_probe
,
691 .channels_min
= UX500_MSP_MIN_CHANNELS
,
692 .channels_max
= UX500_MSP_MAX_CHANNELS
,
693 .rates
= UX500_I2S_RATES
,
694 .formats
= UX500_I2S_FORMATS
,
697 .channels_min
= UX500_MSP_MIN_CHANNELS
,
698 .channels_max
= UX500_MSP_MAX_CHANNELS
,
699 .rates
= UX500_I2S_RATES
,
700 .formats
= UX500_I2S_FORMATS
,
702 .ops
= ux500_msp_dai_ops
,
705 .name
= "ux500-msp-i2s.1",
706 .probe
= ux500_msp_dai_probe
,
711 .channels_min
= UX500_MSP_MIN_CHANNELS
,
712 .channels_max
= UX500_MSP_MAX_CHANNELS
,
713 .rates
= UX500_I2S_RATES
,
714 .formats
= UX500_I2S_FORMATS
,
717 .channels_min
= UX500_MSP_MIN_CHANNELS
,
718 .channels_max
= UX500_MSP_MAX_CHANNELS
,
719 .rates
= UX500_I2S_RATES
,
720 .formats
= UX500_I2S_FORMATS
,
722 .ops
= ux500_msp_dai_ops
,
725 .name
= "ux500-msp-i2s.2",
727 .probe
= ux500_msp_dai_probe
,
731 .channels_min
= UX500_MSP_MIN_CHANNELS
,
732 .channels_max
= UX500_MSP_MAX_CHANNELS
,
733 .rates
= UX500_I2S_RATES
,
734 .formats
= UX500_I2S_FORMATS
,
737 .channels_min
= UX500_MSP_MIN_CHANNELS
,
738 .channels_max
= UX500_MSP_MAX_CHANNELS
,
739 .rates
= UX500_I2S_RATES
,
740 .formats
= UX500_I2S_FORMATS
,
742 .ops
= ux500_msp_dai_ops
,
745 .name
= "ux500-msp-i2s.3",
746 .probe
= ux500_msp_dai_probe
,
751 .channels_min
= UX500_MSP_MIN_CHANNELS
,
752 .channels_max
= UX500_MSP_MAX_CHANNELS
,
753 .rates
= UX500_I2S_RATES
,
754 .formats
= UX500_I2S_FORMATS
,
757 .channels_min
= UX500_MSP_MIN_CHANNELS
,
758 .channels_max
= UX500_MSP_MAX_CHANNELS
,
759 .rates
= UX500_I2S_RATES
,
760 .formats
= UX500_I2S_FORMATS
,
762 .ops
= ux500_msp_dai_ops
,
766 static const struct snd_soc_component_driver ux500_msp_component
= {
771 static int ux500_msp_drv_probe(struct platform_device
*pdev
)
773 struct ux500_msp_i2s_drvdata
*drvdata
;
776 dev_dbg(&pdev
->dev
, "%s: Enter (pdev->name = %s).\n", __func__
,
779 drvdata
= devm_kzalloc(&pdev
->dev
,
780 sizeof(struct ux500_msp_i2s_drvdata
),
787 drvdata
->tx_mask
= 0x01;
788 drvdata
->rx_mask
= 0x01;
789 drvdata
->slot_width
= 16;
790 drvdata
->master_clk
= MSP_INPUT_FREQ_APB
;
792 drvdata
->reg_vape
= devm_regulator_get(&pdev
->dev
, "v-ape");
793 if (IS_ERR(drvdata
->reg_vape
)) {
794 ret
= (int)PTR_ERR(drvdata
->reg_vape
);
796 "%s: ERROR: Failed to get Vape supply (%d)!\n",
800 prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP
, (char *)pdev
->name
, 50);
802 drvdata
->pclk
= clk_get(&pdev
->dev
, "apb_pclk");
803 if (IS_ERR(drvdata
->pclk
)) {
804 ret
= (int)PTR_ERR(drvdata
->pclk
);
805 dev_err(&pdev
->dev
, "%s: ERROR: clk_get of pclk failed (%d)!\n",
810 drvdata
->clk
= clk_get(&pdev
->dev
, NULL
);
811 if (IS_ERR(drvdata
->clk
)) {
812 ret
= (int)PTR_ERR(drvdata
->clk
);
813 dev_err(&pdev
->dev
, "%s: ERROR: clk_get failed (%d)!\n",
818 ret
= ux500_msp_i2s_init_msp(pdev
, &drvdata
->msp
,
819 pdev
->dev
.platform_data
);
822 "%s: ERROR: Failed to init MSP-struct (%d)!",
826 dev_set_drvdata(&pdev
->dev
, drvdata
);
828 ret
= snd_soc_register_component(&pdev
->dev
, &ux500_msp_component
,
829 &ux500_msp_dai_drv
[drvdata
->msp
->id
], 1);
831 dev_err(&pdev
->dev
, "Error: %s: Failed to register MSP%d!\n",
832 __func__
, drvdata
->msp
->id
);
836 ret
= ux500_pcm_register_platform(pdev
);
839 "Error: %s: Failed to register PCM platform device!\n",
847 snd_soc_unregister_component(&pdev
->dev
);
849 clk_put(drvdata
->clk
);
851 clk_put(drvdata
->pclk
);
853 devm_regulator_put(drvdata
->reg_vape
);
858 static int ux500_msp_drv_remove(struct platform_device
*pdev
)
860 struct ux500_msp_i2s_drvdata
*drvdata
= dev_get_drvdata(&pdev
->dev
);
862 ux500_pcm_unregister_platform(pdev
);
864 snd_soc_unregister_component(&pdev
->dev
);
866 devm_regulator_put(drvdata
->reg_vape
);
867 prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP
, "ux500_msp_i2s");
869 clk_put(drvdata
->clk
);
870 clk_put(drvdata
->pclk
);
872 ux500_msp_i2s_cleanup_msp(pdev
, drvdata
->msp
);
877 static const struct of_device_id ux500_msp_i2s_match
[] = {
878 { .compatible
= "stericsson,ux500-msp-i2s", },
882 static struct platform_driver msp_i2s_driver
= {
884 .name
= "ux500-msp-i2s",
885 .owner
= THIS_MODULE
,
886 .of_match_table
= ux500_msp_i2s_match
,
888 .probe
= ux500_msp_drv_probe
,
889 .remove
= ux500_msp_drv_remove
,
891 module_platform_driver(msp_i2s_driver
);
893 MODULE_LICENSE("GPL v2");