1 * CoreSight Components:
3 CoreSight components are compliant with the ARM CoreSight architecture
4 specification and can be connected in various topologies to suit a particular
5 SoCs tracing needs. These trace components can generally be classified as
6 sinks, links and sources. Trace data produced by one or more sources flows
7 through the intermediate links connecting the source to the currently selected
8 sink. Each CoreSight component device should use these properties to describe
9 its hardware characteristcs.
11 * Required properties for all components *except* non-configurable replicators:
13 * compatible: These have to be supplemented with "arm,primecell" as
14 drivers are using the AMBA bus interface. Possible values include:
15 - "arm,coresight-etb10", "arm,primecell";
16 - "arm,coresight-tpiu", "arm,primecell";
17 - "arm,coresight-tmc", "arm,primecell";
18 - "arm,coresight-funnel", "arm,primecell";
19 - "arm,coresight-etm3x", "arm,primecell";
21 * reg: physical base address and length of the register
22 set(s) of the component.
24 * clocks: the clock associated to this component.
26 * clock-names: the name of the clock as referenced by the code.
27 Since we are using the AMBA framework, the name should be
30 * port or ports: The representation of the component's port
31 layout using the generic DT graph presentation found in
34 * Required properties for devices that don't show up on the AMBA bus, such as
35 non-configurable replicators:
37 * compatible: Currently supported value is (note the absence of the
39 - "arm,coresight-replicator"
41 * port or ports: same as above.
43 * Optional properties for ETM/PTMs:
45 * arm,cp14: must be present if the system accesses ETM/PTM management
46 registers via co-processor 14.
48 * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the
49 source is considered to belong to CPU0.
51 * Optional property for TMC:
53 * arm,buffer-size: size of contiguous buffer space for TMC ETR
54 (embedded trace router)
61 compatible = "arm,coresight-etb10", "arm,primecell";
62 reg = <0 0x20010000 0 0x1000>;
65 clock-names = "apb_pclk";
67 etb_in_port: endpoint@0 {
69 remote-endpoint = <&replicator_out_port0>;
75 compatible = "arm,coresight-tpiu", "arm,primecell";
76 reg = <0 0x20030000 0 0x1000>;
79 clock-names = "apb_pclk";
81 tpiu_in_port: endpoint@0 {
83 remote-endpoint = <&replicator_out_port1>;
90 /* non-configurable replicators don't show up on the
91 * AMBA bus. As such no need to add "arm,primecell".
93 compatible = "arm,coresight-replicator";
99 /* replicator output ports */
102 replicator_out_port0: endpoint {
103 remote-endpoint = <&etb_in_port>;
109 replicator_out_port1: endpoint {
110 remote-endpoint = <&tpiu_in_port>;
114 /* replicator input port */
117 replicator_in_port0: endpoint {
119 remote-endpoint = <&funnel_out_port0>;
126 compatible = "arm,coresight-funnel", "arm,primecell";
127 reg = <0 0x20040000 0 0x1000>;
129 clocks = <&oscclk6a>;
130 clock-names = "apb_pclk";
132 #address-cells = <1>;
135 /* funnel output port */
138 funnel_out_port0: endpoint {
140 <&replicator_in_port0>;
144 /* funnel input ports */
147 funnel_in_port0: endpoint {
149 remote-endpoint = <&ptm0_out_port>;
155 funnel_in_port1: endpoint {
157 remote-endpoint = <&ptm1_out_port>;
163 funnel_in_port2: endpoint {
165 remote-endpoint = <&etm0_out_port>;
174 compatible = "arm,coresight-etm3x", "arm,primecell";
175 reg = <0 0x2201c000 0 0x1000>;
178 clocks = <&oscclk6a>;
179 clock-names = "apb_pclk";
181 ptm0_out_port: endpoint {
182 remote-endpoint = <&funnel_in_port0>;
188 compatible = "arm,coresight-etm3x", "arm,primecell";
189 reg = <0 0x2201d000 0 0x1000>;
192 clocks = <&oscclk6a>;
193 clock-names = "apb_pclk";
195 ptm1_out_port: endpoint {
196 remote-endpoint = <&funnel_in_port1>;