1 NVIDIA Tegra30 Clock And Reset Controller
3 This binding uses the common clock binding:
4 Documentation/devicetree/bindings/clock/clock-bindings.txt
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7 for muxing and gating Tegra's clocks, and setting their rates.
10 - compatible : Should be "nvidia,tegra30-car"
11 - reg : Should contain CAR registers location and length
12 - clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14 - #clock-cells : Should be 1.
15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra30-car.h>.
18 - #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
22 Example SoC include file:
26 compatible = "nvidia,tegra30-car";
27 reg = <0x60006000 0x1000>;
33 clocks = <&tegra_car TEGRA30_CLK_USB2>;
41 compatible = "simple-bus";
46 compatible = "fixed-clock";
49 clock-frequency = <12000000>;
53 compatible = "fixed-clock";
56 clock-frequency = <32768>;
61 clocks = <&clk_32k> <&osc>;