1 * Renesas R8A7778 Clock Pulse Generator (CPG)
3 The CPG generates core clocks for the R8A7778. It includes two PLLs and
4 several fixed ratio dividers
8 - compatible: Must be "renesas,r8a7778-cpg-clocks"
9 - reg: Base address and length of the memory resource used by the CPG
10 - #clock-cells: Must be 1
11 - clock-output-names: The names of the clocks. Supported clocks are
12 "plla", "pllb", "b", "out", "p", "s", and "s1".
18 cpg_clocks: cpg_clocks@ffc80000 {
19 compatible = "renesas,r8a7778-cpg-clocks";
20 reg = <0xffc80000 0x80>;
22 clocks = <&extal_clk>;
23 clock-output-names = "plla", "pllb", "b",
24 "out", "p", "s", "s1";