Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt

   1 * Renesas R8A7779 Clock Pulse Generator (CPG)
   2
   3 The CPG generates core clocks for the R8A7779. It includes one PLL and
   4 several fixed ratio dividers
   5
   6 Required Properties:
   7
   8   - compatible: Must be "renesas,r8a7779-cpg-clocks"
   9   - reg: Base address and length of the memory resource used by the CPG
  10
  11   - clocks: Reference to the parent clock
  12   - #clock-cells: Must be 1
  13   - clock-output-names: The names of the clocks. Supported clocks are "plla",
  14     "z", "zs", "s", "s1", "p", "b", "out".
  15
  16
  17 Example
  18 -------
  19
  20         cpg_clocks: cpg_clocks@ffc80000 {
  21                 compatible = "renesas,r8a7779-cpg-clocks";
  22                 reg = <0 0xffc80000 0 0x30>;
  23                 clocks = <&extal_clk>;
  24                 #clock-cells = <1>;
  25                 clock-output-names = "plla", "z", "zs", "s", "s1", "p",
  26                                      "b", "out";
  27         };