1 Allwinner A31 DMA Controller
3 This driver follows the generic DMA bindings defined in dma.txt.
7 - compatible: Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"
8 - reg: Should contain the registers base address and length
9 - interrupts: Should contain a reference to the interrupt used by this device
10 - clocks: Should contain a reference to the parent AHB clock
11 - resets: Should contain a reference to the reset controller asserting
13 - #dma-cells : Should be 1, a single cell holding a line request number
16 dma: dma-controller@01c02000 {
17 compatible = "allwinner,sun6i-a31-dma";
18 reg = <0x01c02000 0x1000>;
19 interrupts = <0 50 4>;
20 clocks = <&ahb1_gates 6>;
21 resets = <&ahb1_rst 6>;
27 DMA clients connected to the A31 DMA controller must use the format
28 described in the dma.txt file, using a two-cell specifier for each
29 channel: a phandle plus one integer cells.
30 The two cells in order are:
32 1. A phandle pointing to the DMA controller.
33 2. The port ID as specified in the datasheet
37 compatible = "allwinner,sun6i-a31-spi";
38 reg = <0x01c6a000 0x1000>;
39 interrupts = <0 67 4>;
40 clocks = <&ahb1_gates 22>, <&spi2_clk>;
41 clock-names = "ahb", "mod";
42 dmas = <&dma 25>, <&dma 25>;
43 dma-names = "rx", "tx";
44 resets = <&ahb1_rst 22>;