1 * Broadcom Starfighter 2 integrated swich
5 - compatible: should be "brcm,bcm7445-switch-v4.0"
6 - reg: addresses and length of the register sets for the device, must be 6
7 pairs of register addresses and lengths
8 - interrupts: interrupts for the devices, must be two interrupts
9 - dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt
10 - dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt
11 - #size-cells: must be 0
12 - #address-cells: must be 2, see dsa/dsa.txt
16 The integrated switch subnode should be specified according to the binding
17 described in dsa/dsa.txt.
21 - reg-names: litteral names for the device base register addresses, when present
22 must be: "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb"
24 - interrupt-names: litternal names for the device interrupt lines, when present
25 must be: "switch_0" and "switch_1"
27 - brcm,num-gphy: specify the maximum number of integrated gigabit PHYs in the
30 - brcm,num-rgmii-ports: specify the maximum number of RGMII interfaces supported
33 - brcm,fcb-pause-override: boolean property, if present indicates that the switch
34 supports Failover Control Block pause override capability
36 - brcm,acb-packets-inflight: boolean property, if present indicates that the switch
37 Admission Control Block supports reporting the number of packets in-flight in a
43 compatible = "simple-bus";
46 ranges = <0 0xf0b00000 0x40804>;
49 compatible = "brcm,bcm7445-switch-v4.0";
58 interrupts = <0 0x18 0
61 brcm,num-rgmii-ports = <2>;
62 brcm,fcb-pause-override;
63 brcm,acb-packets-inflight;