1 * Freescale low power universal asynchronous receiver/transmitter (lpuart)
5 - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
6 on Vybrid vf610 SoC with 8-bit register organization
7 - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
8 on LS1021A SoC with 32-bit big-endian register organization
9 - reg : Address and length of the register set for the device
10 - interrupts : Should contain uart interrupt
11 - clocks : phandle + clock specifier pairs, one for each entry in clock-names
12 - clock-names : should contain: "ipg" - the uart clock
15 - dmas: A list of two dma specifiers, one for each entry in dma-names.
16 - dma-names: should contain "tx" and "rx".
18 Note: Optional properties for DMA support. Write them both or both not.
22 uart0: serial@40027000 {
23 compatible = "fsl,vf610-lpuart";
24 reg = <0x40027000 0x1000>;
25 interrupts = <0 61 0x00>;
26 clocks = <&clks VF610_CLK_UART0>;
30 dma-names = "rx","tx";