1 Device tree bindings for Marvell PXA SSP ports
5 - compatible: Must be one of
15 - reg: The memory base
16 - dmas: Two dma phandles, one for rx, one for tx
17 - dma-names: Must be "rx", "tx"
23 compatible = "mrvl,pxa3xx-ssp";
24 reg = <0x41000000 0x40>;
27 clock-names = "pxa27x-ssp.0";
30 dma-names = "rx", "tx";
34 compatible = "mrvl,pxa3xx-ssp";
35 reg = <0x41700000 0x40>;
38 clock-names = "pxa27x-ssp.1";
41 dma-names = "rx", "tx";
45 compatibl3 = "mrvl,pxa3xx-ssp";
46 reg = <0x41900000 0x40>;
49 clock-names = "pxa27x-ssp.2";
52 dma-names = "rx", "tx";
56 compatible = "mrvl,pxa3xx-ssp";
57 reg = <0x41a00000 0x40>;
60 clock-names = "pxa27x-ssp.3";
63 dma-names = "rx", "tx";