1 DesignWare I2S controller
4 - compatible : Must be "snps,designware-i2s"
5 - reg : Must contain the I2S core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's
7 clocks. The controller expects one clock: the clock used as the sampling
8 rate reference clock sample.
9 - clock-names : "i2sclk" for the sample rate reference clock.
10 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
11 the core. The core expects one or two dma channels: one for transmit and
13 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
15 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
16 properties please check:
18 * clock/clock-bindings.txt
23 soc_i2s: i2s@7ff90000 {
24 compatible = "snps,designware-i2s";
25 reg = <0x0 0x7ff90000 0x0 0x1000>;
26 clocks = <&scpi_i2sclk 0>;
27 clock-names = "i2sclk";
28 #sound-dai-cells = <0>;