1 #ifndef _IOP13XX_TIME_H_
2 #define _IOP13XX_TIME_H_
6 #define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
8 #define IOP_TMR_EN 0x02
9 #define IOP_TMR_RELOAD 0x04
10 #define IOP_TMR_PRIVILEGED 0x08
11 #define IOP_TMR_RATIO_1_1 0x00
13 #define IOP13XX_XSI_FREQ_RATIO_MASK (3 << 19)
14 #define IOP13XX_XSI_FREQ_RATIO_2 (0 << 19)
15 #define IOP13XX_XSI_FREQ_RATIO_3 (1 << 19)
16 #define IOP13XX_XSI_FREQ_RATIO_4 (2 << 19)
17 #define IOP13XX_CORE_FREQ_MASK (7 << 16)
18 #define IOP13XX_CORE_FREQ_600 (0 << 16)
19 #define IOP13XX_CORE_FREQ_667 (1 << 16)
20 #define IOP13XX_CORE_FREQ_800 (2 << 16)
21 #define IOP13XX_CORE_FREQ_933 (3 << 16)
22 #define IOP13XX_CORE_FREQ_1000 (4 << 16)
23 #define IOP13XX_CORE_FREQ_1200 (5 << 16)
25 void iop_init_time(unsigned long tickrate
);
27 static inline unsigned long iop13xx_core_freq(void)
29 unsigned long freq
= __raw_readl(IOP13XX_PROCESSOR_FREQ
);
30 freq
&= IOP13XX_CORE_FREQ_MASK
;
32 case IOP13XX_CORE_FREQ_600
:
34 case IOP13XX_CORE_FREQ_667
:
36 case IOP13XX_CORE_FREQ_800
:
38 case IOP13XX_CORE_FREQ_933
:
40 case IOP13XX_CORE_FREQ_1000
:
42 case IOP13XX_CORE_FREQ_1200
:
45 printk("%s: warning unknown frequency, defaulting to 800Mhz\n",
52 static inline unsigned long iop13xx_xsi_bus_ratio(void)
54 unsigned long ratio
= __raw_readl(IOP13XX_PROCESSOR_FREQ
);
55 ratio
&= IOP13XX_XSI_FREQ_RATIO_MASK
;
57 case IOP13XX_XSI_FREQ_RATIO_2
:
59 case IOP13XX_XSI_FREQ_RATIO_3
:
61 case IOP13XX_XSI_FREQ_RATIO_4
:
64 printk("%s: warning unknown ratio, defaulting to 2\n",
71 static inline u32
read_tmr0(void)
74 asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val
));
78 static inline void write_tmr0(u32 val
)
80 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val
));
83 static inline void write_tmr1(u32 val
)
85 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val
));
88 static inline u32
read_tcr0(void)
91 asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val
));
95 static inline void write_tcr0(u32 val
)
97 asm volatile("mcr p6, 0, %0, c2, c9, 0" : : "r" (val
));
100 static inline u32
read_tcr1(void)
103 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val
));
107 static inline void write_tcr1(u32 val
)
109 asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val
));
112 static inline void write_trr0(u32 val
)
114 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val
));
117 static inline void write_trr1(u32 val
)
119 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val
));
122 static inline void write_tisr(u32 val
)
124 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val
));