arch/arm/probes/kprobes/checkers-arm.c

   1 /*
   2  * arch/arm/probes/kprobes/checkers-arm.c
   3  *
   4  * Copyright (C) 2014 Huawei Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include "../decode.h"
  18 #include "../decode-arm.h"
  19 #include "checkers.h"
  20
  21 static enum probes_insn __kprobes arm_check_stack(probes_opcode_t insn,
  22                 struct arch_probes_insn *asi,
  23                 const struct decode_header *h)
  24 {
  25         /*
  26          * PROBES_LDRSTRD, PROBES_LDMSTM, PROBES_STORE,
  27          * PROBES_STORE_EXTRA may get here. Simply mark all normal
  28          * insns as STACK_USE_NONE.
  29          */
  30         static const union decode_item table[] = {
  31                 /*
  32                  * 'STR{,D,B,H}, Rt, [Rn, Rm]' should be marked as UNKNOWN
  33                  * if Rn or Rm is SP.
  34                  *                                 x
  35                  * STR (register)       cccc 011x x0x0 xxxx xxxx xxxx xxxx xxxx
  36                  * STRB (register)      cccc 011x x1x0 xxxx xxxx xxxx xxxx xxxx
  37                  */
  38                 DECODE_OR       (0x0e10000f, 0x0600000d),
  39                 DECODE_OR       (0x0e1f0000, 0x060d0000),
  40
  41                 /*
  42                  *                                                     x
  43                  * STRD (register)      cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx
  44                  * STRH (register)      cccc 000x x0x0 xxxx xxxx xxxx 1011 xxxx
  45                  */
  46                 DECODE_OR       (0x0e5000bf, 0x000000bd),
  47                 DECODE_CUSTOM   (0x0e5f00b0, 0x000d00b0, STACK_USE_UNKNOWN),
  48
  49                 /*
  50                  * For PROBES_LDMSTM, only stmdx sp, [...] need to examine
  51                  *
  52                  * Bit B/A (bit 24) encodes arithmetic operation order. 1 means
  53                  * before, 0 means after.
  54                  * Bit I/D (bit 23) encodes arithmetic operation. 1 means
  55                  * increment, 0 means decrement.
  56                  *
  57                  * So:
  58                  *                              B I
  59                  *                              / /
  60                  *                              A D   | Rn |
  61                  * STMDX SP, [...]      cccc 100x 00x0 xxxx xxxx xxxx xxxx xxxx
  62                  */
  63                 DECODE_CUSTOM   (0x0edf0000, 0x080d0000, STACK_USE_STMDX),
  64
  65                 /*                              P U W | Rn | Rt |     imm12    |*/
  66                 /* STR (immediate)      cccc 010x x0x0 1101 xxxx xxxx xxxx xxxx */
  67                 /* STRB (immediate)     cccc 010x x1x0 1101 xxxx xxxx xxxx xxxx */
  68                 /*                              P U W | Rn | Rt |imm4|    |imm4|*/
  69                 /* STRD (immediate)     cccc 000x x1x0 1101 xxxx xxxx 1111 xxxx */
  70                 /* STRH (immediate)     cccc 000x x1x0 1101 xxxx xxxx 1011 xxxx */
  71                 /*
  72                  * index = (P == '1'); add = (U == '1').
  73                  * Above insns with:
  74                  *    index == 0 (str{,d,h} rx, [sp], #+/-imm) or
  75                  *    add == 1 (str{,d,h} rx, [sp, #+<imm>])
  76                  * should be STACK_USE_NONE.
  77                  * Only str{,b,d,h} rx,[sp,#-n] (P == 1 and U == 0) are
  78                  * required to be examined.
  79                  */
  80                 /* STR{,B} Rt,[SP,#-n]  cccc 0101 0xx0 1101 xxxx xxxx xxxx xxxx */
  81                 DECODE_CUSTOM   (0x0f9f0000, 0x050d0000, STACK_USE_FIXED_XXX),
  82
  83                 /* STR{D,H} Rt,[SP,#-n] cccc 0001 01x0 1101 xxxx xxxx 1x11 xxxx */
  84                 DECODE_CUSTOM   (0x0fdf00b0, 0x014d00b0, STACK_USE_FIXED_X0X),
  85
  86                 /* fall through */
  87                 DECODE_CUSTOM   (0, 0, STACK_USE_NONE),
  88                 DECODE_END
  89         };
  90
  91         return probes_decode_insn(insn, asi, table, false, false, stack_check_actions, NULL);
  92 }
  93
  94 const struct decode_checker arm_stack_checker[NUM_PROBES_ARM_ACTIONS] = {
  95         [PROBES_LDRSTRD] = {.checker = arm_check_stack},
  96         [PROBES_STORE_EXTRA] = {.checker = arm_check_stack},
  97         [PROBES_STORE] = {.checker = arm_check_stack},
  98         [PROBES_LDMSTM] = {.checker = arm_check_stack},
  99 };
 100
 101 static enum probes_insn __kprobes arm_check_regs_nouse(probes_opcode_t insn,
 102                 struct arch_probes_insn *asi,
 103                 const struct decode_header *h)
 104 {
 105         asi->register_usage_flags = 0;
 106         return INSN_GOOD;
 107 }
 108
 109 static enum probes_insn arm_check_regs_normal(probes_opcode_t insn,
 110                 struct arch_probes_insn *asi,
 111                 const struct decode_header *h)
 112 {
 113         u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
 114         int i;
 115
 116         asi->register_usage_flags = 0;
 117         for (i = 0; i < 5; regs >>= 4, insn >>= 4, i++)
 118                 if (regs & 0xf)
 119                         asi->register_usage_flags |= 1 << (insn & 0xf);
 120
 121         return INSN_GOOD;
 122 }
 123
 124
 125 static enum probes_insn arm_check_regs_ldmstm(probes_opcode_t insn,
 126                 struct arch_probes_insn *asi,
 127                 const struct decode_header *h)
 128 {
 129         unsigned int reglist = insn & 0xffff;
 130         unsigned int rn = (insn >> 16) & 0xf;
 131         asi->register_usage_flags = reglist | (1 << rn);
 132         return INSN_GOOD;
 133 }
 134
 135 static enum probes_insn arm_check_regs_mov_ip_sp(probes_opcode_t insn,
 136                 struct arch_probes_insn *asi,
 137                 const struct decode_header *h)
 138 {
 139         /* Instruction is 'mov ip, sp' i.e. 'mov r12, r13' */
 140         asi->register_usage_flags = (1 << 12) | (1<< 13);
 141         return INSN_GOOD;
 142 }
 143
 144 /*
 145  *                                    | Rn |Rt/d|         | Rm |
 146  * LDRD (register)      cccc 000x x0x0 xxxx xxxx xxxx 1101 xxxx
 147  * STRD (register)      cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx
 148  *                                    | Rn |Rt/d|         |imm4L|
 149  * LDRD (immediate)     cccc 000x x1x0 xxxx xxxx xxxx 1101 xxxx
 150  * STRD (immediate)     cccc 000x x1x0 xxxx xxxx xxxx 1111 xxxx
 151  *
 152  * Such instructions access Rt/d and its next register, so different
 153  * from others, a specific checker is required to handle this extra
 154  * implicit register usage.
 155  */
 156 static enum probes_insn arm_check_regs_ldrdstrd(probes_opcode_t insn,
 157                 struct arch_probes_insn *asi,
 158                 const struct decode_header *h)
 159 {
 160         int rdt = (insn >> 12) & 0xf;
 161         arm_check_regs_normal(insn, asi, h);
 162         asi->register_usage_flags |= 1 << (rdt + 1);
 163         return INSN_GOOD;
 164 }
 165
 166
 167 const struct decode_checker arm_regs_checker[NUM_PROBES_ARM_ACTIONS] = {
 168         [PROBES_MRS] = {.checker = arm_check_regs_normal},
 169         [PROBES_SATURATING_ARITHMETIC] = {.checker = arm_check_regs_normal},
 170         [PROBES_MUL1] = {.checker = arm_check_regs_normal},
 171         [PROBES_MUL2] = {.checker = arm_check_regs_normal},
 172         [PROBES_MUL_ADD_LONG] = {.checker = arm_check_regs_normal},
 173         [PROBES_MUL_ADD] = {.checker = arm_check_regs_normal},
 174         [PROBES_LOAD] = {.checker = arm_check_regs_normal},
 175         [PROBES_LOAD_EXTRA] = {.checker = arm_check_regs_normal},
 176         [PROBES_STORE] = {.checker = arm_check_regs_normal},
 177         [PROBES_STORE_EXTRA] = {.checker = arm_check_regs_normal},
 178         [PROBES_DATA_PROCESSING_REG] = {.checker = arm_check_regs_normal},
 179         [PROBES_DATA_PROCESSING_IMM] = {.checker = arm_check_regs_normal},
 180         [PROBES_SEV] = {.checker = arm_check_regs_nouse},
 181         [PROBES_WFE] = {.checker = arm_check_regs_nouse},
 182         [PROBES_SATURATE] = {.checker = arm_check_regs_normal},
 183         [PROBES_REV] = {.checker = arm_check_regs_normal},
 184         [PROBES_MMI] = {.checker = arm_check_regs_normal},
 185         [PROBES_PACK] = {.checker = arm_check_regs_normal},
 186         [PROBES_EXTEND] = {.checker = arm_check_regs_normal},
 187         [PROBES_EXTEND_ADD] = {.checker = arm_check_regs_normal},
 188         [PROBES_BITFIELD] = {.checker = arm_check_regs_normal},
 189         [PROBES_LDMSTM] = {.checker = arm_check_regs_ldmstm},
 190         [PROBES_MOV_IP_SP] = {.checker = arm_check_regs_mov_ip_sp},
 191         [PROBES_LDRSTRD] = {.checker = arm_check_regs_ldrdstrd},
 192 };