2 * OCA4080 Device Tree Source
4 * Copyright 2014 Prodrive Technologies B.V.
7 * P4080DS Device Tree Source
8 * Copyright 2009-2011 Freescale Semiconductor Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
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18 * names of its contributors may be used to endorse or promote products
19 * derived from this software without specific prior written permission.
22 * ALTERNATIVELY, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") as published by the Free Software
24 * Foundation, either version 2 of that License or (at your option) any
27 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
28 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
29 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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39 /include/ "fsl/p4080si-pre.dtsi"
42 model = "fsl,OCA4080";
43 compatible = "fsl,OCA4080";
46 interrupt-parent = <&mpic>;
49 device_type = "memory";
57 bman_fbpr: bman-fbpr {
59 alignment = <0 0x1000000>;
63 dcsr: dcsr@f00000000 {
64 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
67 bportals: bman-portals@ff4000000 {
68 ranges = <0x0 0xf 0xf4000000 0x200000>;
72 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
73 reg = <0xf 0xfe000000 0 0x00001000>;
100 rio: rapidio@ffe0c0000 {
101 reg = <0xf 0xfe0c0000 0 0x11000>;
104 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
108 lbc: localbus@ffe124000 {
109 reg = <0xf 0xfe124000 0 0x1000>;
110 ranges = <0 0 0xf 0xef800000 0x800000>;
113 compatible = "cfi-flash";
114 reg = <0 0 0x00800000>;
120 pci0: pcie@ffe200000 {
124 pci1: pcie@ffe201000 {
128 pci2: pcie@ffe202000 {
133 /include/ "fsl/p4080si-post.dtsi"