2 * P5020DS Device Tree Source
4 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
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35 /include/ "fsl/p5020si-pre.dtsi"
38 model = "fsl,P5020DS";
39 compatible = "fsl,P5020DS";
42 interrupt-parent = <&mpic>;
45 device_type = "memory";
53 bman_fbpr: bman-fbpr {
55 alignment = <0 0x1000000>;
59 dcsr: dcsr@f00000000 {
60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
69 reg = <0xf 0xfe000000 0 0x00001000>;
74 compatible = "spansion,s25sl12801";
76 spi-max-frequency = <40000000>; /* input clock */
79 reg = <0x00000000 0x00100000>;
84 reg = <0x00100000 0x00500000>;
89 reg = <0x00600000 0x00100000>;
93 label = "file system";
94 reg = <0x00700000 0x00900000>;
101 compatible = "at24,24c256";
105 compatible = "at24,24c256";
112 compatible = "dallas,ds3232";
114 interrupts = <0x1 0x1 0 0>;
117 compatible = "ti,ina220";
119 shunt-resistor = <1000>;
122 compatible = "ti,ina220";
124 shunt-resistor = <1000>;
127 compatible = "ti,ina220";
129 shunt-resistor = <1000>;
132 compatible = "ti,ina220";
134 shunt-resistor = <1000>;
137 compatible = "adi,adt7461";
143 rio: rapidio@ffe0c0000 {
144 reg = <0xf 0xfe0c0000 0 0x11000>;
147 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
150 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
154 lbc: localbus@ffe124000 {
155 reg = <0xf 0xfe124000 0 0x1000>;
156 ranges = <0 0 0xf 0xe8000000 0x08000000
157 2 0 0xf 0xffa00000 0x00040000
158 3 0 0xf 0xffdf0000 0x00008000>;
161 compatible = "cfi-flash";
162 reg = <0 0 0x08000000>;
168 #address-cells = <1>;
170 compatible = "fsl,elbc-fcm-nand";
171 reg = <0x2 0x0 0x40000>;
174 label = "NAND U-Boot Image";
175 reg = <0x0 0x02000000>;
180 label = "NAND Root File System";
181 reg = <0x02000000 0x10000000>;
185 label = "NAND Compressed RFS Image";
186 reg = <0x12000000 0x08000000>;
190 label = "NAND Linux Kernel Image";
191 reg = <0x1a000000 0x04000000>;
195 label = "NAND DTB Image";
196 reg = <0x1e000000 0x01000000>;
200 label = "NAND Writable User area";
201 reg = <0x1f000000 0x21000000>;
206 compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
211 pci0: pcie@ffe200000 {
212 reg = <0xf 0xfe200000 0 0x1000>;
213 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
214 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
216 ranges = <0x02000000 0 0xe0000000
217 0x02000000 0 0xe0000000
220 0x01000000 0 0x00000000
221 0x01000000 0 0x00000000
226 pci1: pcie@ffe201000 {
227 reg = <0xf 0xfe201000 0 0x1000>;
228 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
229 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
231 ranges = <0x02000000 0 0xe0000000
232 0x02000000 0 0xe0000000
235 0x01000000 0 0x00000000
236 0x01000000 0 0x00000000
241 pci2: pcie@ffe202000 {
242 reg = <0xf 0xfe202000 0 0x1000>;
243 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
244 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
246 ranges = <0x02000000 0 0xe0000000
247 0x02000000 0 0xe0000000
250 0x01000000 0 0x00000000
251 0x01000000 0 0x00000000
256 pci3: pcie@ffe203000 {
257 reg = <0xf 0xfe203000 0 0x1000>;
258 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
259 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
261 ranges = <0x02000000 0 0xe0000000
262 0x02000000 0 0xe0000000
265 0x01000000 0 0x00000000
266 0x01000000 0 0x00000000
272 /include/ "fsl/p5020si-post.dtsi"