Linux 4.1.18
[linux/fpc-iii.git] / arch / powerpc / boot / dts / p5020ds.dts
blob7382636dc560af9a10071a670235adb26cde4344
1 /*
2  * P5020DS Device Tree Source
3  *
4  * Copyright 2010 - 2014 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
35 /include/ "fsl/p5020si-pre.dtsi"
37 / {
38         model = "fsl,P5020DS";
39         compatible = "fsl,P5020DS";
40         #address-cells = <2>;
41         #size-cells = <2>;
42         interrupt-parent = <&mpic>;
44         memory {
45                 device_type = "memory";
46         };
48         reserved-memory {
49                 #address-cells = <2>;
50                 #size-cells = <2>;
51                 ranges;
53                 bman_fbpr: bman-fbpr {
54                         size = <0 0x1000000>;
55                         alignment = <0 0x1000000>;
56                 };
57         };
59         dcsr: dcsr@f00000000 {
60                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
61         };
63         bportals: bman-portals@ff4000000 {
64                 ranges = <0x0 0xf 0xf4000000 0x200000>;
65         };
67         soc: soc@ffe000000 {
68                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
69                 reg = <0xf 0xfe000000 0 0x00001000>;
70                 spi@110000 {
71                         flash@0 {
72                                 #address-cells = <1>;
73                                 #size-cells = <1>;
74                                 compatible = "spansion,s25sl12801";
75                                 reg = <0>;
76                                 spi-max-frequency = <40000000>; /* input clock */
77                                 partition@u-boot {
78                                         label = "u-boot";
79                                         reg = <0x00000000 0x00100000>;
80                                         read-only;
81                                 };
82                                 partition@kernel {
83                                         label = "kernel";
84                                         reg = <0x00100000 0x00500000>;
85                                         read-only;
86                                 };
87                                 partition@dtb {
88                                         label = "dtb";
89                                         reg = <0x00600000 0x00100000>;
90                                         read-only;
91                                 };
92                                 partition@fs {
93                                         label = "file system";
94                                         reg = <0x00700000 0x00900000>;
95                                 };
96                         };
97                 };
99                 i2c@118100 {
100                         eeprom@51 {
101                                 compatible = "at24,24c256";
102                                 reg = <0x51>;
103                         };
104                         eeprom@52 {
105                                 compatible = "at24,24c256";
106                                 reg = <0x52>;
107                         };
108                 };
110                 i2c@119100 {
111                         rtc@68 {
112                                 compatible = "dallas,ds3232";
113                                 reg = <0x68>;
114                                 interrupts = <0x1 0x1 0 0>;
115                         };
116                         ina220@40 {
117                                 compatible = "ti,ina220";
118                                 reg = <0x40>;
119                                 shunt-resistor = <1000>;
120                         };
121                         ina220@41 {
122                                 compatible = "ti,ina220";
123                                 reg = <0x41>;
124                                 shunt-resistor = <1000>;
125                         };
126                         ina220@44 {
127                                 compatible = "ti,ina220";
128                                 reg = <0x44>;
129                                 shunt-resistor = <1000>;
130                         };
131                         ina220@45 {
132                                 compatible = "ti,ina220";
133                                 reg = <0x45>;
134                                 shunt-resistor = <1000>;
135                         };
136                         adt7461@4c {
137                                 compatible = "adi,adt7461";
138                                 reg = <0x4c>;
139                         };
140                 };
141         };
143         rio: rapidio@ffe0c0000 {
144                 reg = <0xf 0xfe0c0000 0 0x11000>;
146                 port1 {
147                         ranges = <0 0 0xc 0x20000000 0 0x10000000>;
148                 };
149                 port2 {
150                         ranges = <0 0 0xc 0x30000000 0 0x10000000>;
151                 };
152         };
154         lbc: localbus@ffe124000 {
155                 reg = <0xf 0xfe124000 0 0x1000>;
156                 ranges = <0 0 0xf 0xe8000000 0x08000000
157                           2 0 0xf 0xffa00000 0x00040000
158                           3 0 0xf 0xffdf0000 0x00008000>;
160                 flash@0,0 {
161                         compatible = "cfi-flash";
162                         reg = <0 0 0x08000000>;
163                         bank-width = <2>;
164                         device-width = <2>;
165                 };
167                 nand@2,0 {
168                         #address-cells = <1>;
169                         #size-cells = <1>;
170                         compatible = "fsl,elbc-fcm-nand";
171                         reg = <0x2 0x0 0x40000>;
173                         partition@0 {
174                                 label = "NAND U-Boot Image";
175                                 reg = <0x0 0x02000000>;
176                                 read-only;
177                         };
179                         partition@2000000 {
180                                 label = "NAND Root File System";
181                                 reg = <0x02000000 0x10000000>;
182                         };
184                         partition@12000000 {
185                                 label = "NAND Compressed RFS Image";
186                                 reg = <0x12000000 0x08000000>;
187                         };
189                         partition@1a000000 {
190                                 label = "NAND Linux Kernel Image";
191                                 reg = <0x1a000000 0x04000000>;
192                         };
194                         partition@1e000000 {
195                                 label = "NAND DTB Image";
196                                 reg = <0x1e000000 0x01000000>;
197                         };
199                         partition@1f000000 {
200                                 label = "NAND Writable User area";
201                                 reg = <0x1f000000 0x21000000>;
202                         };
203                 };
205                 board-control@3,0 {
206                         compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
207                         reg = <3 0 0x30>;
208                 };
209         };
211         pci0: pcie@ffe200000 {
212                 reg = <0xf 0xfe200000 0 0x1000>;
213                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
214                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
215                 pcie@0 {
216                         ranges = <0x02000000 0 0xe0000000
217                                   0x02000000 0 0xe0000000
218                                   0 0x20000000
220                                   0x01000000 0 0x00000000
221                                   0x01000000 0 0x00000000
222                                   0 0x00010000>;
223                 };
224         };
226         pci1: pcie@ffe201000 {
227                 reg = <0xf 0xfe201000 0 0x1000>;
228                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
229                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
230                 pcie@0 {
231                         ranges = <0x02000000 0 0xe0000000
232                                   0x02000000 0 0xe0000000
233                                   0 0x20000000
235                                   0x01000000 0 0x00000000
236                                   0x01000000 0 0x00000000
237                                   0 0x00010000>;
238                 };
239         };
241         pci2: pcie@ffe202000 {
242                 reg = <0xf 0xfe202000 0 0x1000>;
243                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
244                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
245                 pcie@0 {
246                         ranges = <0x02000000 0 0xe0000000
247                                   0x02000000 0 0xe0000000
248                                   0 0x20000000
250                                   0x01000000 0 0x00000000
251                                   0x01000000 0 0x00000000
252                                   0 0x00010000>;
253                 };
254         };
256         pci3: pcie@ffe203000 {
257                 reg = <0xf 0xfe203000 0 0x1000>;
258                 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
259                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
260                 pcie@0 {
261                         ranges = <0x02000000 0 0xe0000000
262                                   0x02000000 0 0xe0000000
263                                   0 0x20000000
265                                   0x01000000 0 0x00000000
266                                   0x01000000 0 0x00000000
267                                   0 0x00010000>;
268                 };
269         };
272 /include/ "fsl/p5020si-post.dtsi"