arch/powerpc/boot/dts/p5040ds.dts

   1 /*
   2  * P5040DS Device Tree Source
   3  *
   4  * Copyright 2012 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * This software is provided by Freescale Semiconductor "as is" and any
  24  * express or implied warranties, including, but not limited to, the implied
  25  * warranties of merchantability and fitness for a particular purpose are
  26  * disclaimed. In no event shall Freescale Semiconductor be liable for any
  27  * direct, indirect, incidental, special, exemplary, or consequential damages
  28  * (including, but not limited to, procurement of substitute goods or services;
  29  * loss of use, data, or profits; or business interruption) however caused and
  30  * on any theory of liability, whether in contract, strict liability, or tort
  31  * (including negligence or otherwise) arising in any way out of the use of this
  32  * software, even if advised of the possibility of such damage.
  33  */
  34
  35 /include/ "fsl/p5040si-pre.dtsi"
  36
  37 / {
  38         model = "fsl,P5040DS";
  39         compatible = "fsl,P5040DS";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         memory {
  45                 device_type = "memory";
  46         };
  47
  48         reserved-memory {
  49                 #address-cells = <2>;
  50                 #size-cells = <2>;
  51                 ranges;
  52
  53                 bman_fbpr: bman-fbpr {
  54                         size = <0 0x1000000>;
  55                         alignment = <0 0x1000000>;
  56                 };
  57         };
  58
  59         dcsr: dcsr@f00000000 {
  60                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
  61         };
  62
  63         bportals: bman-portals@ff4000000 {
  64                 ranges = <0x0 0xf 0xf4000000 0x200000>;
  65         };
  66
  67         soc: soc@ffe000000 {
  68                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  69                 reg = <0xf 0xfe000000 0 0x00001000>;
  70                 spi@110000 {
  71                         flash@0 {
  72                                 #address-cells = <1>;
  73                                 #size-cells = <1>;
  74                                 compatible = "spansion,s25sl12801";
  75                                 reg = <0>;
  76                                 spi-max-frequency = <40000000>; /* input clock */
  77                                 partition@u-boot {
  78                                         label = "u-boot";
  79                                         reg = <0x00000000 0x00100000>;
  80                                 };
  81                                 partition@kernel {
  82                                         label = "kernel";
  83                                         reg = <0x00100000 0x00500000>;
  84                                 };
  85                                 partition@dtb {
  86                                         label = "dtb";
  87                                         reg = <0x00600000 0x00100000>;
  88                                 };
  89                                 partition@fs {
  90                                         label = "file system";
  91                                         reg = <0x00700000 0x00900000>;
  92                                 };
  93                         };
  94                 };
  95
  96                 i2c@118100 {
  97                         eeprom@51 {
  98                                 compatible = "at24,24c256";
  99                                 reg = <0x51>;
 100                         };
 101                         eeprom@52 {
 102                                 compatible = "at24,24c256";
 103                                 reg = <0x52>;
 104                         };
 105                 };
 106
 107                 i2c@119100 {
 108                         rtc@68 {
 109                                 compatible = "dallas,ds3232";
 110                                 reg = <0x68>;
 111                                 interrupts = <0x1 0x1 0 0>;
 112                         };
 113                         ina220@40 {
 114                                 compatible = "ti,ina220";
 115                                 reg = <0x40>;
 116                                 shunt-resistor = <1000>;
 117                         };
 118                         ina220@41 {
 119                                 compatible = "ti,ina220";
 120                                 reg = <0x41>;
 121                                 shunt-resistor = <1000>;
 122                         };
 123                         ina220@44 {
 124                                 compatible = "ti,ina220";
 125                                 reg = <0x44>;
 126                                 shunt-resistor = <1000>;
 127                         };
 128                         ina220@45 {
 129                                 compatible = "ti,ina220";
 130                                 reg = <0x45>;
 131                                 shunt-resistor = <1000>;
 132                         };
 133                         adt7461@4c {
 134                                 compatible = "adi,adt7461";
 135                                 reg = <0x4c>;
 136                         };
 137                 };
 138         };
 139
 140         lbc: localbus@ffe124000 {
 141                 reg = <0xf 0xfe124000 0 0x1000>;
 142                 ranges = <0 0 0xf 0xe8000000 0x08000000
 143                           2 0 0xf 0xffa00000 0x00040000
 144                           3 0 0xf 0xffdf0000 0x00008000>;
 145
 146                 flash@0,0 {
 147                         compatible = "cfi-flash";
 148                         reg = <0 0 0x08000000>;
 149                         bank-width = <2>;
 150                         device-width = <2>;
 151                 };
 152
 153                 nand@2,0 {
 154                         #address-cells = <1>;
 155                         #size-cells = <1>;
 156                         compatible = "fsl,elbc-fcm-nand";
 157                         reg = <0x2 0x0 0x40000>;
 158
 159                         partition@0 {
 160                                 label = "NAND U-Boot Image";
 161                                 reg = <0x0 0x02000000>;
 162                         };
 163
 164                         partition@2000000 {
 165                                 label = "NAND Root File System";
 166                                 reg = <0x02000000 0x10000000>;
 167                         };
 168
 169                         partition@12000000 {
 170                                 label = "NAND Compressed RFS Image";
 171                                 reg = <0x12000000 0x08000000>;
 172                         };
 173
 174                         partition@1a000000 {
 175                                 label = "NAND Linux Kernel Image";
 176                                 reg = <0x1a000000 0x04000000>;
 177                         };
 178
 179                         partition@1e000000 {
 180                                 label = "NAND DTB Image";
 181                                 reg = <0x1e000000 0x01000000>;
 182                         };
 183
 184                         partition@1f000000 {
 185                                 label = "NAND Writable User area";
 186                                 reg = <0x1f000000 0x01000000>;
 187                         };
 188                 };
 189
 190                 board-control@3,0 {
 191                         compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
 192                         reg = <3 0 0x40>;
 193                 };
 194         };
 195
 196         pci0: pcie@ffe200000 {
 197                 reg = <0xf 0xfe200000 0 0x1000>;
 198                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 199                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 200                 pcie@0 {
 201                         ranges = <0x02000000 0 0xe0000000
 202                                   0x02000000 0 0xe0000000
 203                                   0 0x20000000
 204
 205                                   0x01000000 0 0x00000000
 206                                   0x01000000 0 0x00000000
 207                                   0 0x00010000>;
 208                 };
 209         };
 210
 211         pci1: pcie@ffe201000 {
 212                 reg = <0xf 0xfe201000 0 0x1000>;
 213                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 214                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
 215                 pcie@0 {
 216                         ranges = <0x02000000 0 0xe0000000
 217                                   0x02000000 0 0xe0000000
 218                                   0 0x20000000
 219
 220                                   0x01000000 0 0x00000000
 221                                   0x01000000 0 0x00000000
 222                                   0 0x00010000>;
 223                 };
 224         };
 225
 226         pci2: pcie@ffe202000 {
 227                 reg = <0xf 0xfe202000 0 0x1000>;
 228                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
 229                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
 230                 pcie@0 {
 231                         ranges = <0x02000000 0 0xe0000000
 232                                   0x02000000 0 0xe0000000
 233                                   0 0x20000000
 234
 235                                   0x01000000 0 0x00000000
 236                                   0x01000000 0 0x00000000
 237                                   0 0x00010000>;
 238                 };
 239         };
 240 };
 241
 242 /include/ "fsl/p5040si-post.dtsi"