1 #include <linux/device.h>
7 MCE_UCNA_SEVERITY
= MCE_DEFERRED_SEVERITY
,
17 #define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
19 /* One object for each MCE bank, shared by all CPUs */
21 u64 ctl
; /* subevents to enable */
22 unsigned char init
; /* initialise bank? */
23 struct device_attribute attr
; /* device attribute */
24 char attrname
[ATTR_LEN
]; /* attribute name */
27 extern int (*mce_severity
)(struct mce
*a
, int tolerant
, char **msg
, bool is_excp
);
28 struct dentry
*mce_get_debugfs_dir(void);
30 extern struct mce_bank
*mce_banks
;
31 extern mce_banks_t mce_banks_ce_disabled
;
33 #ifdef CONFIG_X86_MCE_INTEL
34 unsigned long cmci_intel_adjust_timer(unsigned long interval
);
35 bool mce_intel_cmci_poll(void);
36 void mce_intel_hcpu_update(unsigned long cpu
);
37 void cmci_disable_bank(int bank
);
39 # define cmci_intel_adjust_timer mce_adjust_timer_default
40 static inline bool mce_intel_cmci_poll(void) { return false; }
41 static inline void mce_intel_hcpu_update(unsigned long cpu
) { }
42 static inline void cmci_disable_bank(int bank
) { }
45 void mce_timer_kick(unsigned long interval
);
47 #ifdef CONFIG_ACPI_APEI
48 int apei_write_mce(struct mce
*m
);
49 ssize_t
apei_read_mce(struct mce
*m
, u64
*record_id
);
50 int apei_check_mce(void);
51 int apei_clear_mce(u64 record_id
);
53 static inline int apei_write_mce(struct mce
*m
)
57 static inline ssize_t
apei_read_mce(struct mce
*m
, u64
*record_id
)
61 static inline int apei_check_mce(void)
65 static inline int apei_clear_mce(u64 record_id
)