Linux 4.1.18
[linux/fpc-iii.git] / arch / x86 / kernel / cpu / mcheck / mce-internal.h
blobfe32074b865b1686ba9e0e2cdc3ccb5ebe99ddfe
1 #include <linux/device.h>
2 #include <asm/mce.h>
4 enum severity_level {
5 MCE_NO_SEVERITY,
6 MCE_DEFERRED_SEVERITY,
7 MCE_UCNA_SEVERITY = MCE_DEFERRED_SEVERITY,
8 MCE_KEEP_SEVERITY,
9 MCE_SOME_SEVERITY,
10 MCE_AO_SEVERITY,
11 MCE_UC_SEVERITY,
12 MCE_AR_SEVERITY,
13 MCE_PANIC_SEVERITY,
16 #define ATTR_LEN 16
17 #define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
19 /* One object for each MCE bank, shared by all CPUs */
20 struct mce_bank {
21 u64 ctl; /* subevents to enable */
22 unsigned char init; /* initialise bank? */
23 struct device_attribute attr; /* device attribute */
24 char attrname[ATTR_LEN]; /* attribute name */
27 extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp);
28 struct dentry *mce_get_debugfs_dir(void);
30 extern struct mce_bank *mce_banks;
31 extern mce_banks_t mce_banks_ce_disabled;
33 #ifdef CONFIG_X86_MCE_INTEL
34 unsigned long cmci_intel_adjust_timer(unsigned long interval);
35 bool mce_intel_cmci_poll(void);
36 void mce_intel_hcpu_update(unsigned long cpu);
37 void cmci_disable_bank(int bank);
38 #else
39 # define cmci_intel_adjust_timer mce_adjust_timer_default
40 static inline bool mce_intel_cmci_poll(void) { return false; }
41 static inline void mce_intel_hcpu_update(unsigned long cpu) { }
42 static inline void cmci_disable_bank(int bank) { }
43 #endif
45 void mce_timer_kick(unsigned long interval);
47 #ifdef CONFIG_ACPI_APEI
48 int apei_write_mce(struct mce *m);
49 ssize_t apei_read_mce(struct mce *m, u64 *record_id);
50 int apei_check_mce(void);
51 int apei_clear_mce(u64 record_id);
52 #else
53 static inline int apei_write_mce(struct mce *m)
55 return -EINVAL;
57 static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id)
59 return 0;
61 static inline int apei_check_mce(void)
63 return 0;
65 static inline int apei_clear_mce(u64 record_id)
67 return -EINVAL;
69 #endif