arch/x86/kvm/x86.h

   1 #ifndef ARCH_X86_KVM_X86_H
   2 #define ARCH_X86_KVM_X86_H
   3
   4 #include <linux/kvm_host.h>
   5 #include "kvm_cache_regs.h"
   6
   7 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
   8 {
   9         vcpu->arch.exception.pending = false;
  10 }
  11
  12 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
  13         bool soft)
  14 {
  15         vcpu->arch.interrupt.pending = true;
  16         vcpu->arch.interrupt.soft = soft;
  17         vcpu->arch.interrupt.nr = vector;
  18 }
  19
  20 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
  21 {
  22         vcpu->arch.interrupt.pending = false;
  23 }
  24
  25 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
  26 {
  27         return vcpu->arch.exception.pending || vcpu->arch.interrupt.pending ||
  28                 vcpu->arch.nmi_injected;
  29 }
  30
  31 static inline bool kvm_exception_is_soft(unsigned int nr)
  32 {
  33         return (nr == BP_VECTOR) || (nr == OF_VECTOR);
  34 }
  35
  36 static inline bool is_protmode(struct kvm_vcpu *vcpu)
  37 {
  38         return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
  39 }
  40
  41 static inline int is_long_mode(struct kvm_vcpu *vcpu)
  42 {
  43 #ifdef CONFIG_X86_64
  44         return vcpu->arch.efer & EFER_LMA;
  45 #else
  46         return 0;
  47 #endif
  48 }
  49
  50 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
  51 {
  52         int cs_db, cs_l;
  53
  54         if (!is_long_mode(vcpu))
  55                 return false;
  56         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  57         return cs_l;
  58 }
  59
  60 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
  61 {
  62         return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
  63 }
  64
  65 static inline int is_pae(struct kvm_vcpu *vcpu)
  66 {
  67         return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
  68 }
  69
  70 static inline int is_pse(struct kvm_vcpu *vcpu)
  71 {
  72         return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
  73 }
  74
  75 static inline int is_paging(struct kvm_vcpu *vcpu)
  76 {
  77         return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
  78 }
  79
  80 static inline u32 bit(int bitno)
  81 {
  82         return 1 << (bitno & 31);
  83 }
  84
  85 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
  86                                         gva_t gva, gfn_t gfn, unsigned access)
  87 {
  88         vcpu->arch.mmio_gva = gva & PAGE_MASK;
  89         vcpu->arch.access = access;
  90         vcpu->arch.mmio_gfn = gfn;
  91         vcpu->arch.mmio_gen = kvm_memslots(vcpu->kvm)->generation;
  92 }
  93
  94 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
  95 {
  96         return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
  97 }
  98
  99 /*
 100  * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
 101  * clear all mmio cache info.
 102  */
 103 #define MMIO_GVA_ANY (~(gva_t)0)
 104
 105 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
 106 {
 107         if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
 108                 return;
 109
 110         vcpu->arch.mmio_gva = 0;
 111 }
 112
 113 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
 114 {
 115         if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
 116               vcpu->arch.mmio_gva == (gva & PAGE_MASK))
 117                 return true;
 118
 119         return false;
 120 }
 121
 122 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
 123 {
 124         if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
 125               vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
 126                 return true;
 127
 128         return false;
 129 }
 130
 131 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
 132                                                enum kvm_reg reg)
 133 {
 134         unsigned long val = kvm_register_read(vcpu, reg);
 135
 136         return is_64_bit_mode(vcpu) ? val : (u32)val;
 137 }
 138
 139 static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
 140                                        enum kvm_reg reg,
 141                                        unsigned long val)
 142 {
 143         if (!is_64_bit_mode(vcpu))
 144                 val = (u32)val;
 145         return kvm_register_write(vcpu, reg, val);
 146 }
 147
 148 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
 149 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
 150 void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
 151 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
 152
 153 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
 154
 155 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
 156         gva_t addr, void *val, unsigned int bytes,
 157         struct x86_exception *exception);
 158
 159 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
 160         gva_t addr, void *val, unsigned int bytes,
 161         struct x86_exception *exception);
 162
 163 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 164
 165 #define KVM_SUPPORTED_XCR0     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
 166                                 | XSTATE_BNDREGS | XSTATE_BNDCSR \
 167                                 | XSTATE_AVX512)
 168 extern u64 host_xcr0;
 169
 170 extern u64 kvm_supported_xcr0(void);
 171
 172 extern unsigned int min_timer_period_us;
 173
 174 extern unsigned int lapic_timer_advance_ns;
 175
 176 extern struct static_key kvm_no_apic_vcpu;
 177 #endif