1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/mfd/rtsx_pci.h>
29 static u8
rts5229_get_ic_version(struct rtsx_pcr
*pcr
)
33 rtsx_pci_read_register(pcr
, DUMMY_REG_RESET_0
, &val
);
37 static int rts5229_extra_init_hw(struct rtsx_pcr
*pcr
)
39 rtsx_pci_init_cmd(pcr
);
41 /* Configure GPIO as output */
42 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, GPIO_CTL
, 0x02, 0x02);
43 /* Switch LDO3318 source from DV33 to card_3v3 */
44 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, LDO_PWR_SEL
, 0x03, 0x00);
45 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, LDO_PWR_SEL
, 0x03, 0x01);
46 /* LED shine disabled, set initial shine cycle period */
47 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, OLT_LED_CTL
, 0x0F, 0x02);
49 return rtsx_pci_send_cmd(pcr
, 100);
52 static int rts5229_optimize_phy(struct rtsx_pcr
*pcr
)
54 /* Optimize RX sensitivity */
55 return rtsx_pci_write_phy_register(pcr
, 0x00, 0xBA42);
58 static int rts5229_turn_on_led(struct rtsx_pcr
*pcr
)
60 return rtsx_pci_write_register(pcr
, GPIO_CTL
, 0x02, 0x02);
63 static int rts5229_turn_off_led(struct rtsx_pcr
*pcr
)
65 return rtsx_pci_write_register(pcr
, GPIO_CTL
, 0x02, 0x00);
68 static int rts5229_enable_auto_blink(struct rtsx_pcr
*pcr
)
70 return rtsx_pci_write_register(pcr
, OLT_LED_CTL
, 0x08, 0x08);
73 static int rts5229_disable_auto_blink(struct rtsx_pcr
*pcr
)
75 return rtsx_pci_write_register(pcr
, OLT_LED_CTL
, 0x08, 0x00);
78 static int rts5229_card_power_on(struct rtsx_pcr
*pcr
, int card
)
82 rtsx_pci_init_cmd(pcr
);
83 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
84 SD_POWER_MASK
, SD_PARTIAL_POWER_ON
);
85 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
86 LDO3318_PWR_MASK
, 0x02);
87 err
= rtsx_pci_send_cmd(pcr
, 100);
91 /* To avoid too large in-rush current */
94 rtsx_pci_init_cmd(pcr
);
95 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
96 SD_POWER_MASK
, SD_POWER_ON
);
97 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
98 LDO3318_PWR_MASK
, 0x06);
99 err
= rtsx_pci_send_cmd(pcr
, 100);
106 static int rts5229_card_power_off(struct rtsx_pcr
*pcr
, int card
)
108 rtsx_pci_init_cmd(pcr
);
109 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
110 SD_POWER_MASK
| PMOS_STRG_MASK
,
111 SD_POWER_OFF
| PMOS_STRG_400mA
);
112 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
113 LDO3318_PWR_MASK
, 0X00);
114 return rtsx_pci_send_cmd(pcr
, 100);
117 static int rts5229_switch_output_voltage(struct rtsx_pcr
*pcr
, u8 voltage
)
121 if (voltage
== OUTPUT_3V3
) {
122 err
= rtsx_pci_write_register(pcr
,
123 SD30_DRIVE_SEL
, 0x07, DRIVER_TYPE_D
);
126 err
= rtsx_pci_write_phy_register(pcr
, 0x08, 0x4FC0 | 0x24);
129 } else if (voltage
== OUTPUT_1V8
) {
130 err
= rtsx_pci_write_register(pcr
,
131 SD30_DRIVE_SEL
, 0x07, DRIVER_TYPE_B
);
134 err
= rtsx_pci_write_phy_register(pcr
, 0x08, 0x4C40 | 0x24);
144 static const struct pcr_ops rts5229_pcr_ops
= {
145 .extra_init_hw
= rts5229_extra_init_hw
,
146 .optimize_phy
= rts5229_optimize_phy
,
147 .turn_on_led
= rts5229_turn_on_led
,
148 .turn_off_led
= rts5229_turn_off_led
,
149 .enable_auto_blink
= rts5229_enable_auto_blink
,
150 .disable_auto_blink
= rts5229_disable_auto_blink
,
151 .card_power_on
= rts5229_card_power_on
,
152 .card_power_off
= rts5229_card_power_off
,
153 .switch_output_voltage
= rts5229_switch_output_voltage
,
155 .conv_clk_and_div_n
= NULL
,
158 /* SD Pull Control Enable:
159 * SD_DAT[3:0] ==> pull up
163 * SD_CLK ==> pull down
165 static const u32 rts5229_sd_pull_ctl_enable_tbl1
[] = {
166 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0xAA),
167 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xE9),
171 /* For RTS5229 version C */
172 static const u32 rts5229_sd_pull_ctl_enable_tbl2
[] = {
173 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0xAA),
174 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xD9),
178 /* SD Pull Control Disable:
179 * SD_DAT[3:0] ==> pull down
181 * SD_WP ==> pull down
182 * SD_CMD ==> pull down
183 * SD_CLK ==> pull down
185 static const u32 rts5229_sd_pull_ctl_disable_tbl1
[] = {
186 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0x55),
187 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xD5),
191 /* For RTS5229 version C */
192 static const u32 rts5229_sd_pull_ctl_disable_tbl2
[] = {
193 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0x55),
194 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xE5),
198 /* MS Pull Control Enable:
200 * others ==> pull down
202 static const u32 rts5229_ms_pull_ctl_enable_tbl
[] = {
203 RTSX_REG_PAIR(CARD_PULL_CTL5
, 0x55),
204 RTSX_REG_PAIR(CARD_PULL_CTL6
, 0x15),
208 /* MS Pull Control Disable:
210 * others ==> pull down
212 static const u32 rts5229_ms_pull_ctl_disable_tbl
[] = {
213 RTSX_REG_PAIR(CARD_PULL_CTL5
, 0x55),
214 RTSX_REG_PAIR(CARD_PULL_CTL6
, 0x15),
218 void rts5229_init_params(struct rtsx_pcr
*pcr
)
220 pcr
->extra_caps
= EXTRA_CAPS_SD_SDR50
| EXTRA_CAPS_SD_SDR104
;
222 pcr
->ops
= &rts5229_pcr_ops
;
224 pcr
->ic_version
= rts5229_get_ic_version(pcr
);
225 if (pcr
->ic_version
== IC_VER_C
) {
226 pcr
->sd_pull_ctl_enable_tbl
= rts5229_sd_pull_ctl_enable_tbl2
;
227 pcr
->sd_pull_ctl_disable_tbl
= rts5229_sd_pull_ctl_disable_tbl2
;
229 pcr
->sd_pull_ctl_enable_tbl
= rts5229_sd_pull_ctl_enable_tbl1
;
230 pcr
->sd_pull_ctl_disable_tbl
= rts5229_sd_pull_ctl_disable_tbl1
;
232 pcr
->ms_pull_ctl_enable_tbl
= rts5229_ms_pull_ctl_enable_tbl
;
233 pcr
->ms_pull_ctl_disable_tbl
= rts5229_ms_pull_ctl_disable_tbl
;