arch/microblaze/include/asm/cpuinfo.h

   1 /*
   2  * Generic support for queying CPU info
   3  *
   4  * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
   5  * Copyright (C) 2007-2009 PetaLogix
   6  * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General
   9  * Public License. See the file COPYING in the main directory of this
  10  * archive for more details.
  11  */
  12
  13 #ifndef _ASM_MICROBLAZE_CPUINFO_H
  14 #define _ASM_MICROBLAZE_CPUINFO_H
  15
  16 #include <asm/prom.h>
  17
  18 /* CPU Version and FPGA Family code conversion table type */
  19 struct cpu_ver_key {
  20         const char *s;
  21         const unsigned k;
  22 };
  23
  24 extern const struct cpu_ver_key cpu_ver_lookup[];
  25
  26 struct family_string_key {
  27         const char *s;
  28         const unsigned k;
  29 };
  30
  31 extern const struct family_string_key family_string_lookup[];
  32
  33 struct cpuinfo {
  34         /* Core CPU configuration */
  35         u32 use_instr;
  36         u32 use_mult;
  37         u32 use_fpu;
  38         u32 use_exc;
  39         u32 ver_code;
  40         u32 mmu;
  41
  42         /* CPU caches */
  43         u32 use_icache;
  44         u32 icache_tagbits;
  45         u32 icache_write;
  46         u32 icache_line;
  47         u32 icache_size;
  48         unsigned long icache_base;
  49         unsigned long icache_high;
  50
  51         u32 use_dcache;
  52         u32 dcache_tagbits;
  53         u32 dcache_write;
  54         u32 dcache_line;
  55         u32 dcache_size;
  56         unsigned long dcache_base;
  57         unsigned long dcache_high;
  58
  59         /* Bus connections */
  60         u32 use_dopb;
  61         u32 use_iopb;
  62         u32 use_dlmb;
  63         u32 use_ilmb;
  64         u32 num_fsl;
  65
  66         /* CPU interrupt line info */
  67         u32 irq_edge;
  68         u32 irq_positive;
  69
  70         u32 area_optimised;
  71
  72         /* HW debug support */
  73         u32 hw_debug;
  74         u32 num_pc_brk;
  75         u32 num_rd_brk;
  76         u32 num_wr_brk;
  77         u32 cpu_clock_freq; /* store real freq of cpu */
  78         u32 freq_div_hz; /* store freq/HZ */
  79
  80         /* FPGA family */
  81         u32 fpga_family_code;
  82
  83         /* User define */
  84         u32 pvr_user1;
  85         u32 pvr_user2;
  86 };
  87
  88 extern struct cpuinfo cpuinfo;
  89
  90 /* fwd declarations of the various CPUinfo populators */
  91 void setup_cpuinfo(void);
  92
  93 void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
  94 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
  95
  96 static inline unsigned int fcpu(struct device_node *cpu, char *n)
  97 {
  98         int *val;
  99         return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
 100 }
 101
 102 #endif /* _ASM_MICROBLAZE_CPUINFO_H */