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debugfs: Modified default dir of debugfs for debugging UHCI.
[linux/fpc-iii.git] / drivers / net / wireless / b43 / pio.c
blob3498b68385e78086e5d60d20cd4dca84cb2251ad
1 /*
2
3 Broadcom B43 wireless driver
4
5 PIO data transfer
6
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
23
24 */
25
26 #include "b43.h"
27 #include "pio.h"
28 #include "dma.h"
29 #include "main.h"
30 #include "xmit.h"
31
32 #include <linux/delay.h>
33
34
35 static u16 generate_cookie(struct b43_pio_txqueue *q,
36 struct b43_pio_txpacket *pack)
37 {
38 u16 cookie;
39
40 /* Use the upper 4 bits of the cookie as
41 * PIO controller ID and store the packet index number
42 * in the lower 12 bits.
43 * Note that the cookie must never be 0, as this
44 * is a special value used in RX path.
45 * It can also not be 0xFFFF because that is special
46 * for multicast frames.
47 */
48 cookie = (((u16)q->index + 1) << 12);
49 cookie |= pack->index;
50
51 return cookie;
52 }
53
54 static
55 struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
56 u16 cookie,
57 struct b43_pio_txpacket **pack)
58 {
59 struct b43_pio *pio = &dev->pio;
60 struct b43_pio_txqueue *q = NULL;
61 unsigned int pack_index;
62
63 switch (cookie & 0xF000) {
64 case 0x1000:
65 q = pio->tx_queue_AC_BK;
66 break;
67 case 0x2000:
68 q = pio->tx_queue_AC_BE;
69 break;
70 case 0x3000:
71 q = pio->tx_queue_AC_VI;
72 break;
73 case 0x4000:
74 q = pio->tx_queue_AC_VO;
75 break;
76 case 0x5000:
77 q = pio->tx_queue_mcast;
78 break;
79 }
80 if (B43_WARN_ON(!q))
81 return NULL;
82 pack_index = (cookie & 0x0FFF);
83 if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
84 return NULL;
85 *pack = &q->packets[pack_index];
86
87 return q;
88 }
89
90 static u16 index_to_pioqueue_base(struct b43_wldev *dev,
91 unsigned int index)
92 {
93 static const u16 bases[] = {
94 B43_MMIO_PIO_BASE0,
95 B43_MMIO_PIO_BASE1,
96 B43_MMIO_PIO_BASE2,
97 B43_MMIO_PIO_BASE3,
98 B43_MMIO_PIO_BASE4,
99 B43_MMIO_PIO_BASE5,
100 B43_MMIO_PIO_BASE6,
101 B43_MMIO_PIO_BASE7,
102 };
103 static const u16 bases_rev11[] = {
104 B43_MMIO_PIO11_BASE0,
105 B43_MMIO_PIO11_BASE1,
106 B43_MMIO_PIO11_BASE2,
107 B43_MMIO_PIO11_BASE3,
108 B43_MMIO_PIO11_BASE4,
109 B43_MMIO_PIO11_BASE5,
110 };
111
112 if (dev->dev->id.revision >= 11) {
113 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
114 return bases_rev11[index];
115 }
116 B43_WARN_ON(index >= ARRAY_SIZE(bases));
117 return bases[index];
118 }
119
120 static u16 pio_txqueue_offset(struct b43_wldev *dev)
121 {
122 if (dev->dev->id.revision >= 11)
123 return 0x18;
124 return 0;
125 }
126
127 static u16 pio_rxqueue_offset(struct b43_wldev *dev)
128 {
129 if (dev->dev->id.revision >= 11)
130 return 0x38;
131 return 8;
132 }
133
134 static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
135 unsigned int index)
136 {
137 struct b43_pio_txqueue *q;
138 struct b43_pio_txpacket *p;
139 unsigned int i;
140
141 q = kzalloc(sizeof(*q), GFP_KERNEL);
142 if (!q)
143 return NULL;
144 q->dev = dev;
145 q->rev = dev->dev->id.revision;
146 q->mmio_base = index_to_pioqueue_base(dev, index) +
147 pio_txqueue_offset(dev);
148 q->index = index;
149
150 q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
151 if (q->rev >= 8) {
152 q->buffer_size = 1920; //FIXME this constant is wrong.
153 } else {
154 q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
155 q->buffer_size -= 80;
156 }
157
158 INIT_LIST_HEAD(&q->packets_list);
159 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
160 p = &(q->packets[i]);
161 INIT_LIST_HEAD(&p->list);
162 p->index = i;
163 p->queue = q;
164 list_add(&p->list, &q->packets_list);
165 }
166
167 return q;
168 }
169
170 static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
171 unsigned int index)
172 {
173 struct b43_pio_rxqueue *q;
174
175 q = kzalloc(sizeof(*q), GFP_KERNEL);
176 if (!q)
177 return NULL;
178 q->dev = dev;
179 q->rev = dev->dev->id.revision;
180 q->mmio_base = index_to_pioqueue_base(dev, index) +
181 pio_rxqueue_offset(dev);
182
183 /* Enable Direct FIFO RX (PIO) on the engine. */
184 b43_dma_direct_fifo_rx(dev, index, 1);
185
186 return q;
187 }
188
189 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
190 {
191 struct b43_pio_txpacket *pack;
192 unsigned int i;
193
194 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
195 pack = &(q->packets[i]);
196 if (pack->skb) {
197 dev_kfree_skb_any(pack->skb);
198 pack->skb = NULL;
199 }
200 }
201 }
202
203 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
204 const char *name)
205 {
206 if (!q)
207 return;
208 b43_pio_cancel_tx_packets(q);
209 kfree(q);
210 }
211
212 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
213 const char *name)
214 {
215 if (!q)
216 return;
217 kfree(q);
218 }
219
220 #define destroy_queue_tx(pio, queue) do { \
221 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
222 (pio)->queue = NULL; \
223 } while (0)
224
225 #define destroy_queue_rx(pio, queue) do { \
226 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
227 (pio)->queue = NULL; \
228 } while (0)
229
230 void b43_pio_free(struct b43_wldev *dev)
231 {
232 struct b43_pio *pio;
233
234 if (!b43_using_pio_transfers(dev))
235 return;
236 pio = &dev->pio;
237
238 destroy_queue_rx(pio, rx_queue);
239 destroy_queue_tx(pio, tx_queue_mcast);
240 destroy_queue_tx(pio, tx_queue_AC_VO);
241 destroy_queue_tx(pio, tx_queue_AC_VI);
242 destroy_queue_tx(pio, tx_queue_AC_BE);
243 destroy_queue_tx(pio, tx_queue_AC_BK);
244 }
245
246 int b43_pio_init(struct b43_wldev *dev)
247 {
248 struct b43_pio *pio = &dev->pio;
249 int err = -ENOMEM;
250
251 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
252 & ~B43_MACCTL_BE);
253 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
254
255 pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
256 if (!pio->tx_queue_AC_BK)
257 goto out;
258
259 pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
260 if (!pio->tx_queue_AC_BE)
261 goto err_destroy_bk;
262
263 pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
264 if (!pio->tx_queue_AC_VI)
265 goto err_destroy_be;
266
267 pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
268 if (!pio->tx_queue_AC_VO)
269 goto err_destroy_vi;
270
271 pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
272 if (!pio->tx_queue_mcast)
273 goto err_destroy_vo;
274
275 pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
276 if (!pio->rx_queue)
277 goto err_destroy_mcast;
278
279 b43dbg(dev->wl, "PIO initialized\n");
280 err = 0;
281 out:
282 return err;
283
284 err_destroy_mcast:
285 destroy_queue_tx(pio, tx_queue_mcast);
286 err_destroy_vo:
287 destroy_queue_tx(pio, tx_queue_AC_VO);
288 err_destroy_vi:
289 destroy_queue_tx(pio, tx_queue_AC_VI);
290 err_destroy_be:
291 destroy_queue_tx(pio, tx_queue_AC_BE);
292 err_destroy_bk:
293 destroy_queue_tx(pio, tx_queue_AC_BK);
294 return err;
295 }
296
297 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
298 static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
299 u8 queue_prio)
300 {
301 struct b43_pio_txqueue *q;
302
303 if (dev->qos_enabled) {
304 /* 0 = highest priority */
305 switch (queue_prio) {
306 default:
307 B43_WARN_ON(1);
308 /* fallthrough */
309 case 0:
310 q = dev->pio.tx_queue_AC_VO;
311 break;
312 case 1:
313 q = dev->pio.tx_queue_AC_VI;
314 break;
315 case 2:
316 q = dev->pio.tx_queue_AC_BE;
317 break;
318 case 3:
319 q = dev->pio.tx_queue_AC_BK;
320 break;
321 }
322 } else
323 q = dev->pio.tx_queue_AC_BE;
324
325 return q;
326 }
327
328 static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
329 u16 ctl,
330 const void *_data,
331 unsigned int data_len)
332 {
333 struct b43_wldev *dev = q->dev;
334 const u8 *data = _data;
335
336 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
337 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
338
339 ssb_block_write(dev->dev, data, (data_len & ~1),
340 q->mmio_base + B43_PIO_TXDATA,
341 sizeof(u16));
342 if (data_len & 1) {
343 /* Write the last byte. */
344 ctl &= ~B43_PIO_TXCTL_WRITEHI;
345 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
346 b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]);
347 }
348
349 return ctl;
350 }
351
352 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
353 const u8 *hdr, unsigned int hdrlen)
354 {
355 struct b43_pio_txqueue *q = pack->queue;
356 const char *frame = pack->skb->data;
357 unsigned int frame_len = pack->skb->len;
358 u16 ctl;
359
360 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
361 ctl |= B43_PIO_TXCTL_FREADY;
362 ctl &= ~B43_PIO_TXCTL_EOF;
363
364 /* Transfer the header data. */
365 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
366 /* Transfer the frame data. */
367 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
368
369 ctl |= B43_PIO_TXCTL_EOF;
370 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
371 }
372
373 static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
374 u32 ctl,
375 const void *_data,
376 unsigned int data_len)
377 {
378 struct b43_wldev *dev = q->dev;
379 const u8 *data = _data;
380
381 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
382 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
383 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
384
385 ssb_block_write(dev->dev, data, (data_len & ~3),
386 q->mmio_base + B43_PIO8_TXDATA,
387 sizeof(u32));
388 if (data_len & 3) {
389 u32 value = 0;
390
391 /* Write the last few bytes. */
392 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
393 B43_PIO8_TXCTL_24_31);
394 data = &(data[data_len - 1]);
395 switch (data_len & 3) {
396 case 3:
397 ctl |= B43_PIO8_TXCTL_16_23;
398 value |= (u32)(*data) << 16;
399 data--;
400 case 2:
401 ctl |= B43_PIO8_TXCTL_8_15;
402 value |= (u32)(*data) << 8;
403 data--;
404 case 1:
405 value |= (u32)(*data);
406 }
407 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
408 b43_piotx_write32(q, B43_PIO8_TXDATA, value);
409 }
410
411 return ctl;
412 }
413
414 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
415 const u8 *hdr, unsigned int hdrlen)
416 {
417 struct b43_pio_txqueue *q = pack->queue;
418 const char *frame = pack->skb->data;
419 unsigned int frame_len = pack->skb->len;
420 u32 ctl;
421
422 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
423 ctl |= B43_PIO8_TXCTL_FREADY;
424 ctl &= ~B43_PIO8_TXCTL_EOF;
425
426 /* Transfer the header data. */
427 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
428 /* Transfer the frame data. */
429 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
430
431 ctl |= B43_PIO8_TXCTL_EOF;
432 b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
433 }
434
435 static int pio_tx_frame(struct b43_pio_txqueue *q,
436 struct sk_buff *skb)
437 {
438 struct b43_pio_txpacket *pack;
439 struct b43_txhdr txhdr;
440 u16 cookie;
441 int err;
442 unsigned int hdrlen;
443 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
444
445 B43_WARN_ON(list_empty(&q->packets_list));
446 pack = list_entry(q->packets_list.next,
447 struct b43_pio_txpacket, list);
448
449 cookie = generate_cookie(q, pack);
450 hdrlen = b43_txhdr_size(q->dev);
451 err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb,
452 info, cookie);
453 if (err)
454 return err;
455
456 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
457 /* Tell the firmware about the cookie of the last
458 * mcast frame, so it can clear the more-data bit in it. */
459 b43_shm_write16(q->dev, B43_SHM_SHARED,
460 B43_SHM_SH_MCASTCOOKIE, cookie);
461 }
462
463 pack->skb = skb;
464 if (q->rev >= 8)
465 pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
466 else
467 pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
468
469 /* Remove it from the list of available packet slots.
470 * It will be put back when we receive the status report. */
471 list_del(&pack->list);
472
473 /* Update the queue statistics. */
474 q->buffer_used += roundup(skb->len + hdrlen, 4);
475 q->free_packet_slots -= 1;
476
477 return 0;
478 }
479
480 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
481 {
482 struct b43_pio_txqueue *q;
483 struct ieee80211_hdr *hdr;
484 unsigned int hdrlen, total_len;
485 int err = 0;
486 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
487
488 hdr = (struct ieee80211_hdr *)skb->data;
489
490 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
491 /* The multicast queue will be sent after the DTIM. */
492 q = dev->pio.tx_queue_mcast;
493 /* Set the frame More-Data bit. Ucode will clear it
494 * for us on the last frame. */
495 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
496 } else {
497 /* Decide by priority where to put this frame. */
498 q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
499 }
500
501 hdrlen = b43_txhdr_size(dev);
502 total_len = roundup(skb->len + hdrlen, 4);
503
504 if (unlikely(total_len > q->buffer_size)) {
505 err = -ENOBUFS;
506 b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
507 goto out;
508 }
509 if (unlikely(q->free_packet_slots == 0)) {
510 err = -ENOBUFS;
511 b43warn(dev->wl, "PIO: TX packet overflow.\n");
512 goto out;
513 }
514 B43_WARN_ON(q->buffer_used > q->buffer_size);
515
516 if (total_len > (q->buffer_size - q->buffer_used)) {
517 /* Not enough memory on the queue. */
518 err = -EBUSY;
519 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
520 q->stopped = 1;
521 goto out;
522 }
523
524 /* Assign the queue number to the ring (if not already done before)
525 * so TX status handling can use it. The mac80211-queue to b43-queue
526 * mapping is static, so we don't need to store it per frame. */
527 q->queue_prio = skb_get_queue_mapping(skb);
528
529 err = pio_tx_frame(q, skb);
530 if (unlikely(err == -ENOKEY)) {
531 /* Drop this packet, as we don't have the encryption key
532 * anymore and must not transmit it unencrypted. */
533 dev_kfree_skb_any(skb);
534 err = 0;
535 goto out;
536 }
537 if (unlikely(err)) {
538 b43err(dev->wl, "PIO transmission failure\n");
539 goto out;
540 }
541 q->nr_tx_packets++;
542
543 B43_WARN_ON(q->buffer_used > q->buffer_size);
544 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
545 (q->free_packet_slots == 0)) {
546 /* The queue is full. */
547 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
548 q->stopped = 1;
549 }
550
551 out:
552 return err;
553 }
554
555 void b43_pio_handle_txstatus(struct b43_wldev *dev,
556 const struct b43_txstatus *status)
557 {
558 struct b43_pio_txqueue *q;
559 struct b43_pio_txpacket *pack = NULL;
560 unsigned int total_len;
561 struct ieee80211_tx_info *info;
562
563 q = parse_cookie(dev, status->cookie, &pack);
564 if (unlikely(!q))
565 return;
566 B43_WARN_ON(!pack);
567
568 info = IEEE80211_SKB_CB(pack->skb);
569
570 b43_fill_txstatus_report(dev, info, status);
571
572 total_len = pack->skb->len + b43_txhdr_size(dev);
573 total_len = roundup(total_len, 4);
574 q->buffer_used -= total_len;
575 q->free_packet_slots += 1;
576
577 ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb);
578 pack->skb = NULL;
579 list_add(&pack->list, &q->packets_list);
580
581 if (q->stopped) {
582 ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
583 q->stopped = 0;
584 }
585 }
586
587 void b43_pio_get_tx_stats(struct b43_wldev *dev,
588 struct ieee80211_tx_queue_stats *stats)
589 {
590 const int nr_queues = dev->wl->hw->queues;
591 struct b43_pio_txqueue *q;
592 int i;
593
594 for (i = 0; i < nr_queues; i++) {
595 q = select_queue_by_priority(dev, i);
596
597 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
598 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
599 stats[i].count = q->nr_tx_packets;
600 }
601 }
602
603 /* Returns whether we should fetch another frame. */
604 static bool pio_rx_frame(struct b43_pio_rxqueue *q)
605 {
606 struct b43_wldev *dev = q->dev;
607 struct b43_rxhdr_fw4 rxhdr;
608 u16 len;
609 u32 macstat;
610 unsigned int i, padding;
611 struct sk_buff *skb;
612 const char *err_msg = NULL;
613
614 memset(&rxhdr, 0, sizeof(rxhdr));
615
616 /* Check if we have data and wait for it to get ready. */
617 if (q->rev >= 8) {
618 u32 ctl;
619
620 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
621 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
622 return 0;
623 b43_piorx_write32(q, B43_PIO8_RXCTL,
624 B43_PIO8_RXCTL_FRAMERDY);
625 for (i = 0; i < 10; i++) {
626 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
627 if (ctl & B43_PIO8_RXCTL_DATARDY)
628 goto data_ready;
629 udelay(10);
630 }
631 } else {
632 u16 ctl;
633
634 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
635 if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
636 return 0;
637 b43_piorx_write16(q, B43_PIO_RXCTL,
638 B43_PIO_RXCTL_FRAMERDY);
639 for (i = 0; i < 10; i++) {
640 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
641 if (ctl & B43_PIO_RXCTL_DATARDY)
642 goto data_ready;
643 udelay(10);
644 }
645 }
646 b43dbg(q->dev->wl, "PIO RX timed out\n");
647 return 1;
648 data_ready:
649
650 /* Get the preamble (RX header) */
651 if (q->rev >= 8) {
652 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
653 q->mmio_base + B43_PIO8_RXDATA,
654 sizeof(u32));
655 } else {
656 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
657 q->mmio_base + B43_PIO_RXDATA,
658 sizeof(u16));
659 }
660 /* Sanity checks. */
661 len = le16_to_cpu(rxhdr.frame_len);
662 if (unlikely(len > 0x700)) {
663 err_msg = "len > 0x700";
664 goto rx_error;
665 }
666 if (unlikely(len == 0)) {
667 err_msg = "len == 0";
668 goto rx_error;
669 }
670
671 macstat = le32_to_cpu(rxhdr.mac_status);
672 if (macstat & B43_RX_MAC_FCSERR) {
673 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
674 /* Drop frames with failed FCS. */
675 err_msg = "Frame FCS error";
676 goto rx_error;
677 }
678 }
679
680 /* We always pad 2 bytes, as that's what upstream code expects
681 * due to the RX-header being 30 bytes. In case the frame is
682 * unaligned, we pad another 2 bytes. */
683 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
684 skb = dev_alloc_skb(len + padding + 2);
685 if (unlikely(!skb)) {
686 err_msg = "Out of memory";
687 goto rx_error;
688 }
689 skb_reserve(skb, 2);
690 skb_put(skb, len + padding);
691 if (q->rev >= 8) {
692 ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
693 q->mmio_base + B43_PIO8_RXDATA,
694 sizeof(u32));
695 if (len & 3) {
696 u32 value;
697 char *data;
698
699 /* Read the last few bytes. */
700 value = b43_piorx_read32(q, B43_PIO8_RXDATA);
701 data = &(skb->data[len + padding - 1]);
702 switch (len & 3) {
703 case 3:
704 *data = (value >> 16);
705 data--;
706 case 2:
707 *data = (value >> 8);
708 data--;
709 case 1:
710 *data = value;
711 }
712 }
713 } else {
714 ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
715 q->mmio_base + B43_PIO_RXDATA,
716 sizeof(u16));
717 if (len & 1) {
718 u16 value;
719
720 /* Read the last byte. */
721 value = b43_piorx_read16(q, B43_PIO_RXDATA);
722 skb->data[len + padding - 1] = value;
723 }
724 }
725
726 b43_rx(q->dev, skb, &rxhdr);
727
728 return 1;
729
730 rx_error:
731 if (err_msg)
732 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
733 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
734 return 1;
735 }
736
737 void b43_pio_rx(struct b43_pio_rxqueue *q)
738 {
739 unsigned int count = 0;
740 bool stop;
741
742 while (1) {
743 stop = (pio_rx_frame(q) == 0);
744 if (stop)
745 break;
746 cond_resched();
747 if (WARN_ON_ONCE(++count > 10000))
748 break;
749 }
750 }
751
752 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
753 {
754 if (q->rev >= 8) {
755 b43_piotx_write32(q, B43_PIO8_TXCTL,
756 b43_piotx_read32(q, B43_PIO8_TXCTL)
757 | B43_PIO8_TXCTL_SUSPREQ);
758 } else {
759 b43_piotx_write16(q, B43_PIO_TXCTL,
760 b43_piotx_read16(q, B43_PIO_TXCTL)
761 | B43_PIO_TXCTL_SUSPREQ);
762 }
763 }
764
765 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
766 {
767 if (q->rev >= 8) {
768 b43_piotx_write32(q, B43_PIO8_TXCTL,
769 b43_piotx_read32(q, B43_PIO8_TXCTL)
770 & ~B43_PIO8_TXCTL_SUSPREQ);
771 } else {
772 b43_piotx_write16(q, B43_PIO_TXCTL,
773 b43_piotx_read16(q, B43_PIO_TXCTL)
774 & ~B43_PIO_TXCTL_SUSPREQ);
775 }
776 }
777
778 void b43_pio_tx_suspend(struct b43_wldev *dev)
779 {
780 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
781 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
782 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
783 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
784 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
785 b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
786 }
787
788 void b43_pio_tx_resume(struct b43_wldev *dev)
789 {
790 b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
791 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
792 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
793 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
794 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
795 b43_power_saving_ctl_bits(dev, 0);
796 }
Linux with added FPC-III support