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debugfs: Modified default dir of debugfs for debugging UHCI.
[linux/fpc-iii.git] / drivers / net / wireless / iwlwifi / iwl-core.c
blobacfd7b40afb8e3bf074098c3e172c571473a29d5
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62 u32 iwl_debug_level;
63 EXPORT_SYMBOL(iwl_debug_level);
64
65 static irqreturn_t iwl_isr(int irq, void *data);
66
67 /*
68 * Parameter order:
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70 *
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
73 *
74 */
75 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
76 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
90 };
91 EXPORT_SYMBOL(iwl_rates);
92
93 /**
94 * translate ucode response to mac80211 tx status control values
95 */
96 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
97 struct ieee80211_tx_info *info)
98 {
99 struct ieee80211_tx_rate *r = &info->control.rates[0];
100
101 info->antenna_sel_tx =
102 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
103 if (rate_n_flags & RATE_MCS_HT_MSK)
104 r->flags |= IEEE80211_TX_RC_MCS;
105 if (rate_n_flags & RATE_MCS_GF_MSK)
106 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
107 if (rate_n_flags & RATE_MCS_HT40_MSK)
108 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
109 if (rate_n_flags & RATE_MCS_DUP_MSK)
110 r->flags |= IEEE80211_TX_RC_DUP_DATA;
111 if (rate_n_flags & RATE_MCS_SGI_MSK)
112 r->flags |= IEEE80211_TX_RC_SHORT_GI;
113 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
114 }
115 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
116
117 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
118 {
119 int idx = 0;
120
121 /* HT rate format */
122 if (rate_n_flags & RATE_MCS_HT_MSK) {
123 idx = (rate_n_flags & 0xff);
124
125 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
126 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
127 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
128 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
129
130 idx += IWL_FIRST_OFDM_RATE;
131 /* skip 9M not supported in ht*/
132 if (idx >= IWL_RATE_9M_INDEX)
133 idx += 1;
134 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135 return idx;
136
137 /* legacy rate format, search for match in table */
138 } else {
139 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
140 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
141 return idx;
142 }
143
144 return -1;
145 }
146 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
147
148 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
149 {
150 int idx = 0;
151 int band_offset = 0;
152
153 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
154 if (rate_n_flags & RATE_MCS_HT_MSK) {
155 idx = (rate_n_flags & 0xff);
156 return idx;
157 /* Legacy rate format, search for match in table */
158 } else {
159 if (band == IEEE80211_BAND_5GHZ)
160 band_offset = IWL_FIRST_OFDM_RATE;
161 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
162 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
163 return idx - band_offset;
164 }
165
166 return -1;
167 }
168
169 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
170 {
171 int i;
172 u8 ind = ant;
173 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
174 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
175 if (priv->hw_params.valid_tx_ant & BIT(ind))
176 return ind;
177 }
178 return ant;
179 }
180
181 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
182 EXPORT_SYMBOL(iwl_bcast_addr);
183
184
185 /* This function both allocates and initializes hw and priv. */
186 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
187 struct ieee80211_ops *hw_ops)
188 {
189 struct iwl_priv *priv;
190
191 /* mac80211 allocates memory for this device instance, including
192 * space for this driver's private structure */
193 struct ieee80211_hw *hw =
194 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
195 if (hw == NULL) {
196 printk(KERN_ERR "%s: Can not allocate network device\n",
197 cfg->name);
198 goto out;
199 }
200
201 priv = hw->priv;
202 priv->hw = hw;
203
204 out:
205 return hw;
206 }
207 EXPORT_SYMBOL(iwl_alloc_all);
208
209 void iwl_hw_detect(struct iwl_priv *priv)
210 {
211 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
212 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
213 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
214 }
215 EXPORT_SYMBOL(iwl_hw_detect);
216
217 int iwl_hw_nic_init(struct iwl_priv *priv)
218 {
219 unsigned long flags;
220 struct iwl_rx_queue *rxq = &priv->rxq;
221 int ret;
222
223 /* nic_init */
224 spin_lock_irqsave(&priv->lock, flags);
225 priv->cfg->ops->lib->apm_ops.init(priv);
226 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
227 spin_unlock_irqrestore(&priv->lock, flags);
228
229 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
230
231 priv->cfg->ops->lib->apm_ops.config(priv);
232
233 /* Allocate the RX queue, or reset if it is already allocated */
234 if (!rxq->bd) {
235 ret = iwl_rx_queue_alloc(priv);
236 if (ret) {
237 IWL_ERR(priv, "Unable to initialize Rx queue\n");
238 return -ENOMEM;
239 }
240 } else
241 iwl_rx_queue_reset(priv, rxq);
242
243 iwl_rx_replenish(priv);
244
245 iwl_rx_init(priv, rxq);
246
247 spin_lock_irqsave(&priv->lock, flags);
248
249 rxq->need_update = 1;
250 iwl_rx_queue_update_write_ptr(priv, rxq);
251
252 spin_unlock_irqrestore(&priv->lock, flags);
253
254 /* Allocate and init all Tx and Command queues */
255 ret = iwl_txq_ctx_reset(priv);
256 if (ret)
257 return ret;
258
259 set_bit(STATUS_INIT, &priv->status);
260
261 return 0;
262 }
263 EXPORT_SYMBOL(iwl_hw_nic_init);
264
265 /*
266 * QoS support
267 */
268 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
269 {
270 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
271 return;
272
273 priv->qos_data.def_qos_parm.qos_flags = 0;
274
275 if (priv->qos_data.qos_cap.q_AP.queue_request &&
276 !priv->qos_data.qos_cap.q_AP.txop_request)
277 priv->qos_data.def_qos_parm.qos_flags |=
278 QOS_PARAM_FLG_TXOP_TYPE_MSK;
279 if (priv->qos_data.qos_active)
280 priv->qos_data.def_qos_parm.qos_flags |=
281 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
282
283 if (priv->current_ht_config.is_ht)
284 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
285
286 if (force || iwl_is_associated(priv)) {
287 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
288 priv->qos_data.qos_active,
289 priv->qos_data.def_qos_parm.qos_flags);
290
291 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
292 sizeof(struct iwl_qosparam_cmd),
293 &priv->qos_data.def_qos_parm, NULL);
294 }
295 }
296 EXPORT_SYMBOL(iwl_activate_qos);
297
298 /*
299 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
300 * (802.11b) (802.11a/g)
301 * AC_BK 15 1023 7 0 0
302 * AC_BE 15 1023 3 0 0
303 * AC_VI 7 15 2 6.016ms 3.008ms
304 * AC_VO 3 7 2 3.264ms 1.504ms
305 */
306 void iwl_reset_qos(struct iwl_priv *priv)
307 {
308 u16 cw_min = 15;
309 u16 cw_max = 1023;
310 u8 aifs = 2;
311 bool is_legacy = false;
312 unsigned long flags;
313 int i;
314
315 spin_lock_irqsave(&priv->lock, flags);
316 /* QoS always active in AP and ADHOC mode
317 * In STA mode wait for association
318 */
319 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
320 priv->iw_mode == NL80211_IFTYPE_AP)
321 priv->qos_data.qos_active = 1;
322 else
323 priv->qos_data.qos_active = 0;
324
325 /* check for legacy mode */
326 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
327 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
328 (priv->iw_mode == NL80211_IFTYPE_STATION &&
329 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
330 cw_min = 31;
331 is_legacy = 1;
332 }
333
334 if (priv->qos_data.qos_active)
335 aifs = 3;
336
337 /* AC_BE */
338 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
340 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
341 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
342 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
343
344 if (priv->qos_data.qos_active) {
345 /* AC_BK */
346 i = 1;
347 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
348 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
349 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
350 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
351 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
352
353 /* AC_VI */
354 i = 2;
355 priv->qos_data.def_qos_parm.ac[i].cw_min =
356 cpu_to_le16((cw_min + 1) / 2 - 1);
357 priv->qos_data.def_qos_parm.ac[i].cw_max =
358 cpu_to_le16(cw_min);
359 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
360 if (is_legacy)
361 priv->qos_data.def_qos_parm.ac[i].edca_txop =
362 cpu_to_le16(6016);
363 else
364 priv->qos_data.def_qos_parm.ac[i].edca_txop =
365 cpu_to_le16(3008);
366 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
367
368 /* AC_VO */
369 i = 3;
370 priv->qos_data.def_qos_parm.ac[i].cw_min =
371 cpu_to_le16((cw_min + 1) / 4 - 1);
372 priv->qos_data.def_qos_parm.ac[i].cw_max =
373 cpu_to_le16((cw_min + 1) / 2 - 1);
374 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
375 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
376 if (is_legacy)
377 priv->qos_data.def_qos_parm.ac[i].edca_txop =
378 cpu_to_le16(3264);
379 else
380 priv->qos_data.def_qos_parm.ac[i].edca_txop =
381 cpu_to_le16(1504);
382 } else {
383 for (i = 1; i < 4; i++) {
384 priv->qos_data.def_qos_parm.ac[i].cw_min =
385 cpu_to_le16(cw_min);
386 priv->qos_data.def_qos_parm.ac[i].cw_max =
387 cpu_to_le16(cw_max);
388 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
389 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
390 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
391 }
392 }
393 IWL_DEBUG_QOS(priv, "set QoS to default \n");
394
395 spin_unlock_irqrestore(&priv->lock, flags);
396 }
397 EXPORT_SYMBOL(iwl_reset_qos);
398
399 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
400 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
401 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
402 struct ieee80211_sta_ht_cap *ht_info,
403 enum ieee80211_band band)
404 {
405 u16 max_bit_rate = 0;
406 u8 rx_chains_num = priv->hw_params.rx_chains_num;
407 u8 tx_chains_num = priv->hw_params.tx_chains_num;
408
409 ht_info->cap = 0;
410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
411
412 ht_info->ht_supported = true;
413
414 if (priv->cfg->ht_greenfield_support)
415 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
416 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
417 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
418 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
419
420 max_bit_rate = MAX_BIT_RATE_20_MHZ;
421 if (priv->hw_params.ht40_channel & BIT(band)) {
422 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
423 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
424 ht_info->mcs.rx_mask[4] = 0x01;
425 max_bit_rate = MAX_BIT_RATE_40_MHZ;
426 }
427
428 if (priv->cfg->mod_params->amsdu_size_8K)
429 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
430
431 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
432 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
433
434 ht_info->mcs.rx_mask[0] = 0xFF;
435 if (rx_chains_num >= 2)
436 ht_info->mcs.rx_mask[1] = 0xFF;
437 if (rx_chains_num >= 3)
438 ht_info->mcs.rx_mask[2] = 0xFF;
439
440 /* Highest supported Rx data rate */
441 max_bit_rate *= rx_chains_num;
442 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
443 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
444
445 /* Tx MCS capabilities */
446 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
447 if (tx_chains_num != rx_chains_num) {
448 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
449 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
450 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
451 }
452 }
453
454 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
455 struct ieee80211_rate *rates)
456 {
457 int i;
458
459 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
460 rates[i].bitrate = iwl_rates[i].ieee * 5;
461 rates[i].hw_value = i; /* Rate scaling will work on indexes */
462 rates[i].hw_value_short = i;
463 rates[i].flags = 0;
464 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
465 /*
466 * If CCK != 1M then set short preamble rate flag.
467 */
468 rates[i].flags |=
469 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
470 0 : IEEE80211_RATE_SHORT_PREAMBLE;
471 }
472 }
473 }
474
475
476 /**
477 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
478 */
479 int iwlcore_init_geos(struct iwl_priv *priv)
480 {
481 struct iwl_channel_info *ch;
482 struct ieee80211_supported_band *sband;
483 struct ieee80211_channel *channels;
484 struct ieee80211_channel *geo_ch;
485 struct ieee80211_rate *rates;
486 int i = 0;
487
488 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
489 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
490 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
491 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
492 return 0;
493 }
494
495 channels = kzalloc(sizeof(struct ieee80211_channel) *
496 priv->channel_count, GFP_KERNEL);
497 if (!channels)
498 return -ENOMEM;
499
500 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
501 GFP_KERNEL);
502 if (!rates) {
503 kfree(channels);
504 return -ENOMEM;
505 }
506
507 /* 5.2GHz channels start after the 2.4GHz channels */
508 sband = &priv->bands[IEEE80211_BAND_5GHZ];
509 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
510 /* just OFDM */
511 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
512 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
513
514 if (priv->cfg->sku & IWL_SKU_N)
515 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
516 IEEE80211_BAND_5GHZ);
517
518 sband = &priv->bands[IEEE80211_BAND_2GHZ];
519 sband->channels = channels;
520 /* OFDM & CCK */
521 sband->bitrates = rates;
522 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
523
524 if (priv->cfg->sku & IWL_SKU_N)
525 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
526 IEEE80211_BAND_2GHZ);
527
528 priv->ieee_channels = channels;
529 priv->ieee_rates = rates;
530
531 for (i = 0; i < priv->channel_count; i++) {
532 ch = &priv->channel_info[i];
533
534 /* FIXME: might be removed if scan is OK */
535 if (!is_channel_valid(ch))
536 continue;
537
538 if (is_channel_a_band(ch))
539 sband = &priv->bands[IEEE80211_BAND_5GHZ];
540 else
541 sband = &priv->bands[IEEE80211_BAND_2GHZ];
542
543 geo_ch = &sband->channels[sband->n_channels++];
544
545 geo_ch->center_freq =
546 ieee80211_channel_to_frequency(ch->channel);
547 geo_ch->max_power = ch->max_power_avg;
548 geo_ch->max_antenna_gain = 0xff;
549 geo_ch->hw_value = ch->channel;
550
551 if (is_channel_valid(ch)) {
552 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
553 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
554
555 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
556 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
557
558 if (ch->flags & EEPROM_CHANNEL_RADAR)
559 geo_ch->flags |= IEEE80211_CHAN_RADAR;
560
561 geo_ch->flags |= ch->ht40_extension_channel;
562
563 if (ch->max_power_avg > priv->tx_power_device_lmt)
564 priv->tx_power_device_lmt = ch->max_power_avg;
565 } else {
566 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
567 }
568
569 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
570 ch->channel, geo_ch->center_freq,
571 is_channel_a_band(ch) ? "5.2" : "2.4",
572 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
573 "restricted" : "valid",
574 geo_ch->flags);
575 }
576
577 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
578 priv->cfg->sku & IWL_SKU_A) {
579 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
580 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
581 priv->pci_dev->device,
582 priv->pci_dev->subsystem_device);
583 priv->cfg->sku &= ~IWL_SKU_A;
584 }
585
586 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
587 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
588 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
589
590 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
591
592 return 0;
593 }
594 EXPORT_SYMBOL(iwlcore_init_geos);
595
596 /*
597 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
598 */
599 void iwlcore_free_geos(struct iwl_priv *priv)
600 {
601 kfree(priv->ieee_channels);
602 kfree(priv->ieee_rates);
603 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
604 }
605 EXPORT_SYMBOL(iwlcore_free_geos);
606
607 static bool is_single_rx_stream(struct iwl_priv *priv)
608 {
609 return !priv->current_ht_config.is_ht ||
610 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
611 (priv->current_ht_config.mcs.rx_mask[2] == 0));
612 }
613
614 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
615 enum ieee80211_band band,
616 u16 channel, u8 extension_chan_offset)
617 {
618 const struct iwl_channel_info *ch_info;
619
620 ch_info = iwl_get_channel_info(priv, band, channel);
621 if (!is_channel_valid(ch_info))
622 return 0;
623
624 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
625 return !(ch_info->ht40_extension_channel &
626 IEEE80211_CHAN_NO_HT40PLUS);
627 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
628 return !(ch_info->ht40_extension_channel &
629 IEEE80211_CHAN_NO_HT40MINUS);
630
631 return 0;
632 }
633
634 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
635 struct ieee80211_sta_ht_cap *sta_ht_inf)
636 {
637 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
638
639 if ((!iwl_ht_conf->is_ht) ||
640 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
641 return 0;
642
643 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
644 * the bit will not set if it is pure 40MHz case
645 */
646 if (sta_ht_inf) {
647 if (!sta_ht_inf->ht_supported)
648 return 0;
649 }
650 #ifdef CONFIG_IWLWIFI_DEBUG
651 if (priv->disable_ht40)
652 return 0;
653 #endif
654 return iwl_is_channel_extension(priv, priv->band,
655 le16_to_cpu(priv->staging_rxon.channel),
656 iwl_ht_conf->extension_chan_offset);
657 }
658 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
659
660 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
661 {
662 u16 new_val = 0;
663 u16 beacon_factor = 0;
664
665 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
666 new_val = beacon_val / beacon_factor;
667
668 if (!new_val)
669 new_val = max_beacon_val;
670
671 return new_val;
672 }
673
674 void iwl_setup_rxon_timing(struct iwl_priv *priv)
675 {
676 u64 tsf;
677 s32 interval_tm, rem;
678 unsigned long flags;
679 struct ieee80211_conf *conf = NULL;
680 u16 beacon_int;
681
682 conf = ieee80211_get_hw_conf(priv->hw);
683
684 spin_lock_irqsave(&priv->lock, flags);
685 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
686 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
687
688 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
689 beacon_int = priv->beacon_int;
690 priv->rxon_timing.atim_window = 0;
691 } else {
692 beacon_int = priv->vif->bss_conf.beacon_int;
693
694 /* TODO: we need to get atim_window from upper stack
695 * for now we set to 0 */
696 priv->rxon_timing.atim_window = 0;
697 }
698
699 beacon_int = iwl_adjust_beacon_interval(beacon_int,
700 priv->hw_params.max_beacon_itrvl * 1024);
701 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
702
703 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
704 interval_tm = beacon_int * 1024;
705 rem = do_div(tsf, interval_tm);
706 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
707
708 spin_unlock_irqrestore(&priv->lock, flags);
709 IWL_DEBUG_ASSOC(priv,
710 "beacon interval %d beacon timer %d beacon tim %d\n",
711 le16_to_cpu(priv->rxon_timing.beacon_interval),
712 le32_to_cpu(priv->rxon_timing.beacon_init_val),
713 le16_to_cpu(priv->rxon_timing.atim_window));
714 }
715 EXPORT_SYMBOL(iwl_setup_rxon_timing);
716
717 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
718 {
719 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
720
721 if (hw_decrypt)
722 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
723 else
724 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
725
726 }
727 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
728
729 /**
730 * iwl_check_rxon_cmd - validate RXON structure is valid
731 *
732 * NOTE: This is really only useful during development and can eventually
733 * be #ifdef'd out once the driver is stable and folks aren't actively
734 * making changes
735 */
736 int iwl_check_rxon_cmd(struct iwl_priv *priv)
737 {
738 int error = 0;
739 int counter = 1;
740 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
741
742 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
743 error |= le32_to_cpu(rxon->flags &
744 (RXON_FLG_TGJ_NARROW_BAND_MSK |
745 RXON_FLG_RADAR_DETECT_MSK));
746 if (error)
747 IWL_WARN(priv, "check 24G fields %d | %d\n",
748 counter++, error);
749 } else {
750 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
751 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
752 if (error)
753 IWL_WARN(priv, "check 52 fields %d | %d\n",
754 counter++, error);
755 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
756 if (error)
757 IWL_WARN(priv, "check 52 CCK %d | %d\n",
758 counter++, error);
759 }
760 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
761 if (error)
762 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
763
764 /* make sure basic rates 6Mbps and 1Mbps are supported */
765 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
766 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
767 if (error)
768 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
769
770 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
771 if (error)
772 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
773
774 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
775 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
776 if (error)
777 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
778 counter++, error);
779
780 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
781 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
782 if (error)
783 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
784 counter++, error);
785
786 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
787 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
788 if (error)
789 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
790 counter++, error);
791
792 if (error)
793 IWL_WARN(priv, "Tuning to channel %d\n",
794 le16_to_cpu(rxon->channel));
795
796 if (error) {
797 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
798 return -1;
799 }
800 return 0;
801 }
802 EXPORT_SYMBOL(iwl_check_rxon_cmd);
803
804 /**
805 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
806 * @priv: staging_rxon is compared to active_rxon
807 *
808 * If the RXON structure is changing enough to require a new tune,
809 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
810 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
811 */
812 int iwl_full_rxon_required(struct iwl_priv *priv)
813 {
814
815 /* These items are only settable from the full RXON command */
816 if (!(iwl_is_associated(priv)) ||
817 compare_ether_addr(priv->staging_rxon.bssid_addr,
818 priv->active_rxon.bssid_addr) ||
819 compare_ether_addr(priv->staging_rxon.node_addr,
820 priv->active_rxon.node_addr) ||
821 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
822 priv->active_rxon.wlap_bssid_addr) ||
823 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
824 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
825 (priv->staging_rxon.air_propagation !=
826 priv->active_rxon.air_propagation) ||
827 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
828 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
829 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
830 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
831 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
832 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
833 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
834 return 1;
835
836 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
837 * be updated with the RXON_ASSOC command -- however only some
838 * flag transitions are allowed using RXON_ASSOC */
839
840 /* Check if we are not switching bands */
841 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
842 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
843 return 1;
844
845 /* Check if we are switching association toggle */
846 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
847 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
848 return 1;
849
850 return 0;
851 }
852 EXPORT_SYMBOL(iwl_full_rxon_required);
853
854 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
855 {
856 int i;
857 int rate_mask;
858
859 /* Set rate mask*/
860 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
861 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
862 else
863 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
864
865 /* Find lowest valid rate */
866 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
867 i = iwl_rates[i].next_ieee) {
868 if (rate_mask & (1 << i))
869 return iwl_rates[i].plcp;
870 }
871
872 /* No valid rate was found. Assign the lowest one */
873 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
874 return IWL_RATE_1M_PLCP;
875 else
876 return IWL_RATE_6M_PLCP;
877 }
878 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
879
880 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
881 {
882 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
883
884 if (!ht_info->is_ht) {
885 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
886 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
887 RXON_FLG_HT40_PROT_MSK |
888 RXON_FLG_HT_PROT_MSK);
889 return;
890 }
891
892 /* FIXME: if the definition of ht_protection changed, the "translation"
893 * will be needed for rxon->flags
894 */
895 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
896
897 /* Set up channel bandwidth:
898 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
899 /* clear the HT channel mode before set the mode */
900 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
901 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
902 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
903 /* pure ht40 */
904 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
905 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
906 /* Note: control channel is opposite of extension channel */
907 switch (ht_info->extension_chan_offset) {
908 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
909 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
910 break;
911 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
912 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
913 break;
914 }
915 } else {
916 /* Note: control channel is opposite of extension channel */
917 switch (ht_info->extension_chan_offset) {
918 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
919 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
920 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
921 break;
922 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
923 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
924 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
925 break;
926 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
927 default:
928 /* channel location only valid if in Mixed mode */
929 IWL_ERR(priv, "invalid extension channel offset\n");
930 break;
931 }
932 }
933 } else {
934 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
935 }
936
937 if (priv->cfg->ops->hcmd->set_rxon_chain)
938 priv->cfg->ops->hcmd->set_rxon_chain(priv);
939
940 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
941 "rxon flags 0x%X operation mode :0x%X "
942 "extension channel offset 0x%x\n",
943 ht_info->mcs.rx_mask[0],
944 ht_info->mcs.rx_mask[1],
945 ht_info->mcs.rx_mask[2],
946 le32_to_cpu(rxon->flags), ht_info->ht_protection,
947 ht_info->extension_chan_offset);
948 return;
949 }
950 EXPORT_SYMBOL(iwl_set_rxon_ht);
951
952 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
953 #define IWL_NUM_RX_CHAINS_SINGLE 2
954 #define IWL_NUM_IDLE_CHAINS_DUAL 2
955 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
956
957 /* Determine how many receiver/antenna chains to use.
958 * More provides better reception via diversity. Fewer saves power.
959 * MIMO (dual stream) requires at least 2, but works better with 3.
960 * This does not determine *which* chains to use, just how many.
961 */
962 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
963 {
964 bool is_single = is_single_rx_stream(priv);
965 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
966
967 /* # of Rx chains to use when expecting MIMO. */
968 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
969 WLAN_HT_CAP_SM_PS_STATIC)))
970 return IWL_NUM_RX_CHAINS_SINGLE;
971 else
972 return IWL_NUM_RX_CHAINS_MULTIPLE;
973 }
974
975 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
976 {
977 int idle_cnt;
978 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
979 /* # Rx chains when idling and maybe trying to save power */
980 switch (priv->current_ht_config.sm_ps) {
981 case WLAN_HT_CAP_SM_PS_STATIC:
982 case WLAN_HT_CAP_SM_PS_DYNAMIC:
983 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
984 IWL_NUM_IDLE_CHAINS_SINGLE;
985 break;
986 case WLAN_HT_CAP_SM_PS_DISABLED:
987 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
988 break;
989 case WLAN_HT_CAP_SM_PS_INVALID:
990 default:
991 IWL_ERR(priv, "invalid mimo ps mode %d\n",
992 priv->current_ht_config.sm_ps);
993 WARN_ON(1);
994 idle_cnt = -1;
995 break;
996 }
997 return idle_cnt;
998 }
999
1000 /* up to 4 chains */
1001 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1002 {
1003 u8 res;
1004 res = (chain_bitmap & BIT(0)) >> 0;
1005 res += (chain_bitmap & BIT(1)) >> 1;
1006 res += (chain_bitmap & BIT(2)) >> 2;
1007 res += (chain_bitmap & BIT(4)) >> 4;
1008 return res;
1009 }
1010
1011 /**
1012 * iwl_is_monitor_mode - Determine if interface in monitor mode
1013 *
1014 * priv->iw_mode is set in add_interface, but add_interface is
1015 * never called for monitor mode. The only way mac80211 informs us about
1016 * monitor mode is through configuring filters (call to configure_filter).
1017 */
1018 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1019 {
1020 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1021 }
1022 EXPORT_SYMBOL(iwl_is_monitor_mode);
1023
1024 /**
1025 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1026 *
1027 * Selects how many and which Rx receivers/antennas/chains to use.
1028 * This should not be used for scan command ... it puts data in wrong place.
1029 */
1030 void iwl_set_rxon_chain(struct iwl_priv *priv)
1031 {
1032 bool is_single = is_single_rx_stream(priv);
1033 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1034 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1035 u32 active_chains;
1036 u16 rx_chain;
1037
1038 /* Tell uCode which antennas are actually connected.
1039 * Before first association, we assume all antennas are connected.
1040 * Just after first association, iwl_chain_noise_calibration()
1041 * checks which antennas actually *are* connected. */
1042 if (priv->chain_noise_data.active_chains)
1043 active_chains = priv->chain_noise_data.active_chains;
1044 else
1045 active_chains = priv->hw_params.valid_rx_ant;
1046
1047 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1048
1049 /* How many receivers should we use? */
1050 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1051 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1052
1053
1054 /* correct rx chain count according hw settings
1055 * and chain noise calibration
1056 */
1057 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1058 if (valid_rx_cnt < active_rx_cnt)
1059 active_rx_cnt = valid_rx_cnt;
1060
1061 if (valid_rx_cnt < idle_rx_cnt)
1062 idle_rx_cnt = valid_rx_cnt;
1063
1064 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1065 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1066
1067 /* copied from 'iwl_bg_request_scan()' */
1068 /* Force use of chains B and C (0x6) for Rx for 4965
1069 * Avoid A (0x1) because of its off-channel reception on A-band.
1070 * MIMO is not used here, but value is required */
1071 if (iwl_is_monitor_mode(priv) &&
1072 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1073 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1074 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1075 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1076 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1077 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1078 }
1079
1080 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1081
1082 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1083 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1084 else
1085 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1086
1087 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1088 priv->staging_rxon.rx_chain,
1089 active_rx_cnt, idle_rx_cnt);
1090
1091 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1092 active_rx_cnt < idle_rx_cnt);
1093 }
1094 EXPORT_SYMBOL(iwl_set_rxon_chain);
1095
1096 /**
1097 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1098 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1099 * @channel: Any channel valid for the requested phymode
1100
1101 * In addition to setting the staging RXON, priv->phymode is also set.
1102 *
1103 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1104 * in the staging RXON flag structure based on the phymode
1105 */
1106 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1107 {
1108 enum ieee80211_band band = ch->band;
1109 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1110
1111 if (!iwl_get_channel_info(priv, band, channel)) {
1112 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1113 channel, band);
1114 return -EINVAL;
1115 }
1116
1117 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1118 (priv->band == band))
1119 return 0;
1120
1121 priv->staging_rxon.channel = cpu_to_le16(channel);
1122 if (band == IEEE80211_BAND_5GHZ)
1123 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1124 else
1125 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1126
1127 priv->band = band;
1128
1129 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1130
1131 return 0;
1132 }
1133 EXPORT_SYMBOL(iwl_set_rxon_channel);
1134
1135 void iwl_set_flags_for_band(struct iwl_priv *priv,
1136 enum ieee80211_band band)
1137 {
1138 if (band == IEEE80211_BAND_5GHZ) {
1139 priv->staging_rxon.flags &=
1140 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1141 | RXON_FLG_CCK_MSK);
1142 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1143 } else {
1144 /* Copied from iwl_post_associate() */
1145 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1146 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1147 else
1148 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1149
1150 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1151 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1152
1153 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1154 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1155 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1156 }
1157 }
1158
1159 /*
1160 * initialize rxon structure with default values from eeprom
1161 */
1162 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1163 {
1164 const struct iwl_channel_info *ch_info;
1165
1166 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1167
1168 switch (mode) {
1169 case NL80211_IFTYPE_AP:
1170 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1171 break;
1172
1173 case NL80211_IFTYPE_STATION:
1174 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1175 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1176 break;
1177
1178 case NL80211_IFTYPE_ADHOC:
1179 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1180 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1181 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1182 RXON_FILTER_ACCEPT_GRP_MSK;
1183 break;
1184
1185 default:
1186 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1187 break;
1188 }
1189
1190 #if 0
1191 /* TODO: Figure out when short_preamble would be set and cache from
1192 * that */
1193 if (!hw_to_local(priv->hw)->short_preamble)
1194 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1195 else
1196 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1197 #endif
1198
1199 ch_info = iwl_get_channel_info(priv, priv->band,
1200 le16_to_cpu(priv->active_rxon.channel));
1201
1202 if (!ch_info)
1203 ch_info = &priv->channel_info[0];
1204
1205 /*
1206 * in some case A channels are all non IBSS
1207 * in this case force B/G channel
1208 */
1209 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1210 !(is_channel_ibss(ch_info)))
1211 ch_info = &priv->channel_info[0];
1212
1213 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1214 priv->band = ch_info->band;
1215
1216 iwl_set_flags_for_band(priv, priv->band);
1217
1218 priv->staging_rxon.ofdm_basic_rates =
1219 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1220 priv->staging_rxon.cck_basic_rates =
1221 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1222
1223 /* clear both MIX and PURE40 mode flag */
1224 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1225 RXON_FLG_CHANNEL_MODE_PURE_40);
1226 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1227 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1228 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1229 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1230 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1231 }
1232 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1233
1234 static void iwl_set_rate(struct iwl_priv *priv)
1235 {
1236 const struct ieee80211_supported_band *hw = NULL;
1237 struct ieee80211_rate *rate;
1238 int i;
1239
1240 hw = iwl_get_hw_mode(priv, priv->band);
1241 if (!hw) {
1242 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1243 return;
1244 }
1245
1246 priv->active_rate = 0;
1247 priv->active_rate_basic = 0;
1248
1249 for (i = 0; i < hw->n_bitrates; i++) {
1250 rate = &(hw->bitrates[i]);
1251 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1252 priv->active_rate |= (1 << rate->hw_value);
1253 }
1254
1255 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1256 priv->active_rate, priv->active_rate_basic);
1257
1258 /*
1259 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1260 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1261 * OFDM
1262 */
1263 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1264 priv->staging_rxon.cck_basic_rates =
1265 ((priv->active_rate_basic &
1266 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1267 else
1268 priv->staging_rxon.cck_basic_rates =
1269 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1270
1271 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1272 priv->staging_rxon.ofdm_basic_rates =
1273 ((priv->active_rate_basic &
1274 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1275 IWL_FIRST_OFDM_RATE) & 0xFF;
1276 else
1277 priv->staging_rxon.ofdm_basic_rates =
1278 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1279 }
1280
1281 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1282 {
1283 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1284 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1285 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1286 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1287 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1288 rxon->channel = csa->channel;
1289 priv->staging_rxon.channel = csa->channel;
1290 }
1291 EXPORT_SYMBOL(iwl_rx_csa);
1292
1293 #ifdef CONFIG_IWLWIFI_DEBUG
1294 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1295 {
1296 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1297
1298 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1299 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1300 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1301 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1302 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1303 le32_to_cpu(rxon->filter_flags));
1304 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1305 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1306 rxon->ofdm_basic_rates);
1307 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1308 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1309 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1310 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1311 }
1312
1313 static const char *desc_lookup_text[] = {
1314 "OK",
1315 "FAIL",
1316 "BAD_PARAM",
1317 "BAD_CHECKSUM",
1318 "NMI_INTERRUPT_WDG",
1319 "SYSASSERT",
1320 "FATAL_ERROR",
1321 "BAD_COMMAND",
1322 "HW_ERROR_TUNE_LOCK",
1323 "HW_ERROR_TEMPERATURE",
1324 "ILLEGAL_CHAN_FREQ",
1325 "VCC_NOT_STABLE",
1326 "FH_ERROR",
1327 "NMI_INTERRUPT_HOST",
1328 "NMI_INTERRUPT_ACTION_PT",
1329 "NMI_INTERRUPT_UNKNOWN",
1330 "UCODE_VERSION_MISMATCH",
1331 "HW_ERROR_ABS_LOCK",
1332 "HW_ERROR_CAL_LOCK_FAIL",
1333 "NMI_INTERRUPT_INST_ACTION_PT",
1334 "NMI_INTERRUPT_DATA_ACTION_PT",
1335 "NMI_TRM_HW_ER",
1336 "NMI_INTERRUPT_TRM",
1337 "NMI_INTERRUPT_BREAK_POINT"
1338 "DEBUG_0",
1339 "DEBUG_1",
1340 "DEBUG_2",
1341 "DEBUG_3",
1342 "UNKNOWN"
1343 };
1344
1345 static const char *desc_lookup(int i)
1346 {
1347 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1348
1349 if (i < 0 || i > max)
1350 i = max;
1351
1352 return desc_lookup_text[i];
1353 }
1354
1355 #define ERROR_START_OFFSET (1 * sizeof(u32))
1356 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1357
1358 static void iwl_dump_nic_error_log(struct iwl_priv *priv)
1359 {
1360 u32 data2, line;
1361 u32 desc, time, count, base, data1;
1362 u32 blink1, blink2, ilink1, ilink2;
1363
1364 if (priv->ucode_type == UCODE_INIT)
1365 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1366 else
1367 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1368
1369 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1370 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1371 return;
1372 }
1373
1374 count = iwl_read_targ_mem(priv, base);
1375
1376 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1377 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1378 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1379 priv->status, count);
1380 }
1381
1382 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1383 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1384 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1385 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1386 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1387 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1388 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1389 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1390 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1391
1392 IWL_ERR(priv, "Desc Time "
1393 "data1 data2 line\n");
1394 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1395 desc_lookup(desc), desc, time, data1, data2, line);
1396 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1397 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1398 ilink1, ilink2);
1399
1400 }
1401
1402 #define EVENT_START_OFFSET (4 * sizeof(u32))
1403
1404 /**
1405 * iwl_print_event_log - Dump error event log to syslog
1406 *
1407 */
1408 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1409 u32 num_events, u32 mode)
1410 {
1411 u32 i;
1412 u32 base; /* SRAM byte address of event log header */
1413 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1414 u32 ptr; /* SRAM byte address of log data */
1415 u32 ev, time, data; /* event log data */
1416
1417 if (num_events == 0)
1418 return;
1419 if (priv->ucode_type == UCODE_INIT)
1420 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1421 else
1422 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1423
1424 if (mode == 0)
1425 event_size = 2 * sizeof(u32);
1426 else
1427 event_size = 3 * sizeof(u32);
1428
1429 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1430
1431 /* "time" is actually "data" for mode 0 (no timestamp).
1432 * place event id # at far right for easier visual parsing. */
1433 for (i = 0; i < num_events; i++) {
1434 ev = iwl_read_targ_mem(priv, ptr);
1435 ptr += sizeof(u32);
1436 time = iwl_read_targ_mem(priv, ptr);
1437 ptr += sizeof(u32);
1438 if (mode == 0) {
1439 /* data, ev */
1440 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1441 } else {
1442 data = iwl_read_targ_mem(priv, ptr);
1443 ptr += sizeof(u32);
1444 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1445 time, data, ev);
1446 }
1447 }
1448 }
1449
1450 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1451 {
1452 u32 base; /* SRAM byte address of event log header */
1453 u32 capacity; /* event log capacity in # entries */
1454 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1455 u32 num_wraps; /* # times uCode wrapped to top of log */
1456 u32 next_entry; /* index of next entry to be written by uCode */
1457 u32 size; /* # entries that we'll print */
1458
1459 if (priv->ucode_type == UCODE_INIT)
1460 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1461 else
1462 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1463
1464 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1465 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1466 return;
1467 }
1468
1469 /* event log header */
1470 capacity = iwl_read_targ_mem(priv, base);
1471 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1472 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1473 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1474
1475 size = num_wraps ? capacity : next_entry;
1476
1477 /* bail out if nothing in log */
1478 if (size == 0) {
1479 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1480 return;
1481 }
1482
1483 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1484 size, num_wraps);
1485
1486 /* if uCode has wrapped back to top of log, start at the oldest entry,
1487 * i.e the next one that uCode would fill. */
1488 if (num_wraps)
1489 iwl_print_event_log(priv, next_entry,
1490 capacity - next_entry, mode);
1491 /* (then/else) start at top of log */
1492 iwl_print_event_log(priv, 0, next_entry, mode);
1493
1494 }
1495 #endif
1496 /**
1497 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1498 */
1499 void iwl_irq_handle_error(struct iwl_priv *priv)
1500 {
1501 /* Set the FW error flag -- cleared on iwl_down */
1502 set_bit(STATUS_FW_ERROR, &priv->status);
1503
1504 /* Cancel currently queued command. */
1505 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1506
1507 #ifdef CONFIG_IWLWIFI_DEBUG
1508 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
1509 iwl_dump_nic_error_log(priv);
1510 iwl_dump_nic_event_log(priv);
1511 iwl_print_rx_config_cmd(priv);
1512 }
1513 #endif
1514
1515 wake_up_interruptible(&priv->wait_command_queue);
1516
1517 /* Keep the restart process from trying to send host
1518 * commands by clearing the INIT status bit */
1519 clear_bit(STATUS_READY, &priv->status);
1520
1521 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1522 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1523 "Restarting adapter due to uCode error.\n");
1524
1525 if (priv->cfg->mod_params->restart_fw)
1526 queue_work(priv->workqueue, &priv->restart);
1527 }
1528 }
1529 EXPORT_SYMBOL(iwl_irq_handle_error);
1530
1531 void iwl_configure_filter(struct ieee80211_hw *hw,
1532 unsigned int changed_flags,
1533 unsigned int *total_flags,
1534 u64 multicast)
1535 {
1536 struct iwl_priv *priv = hw->priv;
1537 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1538
1539 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1540 changed_flags, *total_flags);
1541
1542 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1543 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1544 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1545 else
1546 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1547 }
1548 if (changed_flags & FIF_ALLMULTI) {
1549 if (*total_flags & FIF_ALLMULTI)
1550 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1551 else
1552 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1553 }
1554 if (changed_flags & FIF_CONTROL) {
1555 if (*total_flags & FIF_CONTROL)
1556 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1557 else
1558 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1559 }
1560 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1561 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1562 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1563 else
1564 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1565 }
1566
1567 /* We avoid iwl_commit_rxon here to commit the new filter flags
1568 * since mac80211 will call ieee80211_hw_config immediately.
1569 * (mc_list is not supported at this time). Otherwise, we need to
1570 * queue a background iwl_commit_rxon work.
1571 */
1572
1573 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1574 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1575 }
1576 EXPORT_SYMBOL(iwl_configure_filter);
1577
1578 int iwl_setup_mac(struct iwl_priv *priv)
1579 {
1580 int ret;
1581 struct ieee80211_hw *hw = priv->hw;
1582 hw->rate_control_algorithm = "iwl-agn-rs";
1583
1584 /* Tell mac80211 our characteristics */
1585 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1586 IEEE80211_HW_NOISE_DBM |
1587 IEEE80211_HW_AMPDU_AGGREGATION |
1588 IEEE80211_HW_SPECTRUM_MGMT |
1589 IEEE80211_HW_SUPPORTS_PS |
1590 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1591 hw->wiphy->interface_modes =
1592 BIT(NL80211_IFTYPE_STATION) |
1593 BIT(NL80211_IFTYPE_ADHOC);
1594
1595 hw->wiphy->custom_regulatory = true;
1596
1597 /* Firmware does not support this */
1598 hw->wiphy->disable_beacon_hints = true;
1599
1600 /*
1601 * For now, disable PS by default because it affects
1602 * RX performance significantly.
1603 */
1604 hw->wiphy->ps_default = false;
1605
1606 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1607 /* we create the 802.11 header and a zero-length SSID element */
1608 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1609
1610 /* Default value; 4 EDCA QOS priorities */
1611 hw->queues = 4;
1612
1613 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1614
1615 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1616 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1617 &priv->bands[IEEE80211_BAND_2GHZ];
1618 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1619 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1620 &priv->bands[IEEE80211_BAND_5GHZ];
1621
1622 ret = ieee80211_register_hw(priv->hw);
1623 if (ret) {
1624 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1625 return ret;
1626 }
1627 priv->mac80211_registered = 1;
1628
1629 return 0;
1630 }
1631 EXPORT_SYMBOL(iwl_setup_mac);
1632
1633 int iwl_set_hw_params(struct iwl_priv *priv)
1634 {
1635 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1636 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1637 if (priv->cfg->mod_params->amsdu_size_8K)
1638 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1639 else
1640 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1641 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1642
1643 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1644
1645 if (priv->cfg->mod_params->disable_11n)
1646 priv->cfg->sku &= ~IWL_SKU_N;
1647
1648 /* Device-specific setup */
1649 return priv->cfg->ops->lib->set_hw_params(priv);
1650 }
1651 EXPORT_SYMBOL(iwl_set_hw_params);
1652
1653 int iwl_init_drv(struct iwl_priv *priv)
1654 {
1655 int ret;
1656
1657 priv->ibss_beacon = NULL;
1658
1659 spin_lock_init(&priv->lock);
1660 spin_lock_init(&priv->sta_lock);
1661 spin_lock_init(&priv->hcmd_lock);
1662
1663 INIT_LIST_HEAD(&priv->free_frames);
1664
1665 mutex_init(&priv->mutex);
1666
1667 /* Clear the driver's (not device's) station table */
1668 iwl_clear_stations_table(priv);
1669
1670 priv->data_retry_limit = -1;
1671 priv->ieee_channels = NULL;
1672 priv->ieee_rates = NULL;
1673 priv->band = IEEE80211_BAND_2GHZ;
1674
1675 priv->iw_mode = NL80211_IFTYPE_STATION;
1676
1677 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1678
1679 /* Choose which receivers/antennas to use */
1680 if (priv->cfg->ops->hcmd->set_rxon_chain)
1681 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1682
1683 iwl_init_scan_params(priv);
1684
1685 iwl_reset_qos(priv);
1686
1687 priv->qos_data.qos_active = 0;
1688 priv->qos_data.qos_cap.val = 0;
1689
1690 priv->rates_mask = IWL_RATES_MASK;
1691 /* Set the tx_power_user_lmt to the lowest power level
1692 * this value will get overwritten by channel max power avg
1693 * from eeprom */
1694 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
1695
1696 ret = iwl_init_channel_map(priv);
1697 if (ret) {
1698 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1699 goto err;
1700 }
1701
1702 ret = iwlcore_init_geos(priv);
1703 if (ret) {
1704 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1705 goto err_free_channel_map;
1706 }
1707 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1708
1709 return 0;
1710
1711 err_free_channel_map:
1712 iwl_free_channel_map(priv);
1713 err:
1714 return ret;
1715 }
1716 EXPORT_SYMBOL(iwl_init_drv);
1717
1718 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1719 {
1720 int ret = 0;
1721 s8 prev_tx_power = priv->tx_power_user_lmt;
1722
1723 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1724 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1725 tx_power,
1726 IWL_TX_POWER_TARGET_POWER_MIN);
1727 return -EINVAL;
1728 }
1729
1730 if (tx_power > priv->tx_power_device_lmt) {
1731 IWL_WARN(priv,
1732 "Requested user TXPOWER %d above upper limit %d.\n",
1733 tx_power, priv->tx_power_device_lmt);
1734 return -EINVAL;
1735 }
1736
1737 if (priv->tx_power_user_lmt != tx_power)
1738 force = true;
1739
1740 /* if nic is not up don't send command */
1741 if (iwl_is_ready_rf(priv)) {
1742 priv->tx_power_user_lmt = tx_power;
1743 if (force && priv->cfg->ops->lib->send_tx_power)
1744 ret = priv->cfg->ops->lib->send_tx_power(priv);
1745 else if (!priv->cfg->ops->lib->send_tx_power)
1746 ret = -EOPNOTSUPP;
1747 /*
1748 * if fail to set tx_power, restore the orig. tx power
1749 */
1750 if (ret)
1751 priv->tx_power_user_lmt = prev_tx_power;
1752 }
1753
1754 /*
1755 * Even this is an async host command, the command
1756 * will always report success from uCode
1757 * So once driver can placing the command into the queue
1758 * successfully, driver can use priv->tx_power_user_lmt
1759 * to reflect the current tx power
1760 */
1761 return ret;
1762 }
1763 EXPORT_SYMBOL(iwl_set_tx_power);
1764
1765 void iwl_uninit_drv(struct iwl_priv *priv)
1766 {
1767 iwl_calib_free_results(priv);
1768 iwlcore_free_geos(priv);
1769 iwl_free_channel_map(priv);
1770 kfree(priv->scan);
1771 }
1772 EXPORT_SYMBOL(iwl_uninit_drv);
1773
1774 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1775
1776 /* Free dram table */
1777 void iwl_free_isr_ict(struct iwl_priv *priv)
1778 {
1779 if (priv->ict_tbl_vir) {
1780 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1781 PAGE_SIZE, priv->ict_tbl_vir,
1782 priv->ict_tbl_dma);
1783 priv->ict_tbl_vir = NULL;
1784 }
1785 }
1786 EXPORT_SYMBOL(iwl_free_isr_ict);
1787
1788
1789 /* allocate dram shared table it is a PAGE_SIZE aligned
1790 * also reset all data related to ICT table interrupt.
1791 */
1792 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1793 {
1794
1795 if (priv->cfg->use_isr_legacy)
1796 return 0;
1797 /* allocate shrared data table */
1798 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1799 ICT_COUNT) + PAGE_SIZE,
1800 &priv->ict_tbl_dma);
1801 if (!priv->ict_tbl_vir)
1802 return -ENOMEM;
1803
1804 /* align table to PAGE_SIZE boundry */
1805 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1806
1807 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1808 (unsigned long long)priv->ict_tbl_dma,
1809 (unsigned long long)priv->aligned_ict_tbl_dma,
1810 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1811
1812 priv->ict_tbl = priv->ict_tbl_vir +
1813 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1814
1815 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1816 priv->ict_tbl, priv->ict_tbl_vir,
1817 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1818
1819 /* reset table and index to all 0 */
1820 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1821 priv->ict_index = 0;
1822
1823 /* add periodic RX interrupt */
1824 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1825 return 0;
1826 }
1827 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1828
1829 /* Device is going up inform it about using ICT interrupt table,
1830 * also we need to tell the driver to start using ICT interrupt.
1831 */
1832 int iwl_reset_ict(struct iwl_priv *priv)
1833 {
1834 u32 val;
1835 unsigned long flags;
1836
1837 if (!priv->ict_tbl_vir)
1838 return 0;
1839
1840 spin_lock_irqsave(&priv->lock, flags);
1841 iwl_disable_interrupts(priv);
1842
1843 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1844
1845 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1846
1847 val |= CSR_DRAM_INT_TBL_ENABLE;
1848 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1849
1850 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1851 "aligned dma address %Lx\n",
1852 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1853
1854 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1855 priv->use_ict = true;
1856 priv->ict_index = 0;
1857 iwl_write32(priv, CSR_INT, priv->inta_mask);
1858 iwl_enable_interrupts(priv);
1859 spin_unlock_irqrestore(&priv->lock, flags);
1860
1861 return 0;
1862 }
1863 EXPORT_SYMBOL(iwl_reset_ict);
1864
1865 /* Device is going down disable ict interrupt usage */
1866 void iwl_disable_ict(struct iwl_priv *priv)
1867 {
1868 unsigned long flags;
1869
1870 spin_lock_irqsave(&priv->lock, flags);
1871 priv->use_ict = false;
1872 spin_unlock_irqrestore(&priv->lock, flags);
1873 }
1874 EXPORT_SYMBOL(iwl_disable_ict);
1875
1876 /* interrupt handler using ict table, with this interrupt driver will
1877 * stop using INTA register to get device's interrupt, reading this register
1878 * is expensive, device will write interrupts in ICT dram table, increment
1879 * index then will fire interrupt to driver, driver will OR all ICT table
1880 * entries from current index up to table entry with 0 value. the result is
1881 * the interrupt we need to service, driver will set the entries back to 0 and
1882 * set index.
1883 */
1884 irqreturn_t iwl_isr_ict(int irq, void *data)
1885 {
1886 struct iwl_priv *priv = data;
1887 u32 inta, inta_mask;
1888 u32 val = 0;
1889
1890 if (!priv)
1891 return IRQ_NONE;
1892
1893 /* dram interrupt table not set yet,
1894 * use legacy interrupt.
1895 */
1896 if (!priv->use_ict)
1897 return iwl_isr(irq, data);
1898
1899 spin_lock(&priv->lock);
1900
1901 /* Disable (but don't clear!) interrupts here to avoid
1902 * back-to-back ISRs and sporadic interrupts from our NIC.
1903 * If we have something to service, the tasklet will re-enable ints.
1904 * If we *don't* have something, we'll re-enable before leaving here.
1905 */
1906 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1907 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1908
1909
1910 /* Ignore interrupt if there's nothing in NIC to service.
1911 * This may be due to IRQ shared with another device,
1912 * or due to sporadic interrupts thrown from our NIC. */
1913 if (!priv->ict_tbl[priv->ict_index]) {
1914 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1915 goto none;
1916 }
1917
1918 /* read all entries that not 0 start with ict_index */
1919 while (priv->ict_tbl[priv->ict_index]) {
1920
1921 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1922 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1923 priv->ict_index,
1924 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1925 priv->ict_tbl[priv->ict_index] = 0;
1926 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1927 ICT_COUNT);
1928
1929 }
1930
1931 /* We should not get this value, just ignore it. */
1932 if (val == 0xffffffff)
1933 val = 0;
1934
1935 inta = (0xff & val) | ((0xff00 & val) << 16);
1936 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1937 inta, inta_mask, val);
1938
1939 inta &= priv->inta_mask;
1940 priv->inta |= inta;
1941
1942 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1943 if (likely(inta))
1944 tasklet_schedule(&priv->irq_tasklet);
1945 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1946 /* Allow interrupt if was disabled by this handler and
1947 * no tasklet was schedules, We should not enable interrupt,
1948 * tasklet will enable it.
1949 */
1950 iwl_enable_interrupts(priv);
1951 }
1952
1953 spin_unlock(&priv->lock);
1954 return IRQ_HANDLED;
1955
1956 none:
1957 /* re-enable interrupts here since we don't have anything to service.
1958 * only Re-enable if disabled by irq.
1959 */
1960 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1961 iwl_enable_interrupts(priv);
1962
1963 spin_unlock(&priv->lock);
1964 return IRQ_NONE;
1965 }
1966 EXPORT_SYMBOL(iwl_isr_ict);
1967
1968
1969 static irqreturn_t iwl_isr(int irq, void *data)
1970 {
1971 struct iwl_priv *priv = data;
1972 u32 inta, inta_mask;
1973 #ifdef CONFIG_IWLWIFI_DEBUG
1974 u32 inta_fh;
1975 #endif
1976 if (!priv)
1977 return IRQ_NONE;
1978
1979 spin_lock(&priv->lock);
1980
1981 /* Disable (but don't clear!) interrupts here to avoid
1982 * back-to-back ISRs and sporadic interrupts from our NIC.
1983 * If we have something to service, the tasklet will re-enable ints.
1984 * If we *don't* have something, we'll re-enable before leaving here. */
1985 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1986 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1987
1988 /* Discover which interrupts are active/pending */
1989 inta = iwl_read32(priv, CSR_INT);
1990
1991 /* Ignore interrupt if there's nothing in NIC to service.
1992 * This may be due to IRQ shared with another device,
1993 * or due to sporadic interrupts thrown from our NIC. */
1994 if (!inta) {
1995 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1996 goto none;
1997 }
1998
1999 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2000 /* Hardware disappeared. It might have already raised
2001 * an interrupt */
2002 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2003 goto unplugged;
2004 }
2005
2006 #ifdef CONFIG_IWLWIFI_DEBUG
2007 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
2008 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2009 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
2010 "fh 0x%08x\n", inta, inta_mask, inta_fh);
2011 }
2012 #endif
2013
2014 priv->inta |= inta;
2015 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2016 if (likely(inta))
2017 tasklet_schedule(&priv->irq_tasklet);
2018 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2019 iwl_enable_interrupts(priv);
2020
2021 unplugged:
2022 spin_unlock(&priv->lock);
2023 return IRQ_HANDLED;
2024
2025 none:
2026 /* re-enable interrupts here since we don't have anything to service. */
2027 /* only Re-enable if diabled by irq and no schedules tasklet. */
2028 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2029 iwl_enable_interrupts(priv);
2030
2031 spin_unlock(&priv->lock);
2032 return IRQ_NONE;
2033 }
2034
2035 irqreturn_t iwl_isr_legacy(int irq, void *data)
2036 {
2037 struct iwl_priv *priv = data;
2038 u32 inta, inta_mask;
2039 u32 inta_fh;
2040 if (!priv)
2041 return IRQ_NONE;
2042
2043 spin_lock(&priv->lock);
2044
2045 /* Disable (but don't clear!) interrupts here to avoid
2046 * back-to-back ISRs and sporadic interrupts from our NIC.
2047 * If we have something to service, the tasklet will re-enable ints.
2048 * If we *don't* have something, we'll re-enable before leaving here. */
2049 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2050 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
2051
2052 /* Discover which interrupts are active/pending */
2053 inta = iwl_read32(priv, CSR_INT);
2054 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2055
2056 /* Ignore interrupt if there's nothing in NIC to service.
2057 * This may be due to IRQ shared with another device,
2058 * or due to sporadic interrupts thrown from our NIC. */
2059 if (!inta && !inta_fh) {
2060 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
2061 goto none;
2062 }
2063
2064 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2065 /* Hardware disappeared. It might have already raised
2066 * an interrupt */
2067 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2068 goto unplugged;
2069 }
2070
2071 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2072 inta, inta_mask, inta_fh);
2073
2074 inta &= ~CSR_INT_BIT_SCD;
2075
2076 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2077 if (likely(inta || inta_fh))
2078 tasklet_schedule(&priv->irq_tasklet);
2079
2080 unplugged:
2081 spin_unlock(&priv->lock);
2082 return IRQ_HANDLED;
2083
2084 none:
2085 /* re-enable interrupts here since we don't have anything to service. */
2086 /* only Re-enable if diabled by irq */
2087 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2088 iwl_enable_interrupts(priv);
2089 spin_unlock(&priv->lock);
2090 return IRQ_NONE;
2091 }
2092 EXPORT_SYMBOL(iwl_isr_legacy);
2093
2094 int iwl_send_bt_config(struct iwl_priv *priv)
2095 {
2096 struct iwl_bt_cmd bt_cmd = {
2097 .flags = 3,
2098 .lead_time = 0xAA,
2099 .max_kill = 1,
2100 .kill_ack_mask = 0,
2101 .kill_cts_mask = 0,
2102 };
2103
2104 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2105 sizeof(struct iwl_bt_cmd), &bt_cmd);
2106 }
2107 EXPORT_SYMBOL(iwl_send_bt_config);
2108
2109 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
2110 {
2111 u32 stat_flags = 0;
2112 struct iwl_host_cmd cmd = {
2113 .id = REPLY_STATISTICS_CMD,
2114 .flags = flags,
2115 .len = sizeof(stat_flags),
2116 .data = (u8 *) &stat_flags,
2117 };
2118 return iwl_send_cmd(priv, &cmd);
2119 }
2120 EXPORT_SYMBOL(iwl_send_statistics_request);
2121
2122 /**
2123 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2124 * using sample data 100 bytes apart. If these sample points are good,
2125 * it's a pretty good bet that everything between them is good, too.
2126 */
2127 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2128 {
2129 u32 val;
2130 int ret = 0;
2131 u32 errcnt = 0;
2132 u32 i;
2133
2134 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2135
2136 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2137 /* read data comes through single port, auto-incr addr */
2138 /* NOTE: Use the debugless read so we don't flood kernel log
2139 * if IWL_DL_IO is set */
2140 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2141 i + IWL49_RTC_INST_LOWER_BOUND);
2142 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2143 if (val != le32_to_cpu(*image)) {
2144 ret = -EIO;
2145 errcnt++;
2146 if (errcnt >= 3)
2147 break;
2148 }
2149 }
2150
2151 return ret;
2152 }
2153
2154 /**
2155 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2156 * looking at all data.
2157 */
2158 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2159 u32 len)
2160 {
2161 u32 val;
2162 u32 save_len = len;
2163 int ret = 0;
2164 u32 errcnt;
2165
2166 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2167
2168 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2169 IWL49_RTC_INST_LOWER_BOUND);
2170
2171 errcnt = 0;
2172 for (; len > 0; len -= sizeof(u32), image++) {
2173 /* read data comes through single port, auto-incr addr */
2174 /* NOTE: Use the debugless read so we don't flood kernel log
2175 * if IWL_DL_IO is set */
2176 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2177 if (val != le32_to_cpu(*image)) {
2178 IWL_ERR(priv, "uCode INST section is invalid at "
2179 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2180 save_len - len, val, le32_to_cpu(*image));
2181 ret = -EIO;
2182 errcnt++;
2183 if (errcnt >= 20)
2184 break;
2185 }
2186 }
2187
2188 if (!errcnt)
2189 IWL_DEBUG_INFO(priv,
2190 "ucode image in INSTRUCTION memory is good\n");
2191
2192 return ret;
2193 }
2194
2195 /**
2196 * iwl_verify_ucode - determine which instruction image is in SRAM,
2197 * and verify its contents
2198 */
2199 int iwl_verify_ucode(struct iwl_priv *priv)
2200 {
2201 __le32 *image;
2202 u32 len;
2203 int ret;
2204
2205 /* Try bootstrap */
2206 image = (__le32 *)priv->ucode_boot.v_addr;
2207 len = priv->ucode_boot.len;
2208 ret = iwlcore_verify_inst_sparse(priv, image, len);
2209 if (!ret) {
2210 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2211 return 0;
2212 }
2213
2214 /* Try initialize */
2215 image = (__le32 *)priv->ucode_init.v_addr;
2216 len = priv->ucode_init.len;
2217 ret = iwlcore_verify_inst_sparse(priv, image, len);
2218 if (!ret) {
2219 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2220 return 0;
2221 }
2222
2223 /* Try runtime/protocol */
2224 image = (__le32 *)priv->ucode_code.v_addr;
2225 len = priv->ucode_code.len;
2226 ret = iwlcore_verify_inst_sparse(priv, image, len);
2227 if (!ret) {
2228 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2229 return 0;
2230 }
2231
2232 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2233
2234 /* Since nothing seems to match, show first several data entries in
2235 * instruction SRAM, so maybe visual inspection will give a clue.
2236 * Selection of bootstrap image (vs. other images) is arbitrary. */
2237 image = (__le32 *)priv->ucode_boot.v_addr;
2238 len = priv->ucode_boot.len;
2239 ret = iwl_verify_inst_full(priv, image, len);
2240
2241 return ret;
2242 }
2243 EXPORT_SYMBOL(iwl_verify_ucode);
2244
2245
2246 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2247 {
2248 struct iwl_ct_kill_config cmd;
2249 struct iwl_ct_kill_throttling_config adv_cmd;
2250 unsigned long flags;
2251 int ret = 0;
2252
2253 spin_lock_irqsave(&priv->lock, flags);
2254 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2255 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2256 spin_unlock_irqrestore(&priv->lock, flags);
2257 priv->thermal_throttle.ct_kill_toggle = false;
2258
2259 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2260 case CSR_HW_REV_TYPE_1000:
2261 case CSR_HW_REV_TYPE_6x00:
2262 case CSR_HW_REV_TYPE_6x50:
2263 adv_cmd.critical_temperature_enter =
2264 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2265 adv_cmd.critical_temperature_exit =
2266 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2267
2268 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2269 sizeof(adv_cmd), &adv_cmd);
2270 if (ret)
2271 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2272 else
2273 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2274 "succeeded, "
2275 "critical temperature enter is %d,"
2276 "exit is %d\n",
2277 priv->hw_params.ct_kill_threshold,
2278 priv->hw_params.ct_kill_exit_threshold);
2279 break;
2280 default:
2281 cmd.critical_temperature_R =
2282 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2283
2284 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2285 sizeof(cmd), &cmd);
2286 if (ret)
2287 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2288 else
2289 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2290 "succeeded, "
2291 "critical temperature is %d\n",
2292 priv->hw_params.ct_kill_threshold);
2293 break;
2294 }
2295 }
2296 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2297
2298
2299 /*
2300 * CARD_STATE_CMD
2301 *
2302 * Use: Sets the device's internal card state to enable, disable, or halt
2303 *
2304 * When in the 'enable' state the card operates as normal.
2305 * When in the 'disable' state, the card enters into a low power mode.
2306 * When in the 'halt' state, the card is shut down and must be fully
2307 * restarted to come back on.
2308 */
2309 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2310 {
2311 struct iwl_host_cmd cmd = {
2312 .id = REPLY_CARD_STATE_CMD,
2313 .len = sizeof(u32),
2314 .data = &flags,
2315 .flags = meta_flag,
2316 };
2317
2318 return iwl_send_cmd(priv, &cmd);
2319 }
2320
2321 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2322 struct iwl_rx_mem_buffer *rxb)
2323 {
2324 #ifdef CONFIG_IWLWIFI_DEBUG
2325 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2326 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2327 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2328 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2329 #endif
2330 }
2331 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2332
2333 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2334 struct iwl_rx_mem_buffer *rxb)
2335 {
2336 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2337 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2338 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2339 "notification for %s:\n", len,
2340 get_cmd_string(pkt->hdr.cmd));
2341 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2342 }
2343 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2344
2345 void iwl_rx_reply_error(struct iwl_priv *priv,
2346 struct iwl_rx_mem_buffer *rxb)
2347 {
2348 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2349
2350 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2351 "seq 0x%04X ser 0x%08X\n",
2352 le32_to_cpu(pkt->u.err_resp.error_type),
2353 get_cmd_string(pkt->u.err_resp.cmd_id),
2354 pkt->u.err_resp.cmd_id,
2355 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2356 le32_to_cpu(pkt->u.err_resp.error_info));
2357 }
2358 EXPORT_SYMBOL(iwl_rx_reply_error);
2359
2360 void iwl_clear_isr_stats(struct iwl_priv *priv)
2361 {
2362 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2363 }
2364
2365 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2366 const struct ieee80211_tx_queue_params *params)
2367 {
2368 struct iwl_priv *priv = hw->priv;
2369 unsigned long flags;
2370 int q;
2371
2372 IWL_DEBUG_MAC80211(priv, "enter\n");
2373
2374 if (!iwl_is_ready_rf(priv)) {
2375 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2376 return -EIO;
2377 }
2378
2379 if (queue >= AC_NUM) {
2380 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2381 return 0;
2382 }
2383
2384 q = AC_NUM - 1 - queue;
2385
2386 spin_lock_irqsave(&priv->lock, flags);
2387
2388 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2389 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2390 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2391 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2392 cpu_to_le16((params->txop * 32));
2393
2394 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2395 priv->qos_data.qos_active = 1;
2396
2397 if (priv->iw_mode == NL80211_IFTYPE_AP)
2398 iwl_activate_qos(priv, 1);
2399 else if (priv->assoc_id && iwl_is_associated(priv))
2400 iwl_activate_qos(priv, 0);
2401
2402 spin_unlock_irqrestore(&priv->lock, flags);
2403
2404 IWL_DEBUG_MAC80211(priv, "leave\n");
2405 return 0;
2406 }
2407 EXPORT_SYMBOL(iwl_mac_conf_tx);
2408
2409 static void iwl_ht_conf(struct iwl_priv *priv,
2410 struct ieee80211_bss_conf *bss_conf)
2411 {
2412 struct ieee80211_sta_ht_cap *ht_conf;
2413 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2414 struct ieee80211_sta *sta;
2415
2416 IWL_DEBUG_MAC80211(priv, "enter: \n");
2417
2418 if (!iwl_conf->is_ht)
2419 return;
2420
2421
2422 /*
2423 * It is totally wrong to base global information on something
2424 * that is valid only when associated, alas, this driver works
2425 * that way and I don't know how to fix it.
2426 */
2427
2428 rcu_read_lock();
2429 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2430 if (!sta) {
2431 rcu_read_unlock();
2432 return;
2433 }
2434 ht_conf = &sta->ht_cap;
2435
2436 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2437
2438 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2439
2440 iwl_conf->ht_protection =
2441 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2442 iwl_conf->non_GF_STA_present =
2443 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2444
2445 rcu_read_unlock();
2446
2447 IWL_DEBUG_MAC80211(priv, "leave\n");
2448 }
2449
2450 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2451 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2452 struct ieee80211_vif *vif,
2453 struct ieee80211_bss_conf *bss_conf,
2454 u32 changes)
2455 {
2456 struct iwl_priv *priv = hw->priv;
2457 int ret;
2458
2459 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2460
2461 if (!iwl_is_alive(priv))
2462 return;
2463
2464 mutex_lock(&priv->mutex);
2465
2466 if (changes & BSS_CHANGED_BEACON &&
2467 priv->iw_mode == NL80211_IFTYPE_AP) {
2468 dev_kfree_skb(priv->ibss_beacon);
2469 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2470 }
2471
2472 if (changes & BSS_CHANGED_BEACON_INT) {
2473 priv->beacon_int = bss_conf->beacon_int;
2474 /* TODO: in AP mode, do something to make this take effect */
2475 }
2476
2477 if (changes & BSS_CHANGED_BSSID) {
2478 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2479
2480 /*
2481 * If there is currently a HW scan going on in the
2482 * background then we need to cancel it else the RXON
2483 * below/in post_associate will fail.
2484 */
2485 if (iwl_scan_cancel_timeout(priv, 100)) {
2486 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2487 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2488 mutex_unlock(&priv->mutex);
2489 return;
2490 }
2491
2492 /* mac80211 only sets assoc when in STATION mode */
2493 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2494 bss_conf->assoc) {
2495 memcpy(priv->staging_rxon.bssid_addr,
2496 bss_conf->bssid, ETH_ALEN);
2497
2498 /* currently needed in a few places */
2499 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2500 } else {
2501 priv->staging_rxon.filter_flags &=
2502 ~RXON_FILTER_ASSOC_MSK;
2503 }
2504
2505 }
2506
2507 /*
2508 * This needs to be after setting the BSSID in case
2509 * mac80211 decides to do both changes at once because
2510 * it will invoke post_associate.
2511 */
2512 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2513 changes & BSS_CHANGED_BEACON) {
2514 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2515
2516 if (beacon)
2517 iwl_mac_beacon_update(hw, beacon);
2518 }
2519
2520 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2521 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2522 bss_conf->use_short_preamble);
2523 if (bss_conf->use_short_preamble)
2524 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2525 else
2526 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2527 }
2528
2529 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2530 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2531 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2532 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2533 else
2534 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2535 }
2536
2537 if (changes & BSS_CHANGED_BASIC_RATES) {
2538 /* XXX use this information
2539 *
2540 * To do that, remove code from iwl_set_rate() and put something
2541 * like this here:
2542 *
2543 if (A-band)
2544 priv->staging_rxon.ofdm_basic_rates =
2545 bss_conf->basic_rates;
2546 else
2547 priv->staging_rxon.ofdm_basic_rates =
2548 bss_conf->basic_rates >> 4;
2549 priv->staging_rxon.cck_basic_rates =
2550 bss_conf->basic_rates & 0xF;
2551 */
2552 }
2553
2554 if (changes & BSS_CHANGED_HT) {
2555 iwl_ht_conf(priv, bss_conf);
2556
2557 if (priv->cfg->ops->hcmd->set_rxon_chain)
2558 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2559 }
2560
2561 if (changes & BSS_CHANGED_ASSOC) {
2562 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2563 if (bss_conf->assoc) {
2564 priv->assoc_id = bss_conf->aid;
2565 priv->beacon_int = bss_conf->beacon_int;
2566 priv->timestamp = bss_conf->timestamp;
2567 priv->assoc_capability = bss_conf->assoc_capability;
2568
2569 /*
2570 * We have just associated, don't start scan too early
2571 * leave time for EAPOL exchange to complete.
2572 *
2573 * XXX: do this in mac80211
2574 */
2575 priv->next_scan_jiffies = jiffies +
2576 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2577 if (!iwl_is_rfkill(priv))
2578 priv->cfg->ops->lib->post_associate(priv);
2579 } else
2580 priv->assoc_id = 0;
2581
2582 }
2583
2584 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2585 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2586 changes);
2587 ret = iwl_send_rxon_assoc(priv);
2588 if (!ret) {
2589 /* Sync active_rxon with latest change. */
2590 memcpy((void *)&priv->active_rxon,
2591 &priv->staging_rxon,
2592 sizeof(struct iwl_rxon_cmd));
2593 }
2594 }
2595
2596 mutex_unlock(&priv->mutex);
2597
2598 IWL_DEBUG_MAC80211(priv, "leave\n");
2599 }
2600 EXPORT_SYMBOL(iwl_bss_info_changed);
2601
2602 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2603 {
2604 struct iwl_priv *priv = hw->priv;
2605 unsigned long flags;
2606 __le64 timestamp;
2607
2608 IWL_DEBUG_MAC80211(priv, "enter\n");
2609
2610 if (!iwl_is_ready_rf(priv)) {
2611 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2612 return -EIO;
2613 }
2614
2615 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2616 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2617 return -EIO;
2618 }
2619
2620 spin_lock_irqsave(&priv->lock, flags);
2621
2622 if (priv->ibss_beacon)
2623 dev_kfree_skb(priv->ibss_beacon);
2624
2625 priv->ibss_beacon = skb;
2626
2627 priv->assoc_id = 0;
2628 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2629 priv->timestamp = le64_to_cpu(timestamp);
2630
2631 IWL_DEBUG_MAC80211(priv, "leave\n");
2632 spin_unlock_irqrestore(&priv->lock, flags);
2633
2634 iwl_reset_qos(priv);
2635
2636 priv->cfg->ops->lib->post_associate(priv);
2637
2638
2639 return 0;
2640 }
2641 EXPORT_SYMBOL(iwl_mac_beacon_update);
2642
2643 int iwl_set_mode(struct iwl_priv *priv, int mode)
2644 {
2645 if (mode == NL80211_IFTYPE_ADHOC) {
2646 const struct iwl_channel_info *ch_info;
2647
2648 ch_info = iwl_get_channel_info(priv,
2649 priv->band,
2650 le16_to_cpu(priv->staging_rxon.channel));
2651
2652 if (!ch_info || !is_channel_ibss(ch_info)) {
2653 IWL_ERR(priv, "channel %d not IBSS channel\n",
2654 le16_to_cpu(priv->staging_rxon.channel));
2655 return -EINVAL;
2656 }
2657 }
2658
2659 iwl_connection_init_rx_config(priv, mode);
2660
2661 if (priv->cfg->ops->hcmd->set_rxon_chain)
2662 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2663
2664 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2665
2666 iwl_clear_stations_table(priv);
2667
2668 /* dont commit rxon if rf-kill is on*/
2669 if (!iwl_is_ready_rf(priv))
2670 return -EAGAIN;
2671
2672 iwlcore_commit_rxon(priv);
2673
2674 return 0;
2675 }
2676 EXPORT_SYMBOL(iwl_set_mode);
2677
2678 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2679 struct ieee80211_if_init_conf *conf)
2680 {
2681 struct iwl_priv *priv = hw->priv;
2682 unsigned long flags;
2683
2684 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2685
2686 if (priv->vif) {
2687 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2688 return -EOPNOTSUPP;
2689 }
2690
2691 spin_lock_irqsave(&priv->lock, flags);
2692 priv->vif = conf->vif;
2693 priv->iw_mode = conf->type;
2694
2695 spin_unlock_irqrestore(&priv->lock, flags);
2696
2697 mutex_lock(&priv->mutex);
2698
2699 if (conf->mac_addr) {
2700 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2701 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2702 }
2703
2704 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2705 /* we are not ready, will run again when ready */
2706 set_bit(STATUS_MODE_PENDING, &priv->status);
2707
2708 mutex_unlock(&priv->mutex);
2709
2710 IWL_DEBUG_MAC80211(priv, "leave\n");
2711 return 0;
2712 }
2713 EXPORT_SYMBOL(iwl_mac_add_interface);
2714
2715 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2716 struct ieee80211_if_init_conf *conf)
2717 {
2718 struct iwl_priv *priv = hw->priv;
2719
2720 IWL_DEBUG_MAC80211(priv, "enter\n");
2721
2722 mutex_lock(&priv->mutex);
2723
2724 if (iwl_is_ready_rf(priv)) {
2725 iwl_scan_cancel_timeout(priv, 100);
2726 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2727 iwlcore_commit_rxon(priv);
2728 }
2729 if (priv->vif == conf->vif) {
2730 priv->vif = NULL;
2731 memset(priv->bssid, 0, ETH_ALEN);
2732 }
2733 mutex_unlock(&priv->mutex);
2734
2735 IWL_DEBUG_MAC80211(priv, "leave\n");
2736
2737 }
2738 EXPORT_SYMBOL(iwl_mac_remove_interface);
2739
2740 /**
2741 * iwl_mac_config - mac80211 config callback
2742 *
2743 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2744 * be set inappropriately and the driver currently sets the hardware up to
2745 * use it whenever needed.
2746 */
2747 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2748 {
2749 struct iwl_priv *priv = hw->priv;
2750 const struct iwl_channel_info *ch_info;
2751 struct ieee80211_conf *conf = &hw->conf;
2752 struct iwl_ht_info *ht_conf = &priv->current_ht_config;
2753 unsigned long flags = 0;
2754 int ret = 0;
2755 u16 ch;
2756 int scan_active = 0;
2757
2758 mutex_lock(&priv->mutex);
2759
2760 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2761 conf->channel->hw_value, changed);
2762
2763 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2764 test_bit(STATUS_SCANNING, &priv->status))) {
2765 scan_active = 1;
2766 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2767 }
2768
2769
2770 /* during scanning mac80211 will delay channel setting until
2771 * scan finish with changed = 0
2772 */
2773 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2774 if (scan_active)
2775 goto set_ch_out;
2776
2777 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2778 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2779 if (!is_channel_valid(ch_info)) {
2780 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2781 ret = -EINVAL;
2782 goto set_ch_out;
2783 }
2784
2785 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2786 !is_channel_ibss(ch_info)) {
2787 IWL_ERR(priv, "channel %d in band %d not "
2788 "IBSS channel\n",
2789 conf->channel->hw_value, conf->channel->band);
2790 ret = -EINVAL;
2791 goto set_ch_out;
2792 }
2793
2794 spin_lock_irqsave(&priv->lock, flags);
2795
2796 /* Configure HT40 channels */
2797 ht_conf->is_ht = conf_is_ht(conf);
2798 if (ht_conf->is_ht) {
2799 if (conf_is_ht40_minus(conf)) {
2800 ht_conf->extension_chan_offset =
2801 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2802 ht_conf->supported_chan_width =
2803 IWL_CHANNEL_WIDTH_40MHZ;
2804 } else if (conf_is_ht40_plus(conf)) {
2805 ht_conf->extension_chan_offset =
2806 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2807 ht_conf->supported_chan_width =
2808 IWL_CHANNEL_WIDTH_40MHZ;
2809 } else {
2810 ht_conf->extension_chan_offset =
2811 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2812 ht_conf->supported_chan_width =
2813 IWL_CHANNEL_WIDTH_20MHZ;
2814 }
2815 } else
2816 ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
2817 /* Default to no protection. Protection mode will later be set
2818 * from BSS config in iwl_ht_conf */
2819 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2820
2821 /* if we are switching from ht to 2.4 clear flags
2822 * from any ht related info since 2.4 does not
2823 * support ht */
2824 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2825 priv->staging_rxon.flags = 0;
2826
2827 iwl_set_rxon_channel(priv, conf->channel);
2828
2829 iwl_set_flags_for_band(priv, conf->channel->band);
2830 spin_unlock_irqrestore(&priv->lock, flags);
2831 set_ch_out:
2832 /* The list of supported rates and rate mask can be different
2833 * for each band; since the band may have changed, reset
2834 * the rate mask to what mac80211 lists */
2835 iwl_set_rate(priv);
2836 }
2837
2838 if (changed & IEEE80211_CONF_CHANGE_PS) {
2839 ret = iwl_power_update_mode(priv, false);
2840 if (ret)
2841 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2842 }
2843
2844 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2845 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2846 priv->tx_power_user_lmt, conf->power_level);
2847
2848 iwl_set_tx_power(priv, conf->power_level, false);
2849 }
2850
2851 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2852 if (priv->cfg->ops->hcmd->set_rxon_chain)
2853 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2854
2855 if (!iwl_is_ready(priv)) {
2856 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2857 goto out;
2858 }
2859
2860 if (scan_active)
2861 goto out;
2862
2863 if (memcmp(&priv->active_rxon,
2864 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2865 iwlcore_commit_rxon(priv);
2866 else
2867 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2868
2869
2870 out:
2871 IWL_DEBUG_MAC80211(priv, "leave\n");
2872 mutex_unlock(&priv->mutex);
2873 return ret;
2874 }
2875 EXPORT_SYMBOL(iwl_mac_config);
2876
2877 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2878 struct ieee80211_tx_queue_stats *stats)
2879 {
2880 struct iwl_priv *priv = hw->priv;
2881 int i, avail;
2882 struct iwl_tx_queue *txq;
2883 struct iwl_queue *q;
2884 unsigned long flags;
2885
2886 IWL_DEBUG_MAC80211(priv, "enter\n");
2887
2888 if (!iwl_is_ready_rf(priv)) {
2889 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2890 return -EIO;
2891 }
2892
2893 spin_lock_irqsave(&priv->lock, flags);
2894
2895 for (i = 0; i < AC_NUM; i++) {
2896 txq = &priv->txq[i];
2897 q = &txq->q;
2898 avail = iwl_queue_space(q);
2899
2900 stats[i].len = q->n_window - avail;
2901 stats[i].limit = q->n_window - q->high_mark;
2902 stats[i].count = q->n_window;
2903
2904 }
2905 spin_unlock_irqrestore(&priv->lock, flags);
2906
2907 IWL_DEBUG_MAC80211(priv, "leave\n");
2908
2909 return 0;
2910 }
2911 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2912
2913 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2914 {
2915 struct iwl_priv *priv = hw->priv;
2916 unsigned long flags;
2917
2918 mutex_lock(&priv->mutex);
2919 IWL_DEBUG_MAC80211(priv, "enter\n");
2920
2921 spin_lock_irqsave(&priv->lock, flags);
2922 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2923 spin_unlock_irqrestore(&priv->lock, flags);
2924
2925 iwl_reset_qos(priv);
2926
2927 spin_lock_irqsave(&priv->lock, flags);
2928 priv->assoc_id = 0;
2929 priv->assoc_capability = 0;
2930 priv->assoc_station_added = 0;
2931
2932 /* new association get rid of ibss beacon skb */
2933 if (priv->ibss_beacon)
2934 dev_kfree_skb(priv->ibss_beacon);
2935
2936 priv->ibss_beacon = NULL;
2937
2938 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2939 priv->timestamp = 0;
2940 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2941 priv->beacon_int = 0;
2942
2943 spin_unlock_irqrestore(&priv->lock, flags);
2944
2945 if (!iwl_is_ready_rf(priv)) {
2946 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2947 mutex_unlock(&priv->mutex);
2948 return;
2949 }
2950
2951 /* we are restarting association process
2952 * clear RXON_FILTER_ASSOC_MSK bit
2953 */
2954 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2955 iwl_scan_cancel_timeout(priv, 100);
2956 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2957 iwlcore_commit_rxon(priv);
2958 }
2959
2960 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2961 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2962 mutex_unlock(&priv->mutex);
2963 return;
2964 }
2965
2966 iwl_set_rate(priv);
2967
2968 mutex_unlock(&priv->mutex);
2969
2970 IWL_DEBUG_MAC80211(priv, "leave\n");
2971 }
2972 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2973
2974 #ifdef CONFIG_IWLWIFI_DEBUGFS
2975
2976 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2977
2978 void iwl_reset_traffic_log(struct iwl_priv *priv)
2979 {
2980 priv->tx_traffic_idx = 0;
2981 priv->rx_traffic_idx = 0;
2982 if (priv->tx_traffic)
2983 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2984 if (priv->rx_traffic)
2985 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2986 }
2987
2988 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2989 {
2990 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2991
2992 if (iwl_debug_level & IWL_DL_TX) {
2993 if (!priv->tx_traffic) {
2994 priv->tx_traffic =
2995 kzalloc(traffic_size, GFP_KERNEL);
2996 if (!priv->tx_traffic)
2997 return -ENOMEM;
2998 }
2999 }
3000 if (iwl_debug_level & IWL_DL_RX) {
3001 if (!priv->rx_traffic) {
3002 priv->rx_traffic =
3003 kzalloc(traffic_size, GFP_KERNEL);
3004 if (!priv->rx_traffic)
3005 return -ENOMEM;
3006 }
3007 }
3008 iwl_reset_traffic_log(priv);
3009 return 0;
3010 }
3011 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
3012
3013 void iwl_free_traffic_mem(struct iwl_priv *priv)
3014 {
3015 kfree(priv->tx_traffic);
3016 priv->tx_traffic = NULL;
3017
3018 kfree(priv->rx_traffic);
3019 priv->rx_traffic = NULL;
3020 }
3021 EXPORT_SYMBOL(iwl_free_traffic_mem);
3022
3023 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
3024 u16 length, struct ieee80211_hdr *header)
3025 {
3026 __le16 fc;
3027 u16 len;
3028
3029 if (likely(!(iwl_debug_level & IWL_DL_TX)))
3030 return;
3031
3032 if (!priv->tx_traffic)
3033 return;
3034
3035 fc = header->frame_control;
3036 if (ieee80211_is_data(fc)) {
3037 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3038 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3039 memcpy((priv->tx_traffic +
3040 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3041 header, len);
3042 priv->tx_traffic_idx =
3043 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3044 }
3045 }
3046 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3047
3048 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3049 u16 length, struct ieee80211_hdr *header)
3050 {
3051 __le16 fc;
3052 u16 len;
3053
3054 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3055 return;
3056
3057 if (!priv->rx_traffic)
3058 return;
3059
3060 fc = header->frame_control;
3061 if (ieee80211_is_data(fc)) {
3062 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3063 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3064 memcpy((priv->rx_traffic +
3065 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3066 header, len);
3067 priv->rx_traffic_idx =
3068 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3069 }
3070 }
3071 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3072
3073 const char *get_mgmt_string(int cmd)
3074 {
3075 switch (cmd) {
3076 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3077 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3078 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3079 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3080 IWL_CMD(MANAGEMENT_PROBE_REQ);
3081 IWL_CMD(MANAGEMENT_PROBE_RESP);
3082 IWL_CMD(MANAGEMENT_BEACON);
3083 IWL_CMD(MANAGEMENT_ATIM);
3084 IWL_CMD(MANAGEMENT_DISASSOC);
3085 IWL_CMD(MANAGEMENT_AUTH);
3086 IWL_CMD(MANAGEMENT_DEAUTH);
3087 IWL_CMD(MANAGEMENT_ACTION);
3088 default:
3089 return "UNKNOWN";
3090
3091 }
3092 }
3093
3094 const char *get_ctrl_string(int cmd)
3095 {
3096 switch (cmd) {
3097 IWL_CMD(CONTROL_BACK_REQ);
3098 IWL_CMD(CONTROL_BACK);
3099 IWL_CMD(CONTROL_PSPOLL);
3100 IWL_CMD(CONTROL_RTS);
3101 IWL_CMD(CONTROL_CTS);
3102 IWL_CMD(CONTROL_ACK);
3103 IWL_CMD(CONTROL_CFEND);
3104 IWL_CMD(CONTROL_CFENDACK);
3105 default:
3106 return "UNKNOWN";
3107
3108 }
3109 }
3110
3111 void iwl_clear_tx_stats(struct iwl_priv *priv)
3112 {
3113 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3114
3115 }
3116
3117 void iwl_clear_rx_stats(struct iwl_priv *priv)
3118 {
3119 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3120 }
3121
3122 /*
3123 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3124 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3125 * Use debugFs to display the rx/rx_statistics
3126 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3127 * information will be recorded, but DATA pkt still will be recorded
3128 * for the reason of iwl_led.c need to control the led blinking based on
3129 * number of tx and rx data.
3130 *
3131 */
3132 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3133 {
3134 struct traffic_stats *stats;
3135
3136 if (is_tx)
3137 stats = &priv->tx_stats;
3138 else
3139 stats = &priv->rx_stats;
3140
3141 if (ieee80211_is_mgmt(fc)) {
3142 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3143 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3144 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3145 break;
3146 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3147 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3148 break;
3149 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3150 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3151 break;
3152 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3153 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3154 break;
3155 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3156 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3157 break;
3158 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3159 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3160 break;
3161 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3162 stats->mgmt[MANAGEMENT_BEACON]++;
3163 break;
3164 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3165 stats->mgmt[MANAGEMENT_ATIM]++;
3166 break;
3167 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3168 stats->mgmt[MANAGEMENT_DISASSOC]++;
3169 break;
3170 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3171 stats->mgmt[MANAGEMENT_AUTH]++;
3172 break;
3173 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3174 stats->mgmt[MANAGEMENT_DEAUTH]++;
3175 break;
3176 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3177 stats->mgmt[MANAGEMENT_ACTION]++;
3178 break;
3179 }
3180 } else if (ieee80211_is_ctl(fc)) {
3181 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3182 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3183 stats->ctrl[CONTROL_BACK_REQ]++;
3184 break;
3185 case cpu_to_le16(IEEE80211_STYPE_BACK):
3186 stats->ctrl[CONTROL_BACK]++;
3187 break;
3188 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3189 stats->ctrl[CONTROL_PSPOLL]++;
3190 break;
3191 case cpu_to_le16(IEEE80211_STYPE_RTS):
3192 stats->ctrl[CONTROL_RTS]++;
3193 break;
3194 case cpu_to_le16(IEEE80211_STYPE_CTS):
3195 stats->ctrl[CONTROL_CTS]++;
3196 break;
3197 case cpu_to_le16(IEEE80211_STYPE_ACK):
3198 stats->ctrl[CONTROL_ACK]++;
3199 break;
3200 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3201 stats->ctrl[CONTROL_CFEND]++;
3202 break;
3203 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3204 stats->ctrl[CONTROL_CFENDACK]++;
3205 break;
3206 }
3207 } else {
3208 /* data */
3209 stats->data_cnt++;
3210 stats->data_bytes += len;
3211 }
3212 }
3213 EXPORT_SYMBOL(iwl_update_stats);
3214 #endif
3215
3216 #ifdef CONFIG_PM
3217
3218 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3219 {
3220 struct iwl_priv *priv = pci_get_drvdata(pdev);
3221
3222 /*
3223 * This function is called when system goes into suspend state
3224 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3225 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3226 * it will not call apm_ops.stop() to stop the DMA operation.
3227 * Calling apm_ops.stop here to make sure we stop the DMA.
3228 */
3229 priv->cfg->ops->lib->apm_ops.stop(priv);
3230
3231 pci_save_state(pdev);
3232 pci_disable_device(pdev);
3233 pci_set_power_state(pdev, PCI_D3hot);
3234
3235 return 0;
3236 }
3237 EXPORT_SYMBOL(iwl_pci_suspend);
3238
3239 int iwl_pci_resume(struct pci_dev *pdev)
3240 {
3241 struct iwl_priv *priv = pci_get_drvdata(pdev);
3242 int ret;
3243
3244 pci_set_power_state(pdev, PCI_D0);
3245 ret = pci_enable_device(pdev);
3246 if (ret)
3247 return ret;
3248 pci_restore_state(pdev);
3249 iwl_enable_interrupts(priv);
3250
3251 return 0;
3252 }
3253 EXPORT_SYMBOL(iwl_pci_resume);
3254
3255 #endif /* CONFIG_PM */
Linux with added FPC-III support