arch/sh/kernel/cpu/shmobile/pm.c

   1 /*
   2  * arch/sh/kernel/cpu/shmobile/pm.c
   3  *
   4  * Power management support code for SuperH Mobile
   5  *
   6  *  Copyright (C) 2009 Magnus Damm
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/io.h>
  15 #include <linux/suspend.h>
  16 #include <asm/suspend.h>
  17 #include <asm/uaccess.h>
  18 #include <asm/cacheflush.h>
  19
  20 /*
  21  * Notifier lists for pre/post sleep notification
  22  */
  23 ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
  24 ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
  25
  26 /*
  27  * Sleep modes available on SuperH Mobile:
  28  *
  29  * Sleep mode is just plain "sleep" instruction
  30  * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
  31  * Standby Self-Refresh mode is above plus stopped clocks
  32  */
  33 #define SUSP_MODE_SLEEP         (SUSP_SH_SLEEP)
  34 #define SUSP_MODE_SLEEP_SF      (SUSP_SH_SLEEP | SUSP_SH_SF)
  35 #define SUSP_MODE_STANDBY_SF    (SUSP_SH_STANDBY | SUSP_SH_SF)
  36 #define SUSP_MODE_RSTANDBY      (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_SF)
  37  /*
  38   * U-standby mode is unsupported since it needs bootloader hacks
  39   */
  40
  41 #ifdef CONFIG_CPU_SUBTYPE_SH7724
  42 #define RAM_BASE 0xfd800000 /* RSMEM */
  43 #else
  44 #define RAM_BASE 0xe5200000 /* ILRAM */
  45 #endif
  46
  47 void sh_mobile_call_standby(unsigned long mode)
  48 {
  49         void *onchip_mem = (void *)RAM_BASE;
  50         struct sh_sleep_data *sdp = onchip_mem;
  51         void (*standby_onchip_mem)(unsigned long, unsigned long);
  52
  53         /* code located directly after data structure */
  54         standby_onchip_mem = (void *)(sdp + 1);
  55
  56         atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
  57                                    mode, NULL);
  58
  59         /* flush the caches if MMU flag is set */
  60         if (mode & SUSP_SH_MMU)
  61                 flush_cache_all();
  62
  63         /* Let assembly snippet in on-chip memory handle the rest */
  64         standby_onchip_mem(mode, RAM_BASE);
  65
  66         atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
  67                                    mode, NULL);
  68 }
  69
  70 extern char sh_mobile_sleep_enter_start;
  71 extern char sh_mobile_sleep_enter_end;
  72
  73 extern char sh_mobile_sleep_resume_start;
  74 extern char sh_mobile_sleep_resume_end;
  75
  76 unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
  77
  78 void sh_mobile_register_self_refresh(unsigned long flags,
  79                                      void *pre_start, void *pre_end,
  80                                      void *post_start, void *post_end)
  81 {
  82         void *onchip_mem = (void *)RAM_BASE;
  83         void *vp;
  84         struct sh_sleep_data *sdp;
  85         int n;
  86
  87         /* part 0: data area */
  88         sdp = onchip_mem;
  89         sdp->addr.stbcr = 0xa4150020; /* STBCR */
  90         sdp->addr.bar = 0xa4150040; /* BAR */
  91         sdp->addr.pteh = 0xff000000; /* PTEH */
  92         sdp->addr.ptel = 0xff000004; /* PTEL */
  93         sdp->addr.ttb = 0xff000008; /* TTB */
  94         sdp->addr.tea = 0xff00000c; /* TEA */
  95         sdp->addr.mmucr = 0xff000010; /* MMUCR */
  96         sdp->addr.ptea = 0xff000034; /* PTEA */
  97         sdp->addr.pascr = 0xff000070; /* PASCR */
  98         sdp->addr.irmcr = 0xff000078; /* IRMCR */
  99         sdp->addr.ccr = 0xff00001c; /* CCR */
 100         sdp->addr.ramcr = 0xff000074; /* RAMCR */
 101         vp = sdp + 1;
 102
 103         /* part 1: common code to enter sleep mode */
 104         n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
 105         memcpy(vp, &sh_mobile_sleep_enter_start, n);
 106         vp += roundup(n, 4);
 107
 108         /* part 2: board specific code to enter self-refresh mode */
 109         n = pre_end - pre_start;
 110         memcpy(vp, pre_start, n);
 111         sdp->sf_pre = (unsigned long)vp;
 112         vp += roundup(n, 4);
 113
 114         /* part 3: board specific code to resume from self-refresh mode */
 115         n = post_end - post_start;
 116         memcpy(vp, post_start, n);
 117         sdp->sf_post = (unsigned long)vp;
 118         vp += roundup(n, 4);
 119
 120         /* part 4: common code to resume from sleep mode */
 121         WARN_ON(vp > (onchip_mem + 0x600));
 122         vp = onchip_mem + 0x600; /* located at interrupt vector */
 123         n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
 124         memcpy(vp, &sh_mobile_sleep_resume_start, n);
 125         sdp->resume = (unsigned long)vp;
 126
 127         sh_mobile_sleep_supported |= flags;
 128 }
 129
 130 static int sh_pm_enter(suspend_state_t state)
 131 {
 132         if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
 133                 return -ENXIO;
 134
 135         local_irq_disable();
 136         set_bl_bit();
 137         sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
 138         local_irq_disable();
 139         clear_bl_bit();
 140         return 0;
 141 }
 142
 143 static struct platform_suspend_ops sh_pm_ops = {
 144         .enter          = sh_pm_enter,
 145         .valid          = suspend_valid_only_mem,
 146 };
 147
 148 static int __init sh_pm_init(void)
 149 {
 150         suspend_set_ops(&sh_pm_ops);
 151         sh_mobile_setup_cpuidle();
 152         return 0;
 153 }
 154
 155 late_initcall(sh_pm_init);