Staging: comedi: hwdrv_apci2032.c: static sparse fix
[linux/fpc-iii.git] / arch / arm / mach-msm / clock.h
blobf875e1544e5feacfbacf165ade0d29b48667c7ea
1 /* arch/arm/mach-msm/clock.h
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
18 #define __ARCH_ARM_MACH_MSM_CLOCK_H
20 #include <linux/list.h>
22 #define CLKFLAG_INVERT 0x00000001
23 #define CLKFLAG_NOINVERT 0x00000002
24 #define CLKFLAG_NONEST 0x00000004
25 #define CLKFLAG_NORESET 0x00000008
27 #define CLK_FIRST_AVAILABLE_FLAG 0x00000100
28 #define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200
29 #define CLKFLAG_AUTO_OFF 0x00000400
31 struct clk {
32 uint32_t id;
33 uint32_t count;
34 uint32_t flags;
35 const char *name;
36 struct list_head list;
37 struct device *dev;
40 #define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
41 #define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
42 #define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
44 extern struct clk msm_clocks[];
45 extern unsigned msm_num_clocks;
47 #endif