| blob | 52106d53271c3c2b99bede6ffd68f7e0958ab59c |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
20 #include <asm/page.h>
22 /*
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
25 */
26 SP_PTREGS = STACK_FRAME_OVERHEAD
27 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
31 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
32 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
33 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
34 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
35 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
36 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
37 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
38 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
47 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
48 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
50 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
53 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
55 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING)
57 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
58 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
60 #define BASED(name) name-system_call(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 basr %r2,%r0
65 brasl %r14,trace_hardirqs_on_caller
66 .endm
68 .macro TRACE_IRQS_OFF
69 basr %r2,%r0
70 brasl %r14,trace_hardirqs_off_caller
71 .endm
73 .macro TRACE_IRQS_CHECK
74 basr %r2,%r0
75 tm SP_PSW(%r15),0x03 # irqs enabled?
76 jz 0f
77 brasl %r14,trace_hardirqs_on_caller
78 j 1f
79 0: brasl %r14,trace_hardirqs_off_caller
80 1:
81 .endm
82 #else
83 #define TRACE_IRQS_ON
84 #define TRACE_IRQS_OFF
85 #define TRACE_IRQS_CHECK
86 #endif
88 #ifdef CONFIG_LOCKDEP
89 .macro LOCKDEP_SYS_EXIT
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
91 jz 0f
92 brasl %r14,lockdep_sys_exit
93 0:
94 .endm
95 #else
96 #define LOCKDEP_SYS_EXIT
97 #endif
99 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
100 lg %r10,\lc_from
101 slg %r10,\lc_to
102 alg %r10,\lc_sum
103 stg %r10,\lc_sum
104 .endm
106 /*
107 * Register usage in interrupt handlers:
108 * R9 - pointer to current task structure
109 * R13 - pointer to literal pool
110 * R14 - return register for function calls
111 * R15 - kernel stack pointer
112 */
114 .macro SAVE_ALL_BASE savearea
115 stmg %r12,%r15,\savearea
116 larl %r13,system_call
117 .endm
119 .macro SAVE_ALL_SVC psworg,savearea
120 la %r12,\psworg
121 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
122 .endm
124 .macro SAVE_ALL_SYNC psworg,savearea
125 la %r12,\psworg
126 tm \psworg+1,0x01 # test problem state bit
127 jz 2f # skip stack setup save
128 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
129 #ifdef CONFIG_CHECK_STACK
130 j 3f
131 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
132 jz stack_overflow
133 3:
134 #endif
135 2:
136 .endm
138 .macro SAVE_ALL_ASYNC psworg,savearea
139 la %r12,\psworg
140 tm \psworg+1,0x01 # test problem state bit
141 jnz 1f # from user -> load kernel stack
142 clc \psworg+8(8),BASED(.Lcritical_end)
143 jhe 0f
144 clc \psworg+8(8),BASED(.Lcritical_start)
145 jl 0f
146 brasl %r14,cleanup_critical
147 tm 1(%r12),0x01 # retest problem state after cleanup
148 jnz 1f
149 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
150 slgr %r14,%r15
151 srag %r14,%r14,STACK_SHIFT
152 jz 2f
153 1: lg %r15,__LC_ASYNC_STACK # load async stack
154 #ifdef CONFIG_CHECK_STACK
155 j 3f
156 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
157 jz stack_overflow
158 3:
159 #endif
160 2:
161 .endm
163 .macro CREATE_STACK_FRAME psworg,savearea
164 aghi %r15,-SP_SIZE # make room for registers & psw
165 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
166 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
167 icm %r12,3,__LC_SVC_ILC
168 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
169 st %r12,SP_SVCNR(%r15)
170 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
171 la %r12,0
172 stg %r12,__SF_BACKCHAIN(%r15)
173 .endm
175 .macro RESTORE_ALL psworg,sync
176 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
177 .if !\sync
178 ni \psworg+1,0xfd # clear wait state bit
179 .endif
180 lg %r14,__LC_VDSO_PER_CPU
181 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
182 stpt __LC_EXIT_TIMER
183 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
184 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
185 lpswe \psworg # back to caller
186 .endm
188 /*
189 * Scheduler resume function, called by switch_to
190 * gpr2 = (task_struct *) prev
191 * gpr3 = (task_struct *) next
192 * Returns:
193 * gpr2 = prev
194 */
195 .globl __switch_to
196 __switch_to:
197 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
198 jz __switch_to_noper # if not we're fine
199 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
200 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
201 je __switch_to_noper # we got away without bashing TLB's
202 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
203 __switch_to_noper:
204 lg %r4,__THREAD_info(%r2) # get thread_info of prev
205 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
206 jz __switch_to_no_mcck
207 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
208 lg %r4,__THREAD_info(%r3) # get thread_info of next
209 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
210 __switch_to_no_mcck:
211 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
212 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
213 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
214 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
215 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
216 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
217 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
218 stg %r3,__LC_THREAD_INFO
219 aghi %r3,STACK_SIZE
220 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
221 br %r14
223 __critical_start:
224 /*
225 * SVC interrupt handler routine. System calls are synchronous events and
226 * are executed with interrupts enabled.
227 */
229 .globl system_call
230 system_call:
231 stpt __LC_SYNC_ENTER_TIMER
232 sysc_saveall:
233 SAVE_ALL_BASE __LC_SAVE_AREA
234 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
235 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
236 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
237 sysc_vtime:
238 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
239 sysc_stime:
240 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
241 sysc_update:
242 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
243 sysc_do_svc:
244 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
245 ltgr %r7,%r7 # test for svc 0
246 jnz sysc_nr_ok
247 # svc 0: system call number in %r1
248 cl %r1,BASED(.Lnr_syscalls)
249 jnl sysc_nr_ok
250 lgfr %r7,%r1 # clear high word in r1
251 sysc_nr_ok:
252 mvc SP_ARGS(8,%r15),SP_R7(%r15)
253 sysc_do_restart:
254 sth %r7,SP_SVCNR(%r15)
255 sllg %r7,%r7,2 # svc number * 4
256 larl %r10,sys_call_table
257 #ifdef CONFIG_COMPAT
258 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
259 jno sysc_noemu
260 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
261 sysc_noemu:
262 #endif
263 tm __TI_flags+6(%r9),_TIF_SYSCALL
264 lgf %r8,0(%r7,%r10) # load address of system call routine
265 jnz sysc_tracesys
266 basr %r14,%r8 # call sys_xxxx
267 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
269 sysc_return:
270 tm __TI_flags+7(%r9),_TIF_WORK_SVC
271 jnz sysc_work # there is work to do (signals etc.)
272 sysc_restore:
273 #ifdef CONFIG_TRACE_IRQFLAGS
274 larl %r1,sysc_restore_trace_psw
275 lpswe 0(%r1)
276 sysc_restore_trace:
277 TRACE_IRQS_CHECK
278 LOCKDEP_SYS_EXIT
279 #endif
280 sysc_leave:
281 RESTORE_ALL __LC_RETURN_PSW,1
282 sysc_done:
284 #ifdef CONFIG_TRACE_IRQFLAGS
285 .section .data,"aw",@progbits
286 .align 8
287 .globl sysc_restore_trace_psw
288 sysc_restore_trace_psw:
289 .quad 0, sysc_restore_trace
290 .previous
291 #endif
293 #
294 # recheck if there is more work to do
295 #
296 sysc_work_loop:
297 tm __TI_flags+7(%r9),_TIF_WORK_SVC
298 jz sysc_restore # there is no work to do
299 #
300 # One of the work bits is on. Find out which one.
301 #
302 sysc_work:
303 tm SP_PSW+1(%r15),0x01 # returning to user ?
304 jno sysc_restore
305 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
306 jo sysc_mcck_pending
307 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
308 jo sysc_reschedule
309 tm __TI_flags+7(%r9),_TIF_SIGPENDING
310 jnz sysc_sigpending
311 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
312 jnz sysc_notify_resume
313 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
314 jo sysc_restart
315 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
316 jo sysc_singlestep
317 j sysc_restore
318 sysc_work_done:
320 #
321 # _TIF_NEED_RESCHED is set, call schedule
322 #
323 sysc_reschedule:
324 larl %r14,sysc_work_loop
325 jg schedule # return point is sysc_return
327 #
328 # _TIF_MCCK_PENDING is set, call handler
329 #
330 sysc_mcck_pending:
331 larl %r14,sysc_work_loop
332 jg s390_handle_mcck # TIF bit will be cleared by handler
334 #
335 # _TIF_SIGPENDING is set, call do_signal
336 #
337 sysc_sigpending:
338 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
339 la %r2,SP_PTREGS(%r15) # load pt_regs
340 brasl %r14,do_signal # call do_signal
341 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
342 jo sysc_restart
343 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
344 jo sysc_singlestep
345 j sysc_work_loop
347 #
348 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
349 #
350 sysc_notify_resume:
351 la %r2,SP_PTREGS(%r15) # load pt_regs
352 larl %r14,sysc_work_loop
353 jg do_notify_resume # call do_notify_resume
355 #
356 # _TIF_RESTART_SVC is set, set up registers and restart svc
357 #
358 sysc_restart:
359 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
360 lg %r7,SP_R2(%r15) # load new svc number
361 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
362 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
363 j sysc_do_restart # restart svc
365 #
366 # _TIF_SINGLE_STEP is set, call do_single_step
367 #
368 sysc_singlestep:
369 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
370 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
371 la %r2,SP_PTREGS(%r15) # address of register-save area
372 larl %r14,sysc_return # load adr. of system return
373 jg do_single_step # branch to do_sigtrap
375 #
376 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
377 # and after the system call
378 #
379 sysc_tracesys:
380 la %r2,SP_PTREGS(%r15) # load pt_regs
381 la %r3,0
382 srl %r7,2
383 stg %r7,SP_R2(%r15)
384 brasl %r14,do_syscall_trace_enter
385 lghi %r0,NR_syscalls
386 clgr %r0,%r2
387 jnh sysc_tracenogo
388 sllg %r7,%r2,2 # svc number *4
389 lgf %r8,0(%r7,%r10)
390 sysc_tracego:
391 lmg %r3,%r6,SP_R3(%r15)
392 lg %r2,SP_ORIG_R2(%r15)
393 basr %r14,%r8 # call sys_xxx
394 stg %r2,SP_R2(%r15) # store return value
395 sysc_tracenogo:
396 tm __TI_flags+6(%r9),_TIF_SYSCALL
397 jz sysc_return
398 la %r2,SP_PTREGS(%r15) # load pt_regs
399 larl %r14,sysc_return # return point is sysc_return
400 jg do_syscall_trace_exit
402 #
403 # a new process exits the kernel with ret_from_fork
404 #
405 .globl ret_from_fork
406 ret_from_fork:
407 lg %r13,__LC_SVC_NEW_PSW+8
408 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
409 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
410 jo 0f
411 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
412 0: brasl %r14,schedule_tail
413 TRACE_IRQS_ON
414 stosm 24(%r15),0x03 # reenable interrupts
415 j sysc_tracenogo
417 #
418 # kernel_execve function needs to deal with pt_regs that is not
419 # at the usual place
420 #
421 .globl kernel_execve
422 kernel_execve:
423 stmg %r12,%r15,96(%r15)
424 lgr %r14,%r15
425 aghi %r15,-SP_SIZE
426 stg %r14,__SF_BACKCHAIN(%r15)
427 la %r12,SP_PTREGS(%r15)
428 xc 0(__PT_SIZE,%r12),0(%r12)
429 lgr %r5,%r12
430 brasl %r14,do_execve
431 ltgfr %r2,%r2
432 je 0f
433 aghi %r15,SP_SIZE
434 lmg %r12,%r15,96(%r15)
435 br %r14
436 # execve succeeded.
437 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
438 lg %r15,__LC_KERNEL_STACK # load ksp
439 aghi %r15,-SP_SIZE # make room for registers & psw
440 lg %r13,__LC_SVC_NEW_PSW+8
441 lg %r9,__LC_THREAD_INFO
442 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
443 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
444 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
445 brasl %r14,execve_tail
446 j sysc_return
448 /*
449 * Program check handler routine
450 */
452 .globl pgm_check_handler
453 pgm_check_handler:
454 /*
455 * First we need to check for a special case:
456 * Single stepping an instruction that disables the PER event mask will
457 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
458 * For a single stepped SVC the program check handler gets control after
459 * the SVC new PSW has been loaded. But we want to execute the SVC first and
460 * then handle the PER event. Therefore we update the SVC old PSW to point
461 * to the pgm_check_handler and branch to the SVC handler after we checked
462 * if we have to load the kernel stack register.
463 * For every other possible cause for PER event without the PER mask set
464 * we just ignore the PER event (FIXME: is there anything we have to do
465 * for LPSW?).
466 */
467 stpt __LC_SYNC_ENTER_TIMER
468 SAVE_ALL_BASE __LC_SAVE_AREA
469 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
470 jnz pgm_per # got per exception -> special case
471 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
472 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
473 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
474 jz pgm_no_vtime
475 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
476 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
477 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
478 pgm_no_vtime:
479 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
480 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
481 TRACE_IRQS_OFF
482 lgf %r3,__LC_PGM_ILC # load program interruption code
483 lghi %r8,0x7f
484 ngr %r8,%r3
485 pgm_do_call:
486 sll %r8,3
487 larl %r1,pgm_check_table
488 lg %r1,0(%r8,%r1) # load address of handler routine
489 la %r2,SP_PTREGS(%r15) # address of register-save area
490 larl %r14,sysc_return
491 br %r1 # branch to interrupt-handler
493 #
494 # handle per exception
495 #
496 pgm_per:
497 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
498 jnz pgm_per_std # ok, normal per event from user space
499 # ok its one of the special cases, now we need to find out which one
500 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
501 je pgm_svcper
502 # no interesting special case, ignore PER event
503 lmg %r12,%r15,__LC_SAVE_AREA
504 lpswe __LC_PGM_OLD_PSW
506 #
507 # Normal per exception
508 #
509 pgm_per_std:
510 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
511 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
512 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
513 jz pgm_no_vtime2
514 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
515 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
516 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
517 pgm_no_vtime2:
518 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
519 TRACE_IRQS_OFF
520 lg %r1,__TI_task(%r9)
521 tm SP_PSW+1(%r15),0x01 # kernel per event ?
522 jz kernel_per
523 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
524 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
525 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
526 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
527 lgf %r3,__LC_PGM_ILC # load program interruption code
528 lghi %r8,0x7f
529 ngr %r8,%r3 # clear per-event-bit and ilc
530 je sysc_return
531 j pgm_do_call
533 #
534 # it was a single stepped SVC that is causing all the trouble
535 #
536 pgm_svcper:
537 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
538 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
539 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
540 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
541 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
542 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
543 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
544 lg %r8,__TI_task(%r9)
545 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
546 mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
547 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
548 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
549 TRACE_IRQS_ON
550 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
551 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
552 j sysc_do_svc
554 #
555 # per was called from kernel, must be kprobes
556 #
557 kernel_per:
558 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
559 la %r2,SP_PTREGS(%r15) # address of register-save area
560 larl %r14,sysc_restore # load adr. of system ret, no work
561 jg do_single_step # branch to do_single_step
563 /*
564 * IO interrupt handler routine
565 */
566 .globl io_int_handler
567 io_int_handler:
568 stck __LC_INT_CLOCK
569 stpt __LC_ASYNC_ENTER_TIMER
570 SAVE_ALL_BASE __LC_SAVE_AREA+32
571 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
572 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
573 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
574 jz io_no_vtime
575 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
576 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
577 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
578 io_no_vtime:
579 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
580 TRACE_IRQS_OFF
581 la %r2,SP_PTREGS(%r15) # address of register-save area
582 brasl %r14,do_IRQ # call standard irq handler
583 io_return:
584 tm __TI_flags+7(%r9),_TIF_WORK_INT
585 jnz io_work # there is work to do (signals etc.)
586 io_restore:
587 #ifdef CONFIG_TRACE_IRQFLAGS
588 larl %r1,io_restore_trace_psw
589 lpswe 0(%r1)
590 io_restore_trace:
591 TRACE_IRQS_CHECK
592 LOCKDEP_SYS_EXIT
593 #endif
594 io_leave:
595 RESTORE_ALL __LC_RETURN_PSW,0
596 io_done:
598 #ifdef CONFIG_TRACE_IRQFLAGS
599 .section .data,"aw",@progbits
600 .align 8
601 .globl io_restore_trace_psw
602 io_restore_trace_psw:
603 .quad 0, io_restore_trace
604 .previous
605 #endif
607 #
608 # There is work todo, we need to check if we return to userspace, then
609 # check, if we are in SIE, if yes leave it
610 #
611 io_work:
612 tm SP_PSW+1(%r15),0x01 # returning to user ?
613 #ifndef CONFIG_PREEMPT
614 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
615 jnz io_work_user # yes -> no need to check for SIE
616 la %r1, BASED(sie_opcode) # we return to kernel here
617 lg %r2, SP_PSW+8(%r15)
618 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
619 jne io_restore # no-> return to kernel
620 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
621 aghi %r1, 4
622 stg %r1, SP_PSW+8(%r15)
623 j io_restore # return to kernel
624 #else
625 jno io_restore # no-> skip resched & signal
626 #endif
627 #else
628 jnz io_work_user # yes -> do resched & signal
629 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
630 la %r1, BASED(sie_opcode)
631 lg %r2, SP_PSW+8(%r15)
632 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
633 jne 0f # no -> leave PSW alone
634 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
635 aghi %r1, 4
636 stg %r1, SP_PSW+8(%r15)
637 0:
638 #endif
639 # check for preemptive scheduling
640 icm %r0,15,__TI_precount(%r9)
641 jnz io_restore # preemption is disabled
642 # switch to kernel stack
643 lg %r1,SP_R15(%r15)
644 aghi %r1,-SP_SIZE
645 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
646 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
647 lgr %r15,%r1
648 io_resume_loop:
649 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
650 jno io_restore
651 larl %r14,io_resume_loop
652 jg preempt_schedule_irq
653 #endif
655 io_work_user:
656 lg %r1,__LC_KERNEL_STACK
657 aghi %r1,-SP_SIZE
658 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
659 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
660 lgr %r15,%r1
661 #
662 # One of the work bits is on. Find out which one.
663 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
664 # and _TIF_MCCK_PENDING
665 #
666 io_work_loop:
667 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
668 jo io_mcck_pending
669 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
670 jo io_reschedule
671 tm __TI_flags+7(%r9),_TIF_SIGPENDING
672 jnz io_sigpending
673 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
674 jnz io_notify_resume
675 j io_restore
676 io_work_done:
678 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
679 sie_opcode:
680 .long 0xb2140000
681 #endif
683 #
684 # _TIF_MCCK_PENDING is set, call handler
685 #
686 io_mcck_pending:
687 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
688 j io_work_loop
690 #
691 # _TIF_NEED_RESCHED is set, call schedule
692 #
693 io_reschedule:
694 TRACE_IRQS_ON
695 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
696 brasl %r14,schedule # call scheduler
697 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
698 TRACE_IRQS_OFF
699 tm __TI_flags+7(%r9),_TIF_WORK_INT
700 jz io_restore # there is no work to do
701 j io_work_loop
703 #
704 # _TIF_SIGPENDING or is set, call do_signal
705 #
706 io_sigpending:
707 TRACE_IRQS_ON
708 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
709 la %r2,SP_PTREGS(%r15) # load pt_regs
710 brasl %r14,do_signal # call do_signal
711 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
712 TRACE_IRQS_OFF
713 j io_work_loop
715 #
716 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
717 #
718 io_notify_resume:
719 TRACE_IRQS_ON
720 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
721 la %r2,SP_PTREGS(%r15) # load pt_regs
722 brasl %r14,do_notify_resume # call do_notify_resume
723 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
724 TRACE_IRQS_OFF
725 j io_work_loop
727 /*
728 * External interrupt handler routine
729 */
730 .globl ext_int_handler
731 ext_int_handler:
732 stck __LC_INT_CLOCK
733 stpt __LC_ASYNC_ENTER_TIMER
734 SAVE_ALL_BASE __LC_SAVE_AREA+32
735 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
736 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
737 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
738 jz ext_no_vtime
739 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
740 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
741 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
742 ext_no_vtime:
743 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
744 TRACE_IRQS_OFF
745 la %r2,SP_PTREGS(%r15) # address of register-save area
746 llgh %r3,__LC_EXT_INT_CODE # get interruption code
747 brasl %r14,do_extint
748 j io_return
750 __critical_end:
752 /*
753 * Machine check handler routines
754 */
755 .globl mcck_int_handler
756 mcck_int_handler:
757 stck __LC_INT_CLOCK
758 la %r1,4095 # revalidate r1
759 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
760 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
761 SAVE_ALL_BASE __LC_SAVE_AREA+64
762 la %r12,__LC_MCK_OLD_PSW
763 tm __LC_MCCK_CODE,0x80 # system damage?
764 jo mcck_int_main # yes -> rest of mcck code invalid
765 la %r14,4095
766 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
767 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
768 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
769 jo 1f
770 la %r14,__LC_SYNC_ENTER_TIMER
771 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
772 jl 0f
773 la %r14,__LC_ASYNC_ENTER_TIMER
774 0: clc 0(8,%r14),__LC_EXIT_TIMER
775 jl 0f
776 la %r14,__LC_EXIT_TIMER
777 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
778 jl 0f
779 la %r14,__LC_LAST_UPDATE_TIMER
780 0: spt 0(%r14)
781 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
782 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
783 jno mcck_int_main # no -> skip cleanup critical
784 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
785 jnz mcck_int_main # from user -> load kernel stack
786 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
787 jhe mcck_int_main
788 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
789 jl mcck_int_main
790 brasl %r14,cleanup_critical
791 mcck_int_main:
792 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
793 slgr %r14,%r15
794 srag %r14,%r14,PAGE_SHIFT
795 jz 0f
796 lg %r15,__LC_PANIC_STACK # load panic stack
797 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
798 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
799 jno mcck_no_vtime # no -> no timer update
800 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
801 jz mcck_no_vtime
802 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
803 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
804 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
805 mcck_no_vtime:
806 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
807 la %r2,SP_PTREGS(%r15) # load pt_regs
808 brasl %r14,s390_do_machine_check
809 tm SP_PSW+1(%r15),0x01 # returning to user ?
810 jno mcck_return
811 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
812 aghi %r1,-SP_SIZE
813 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
814 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
815 lgr %r15,%r1
816 stosm __SF_EMPTY(%r15),0x04 # turn dat on
817 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
818 jno mcck_return
819 TRACE_IRQS_OFF
820 brasl %r14,s390_handle_mcck
821 TRACE_IRQS_ON
822 mcck_return:
823 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
824 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
825 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
826 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
827 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
828 jno 0f
829 stpt __LC_EXIT_TIMER
830 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
832 /*
833 * Restart interruption handler, kick starter for additional CPUs
834 */
835 #ifdef CONFIG_SMP
836 __CPUINIT
837 .globl restart_int_handler
838 restart_int_handler:
839 basr %r1,0
840 restart_base:
841 spt restart_vtime-restart_base(%r1)
842 stck __LC_LAST_UPDATE_CLOCK
843 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
844 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
845 lg %r15,__LC_SAVE_AREA+120 # load ksp
846 lghi %r10,__LC_CREGS_SAVE_AREA
847 lctlg %c0,%c15,0(%r10) # get new ctl regs
848 lghi %r10,__LC_AREGS_SAVE_AREA
849 lam %a0,%a15,0(%r10)
850 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
851 lg %r1,__LC_THREAD_INFO
852 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
853 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
854 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
855 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
856 jg start_secondary
857 .align 8
858 restart_vtime:
859 .long 0x7fffffff,0xffffffff
860 .previous
861 #else
862 /*
863 * If we do not run with SMP enabled, let the new CPU crash ...
864 */
865 .globl restart_int_handler
866 restart_int_handler:
867 basr %r1,0
868 restart_base:
869 lpswe restart_crash-restart_base(%r1)
870 .align 8
871 restart_crash:
872 .long 0x000a0000,0x00000000,0x00000000,0x00000000
873 restart_go:
874 #endif
876 #ifdef CONFIG_CHECK_STACK
877 /*
878 * The synchronous or the asynchronous stack overflowed. We are dead.
879 * No need to properly save the registers, we are going to panic anyway.
880 * Setup a pt_regs so that show_trace can provide a good call trace.
881 */
882 stack_overflow:
883 lg %r15,__LC_PANIC_STACK # change to panic stack
884 aghi %r15,-SP_SIZE
885 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
886 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
887 la %r1,__LC_SAVE_AREA
888 chi %r12,__LC_SVC_OLD_PSW
889 je 0f
890 chi %r12,__LC_PGM_OLD_PSW
891 je 0f
892 la %r1,__LC_SAVE_AREA+32
893 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
894 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
895 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
896 la %r2,SP_PTREGS(%r15) # load pt_regs
897 jg kernel_stack_overflow
898 #endif
900 cleanup_table_system_call:
901 .quad system_call, sysc_do_svc
902 cleanup_table_sysc_return:
903 .quad sysc_return, sysc_leave
904 cleanup_table_sysc_leave:
905 .quad sysc_leave, sysc_done
906 cleanup_table_sysc_work_loop:
907 .quad sysc_work_loop, sysc_work_done
908 cleanup_table_io_return:
909 .quad io_return, io_leave
910 cleanup_table_io_leave:
911 .quad io_leave, io_done
912 cleanup_table_io_work_loop:
913 .quad io_work_loop, io_work_done
915 cleanup_critical:
916 clc 8(8,%r12),BASED(cleanup_table_system_call)
917 jl 0f
918 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
919 jl cleanup_system_call
920 0:
921 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
922 jl 0f
923 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
924 jl cleanup_sysc_return
925 0:
926 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
927 jl 0f
928 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
929 jl cleanup_sysc_leave
930 0:
931 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
932 jl 0f
933 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
934 jl cleanup_sysc_return
935 0:
936 clc 8(8,%r12),BASED(cleanup_table_io_return)
937 jl 0f
938 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
939 jl cleanup_io_return
940 0:
941 clc 8(8,%r12),BASED(cleanup_table_io_leave)
942 jl 0f
943 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
944 jl cleanup_io_leave
945 0:
946 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
947 jl 0f
948 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
949 jl cleanup_io_work_loop
950 0:
951 br %r14
953 cleanup_system_call:
954 mvc __LC_RETURN_PSW(16),0(%r12)
955 cghi %r12,__LC_MCK_OLD_PSW
956 je 0f
957 la %r12,__LC_SAVE_AREA+32
958 j 1f
959 0: la %r12,__LC_SAVE_AREA+64
960 1:
961 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
962 jh 0f
963 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
964 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
965 jhe cleanup_vtime
966 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
967 jh 0f
968 mvc __LC_SAVE_AREA(32),0(%r12)
969 0: stg %r13,8(%r12)
970 stg %r12,__LC_SAVE_AREA+96 # argh
971 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
972 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
973 lg %r12,__LC_SAVE_AREA+96 # argh
974 stg %r15,24(%r12)
975 llgh %r7,__LC_SVC_INT_CODE
976 cleanup_vtime:
977 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
978 jhe cleanup_stime
979 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
980 cleanup_stime:
981 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
982 jh cleanup_update
983 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
984 cleanup_update:
985 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
986 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
987 la %r12,__LC_RETURN_PSW
988 br %r14
989 cleanup_system_call_insn:
990 .quad sysc_saveall
991 .quad system_call
992 .quad sysc_vtime
993 .quad sysc_stime
994 .quad sysc_update
996 cleanup_sysc_return:
997 mvc __LC_RETURN_PSW(8),0(%r12)
998 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
999 la %r12,__LC_RETURN_PSW
1000 br %r14
1002 cleanup_sysc_leave:
1003 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
1004 je 3f
1005 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
1006 jhe 0f
1007 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1008 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1009 cghi %r12,__LC_MCK_OLD_PSW
1010 jne 1f
1011 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1012 j 2f
1013 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1014 2: lmg %r0,%r11,SP_R0(%r15)
1015 lg %r15,SP_R15(%r15)
1016 3: la %r12,__LC_RETURN_PSW
1017 br %r14
1018 cleanup_sysc_leave_insn:
1019 .quad sysc_done - 4
1020 .quad sysc_done - 16
1022 cleanup_io_return:
1023 mvc __LC_RETURN_PSW(8),0(%r12)
1024 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_return)
1025 la %r12,__LC_RETURN_PSW
1026 br %r14
1028 cleanup_io_work_loop:
1029 mvc __LC_RETURN_PSW(8),0(%r12)
1030 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1031 la %r12,__LC_RETURN_PSW
1032 br %r14
1034 cleanup_io_leave:
1035 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1036 je 3f
1037 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1038 jhe 0f
1039 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1040 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1041 cghi %r12,__LC_MCK_OLD_PSW
1042 jne 1f
1043 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1044 j 2f
1045 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1046 2: lmg %r0,%r11,SP_R0(%r15)
1047 lg %r15,SP_R15(%r15)
1048 3: la %r12,__LC_RETURN_PSW
1049 br %r14
1050 cleanup_io_leave_insn:
1051 .quad io_done - 4
1052 .quad io_done - 16
1054 /*
1055 * Integer constants
1056 */
1057 .align 4
1058 .Lconst:
1059 .Lnr_syscalls: .long NR_syscalls
1060 .L0x0130: .short 0x130
1061 .L0x0140: .short 0x140
1062 .L0x0150: .short 0x150
1063 .L0x0160: .short 0x160
1064 .L0x0170: .short 0x170
1065 .Lcritical_start:
1066 .quad __critical_start
1067 .Lcritical_end:
1068 .quad __critical_end
1070 .section .rodata, "a"
1071 #define SYSCALL(esa,esame,emu) .long esame
1072 .globl sys_call_table
1073 sys_call_table:
1074 #include "syscalls.S"
1075 #undef SYSCALL
1077 #ifdef CONFIG_COMPAT
1079 #define SYSCALL(esa,esame,emu) .long emu
1080 sys_call_table_emu:
1081 #include "syscalls.S"
1082 #undef SYSCALL
1083 #endif