| blob | 37c3d4b17d859d6ee38029a83f2abcaee6d4dc05 |
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
25 /* Physical address */
26 #define pa(X) ((X) - __PAGE_OFFSET)
28 /*
29 * References to members of the new_cpu_data structure.
30 */
32 #define X86 new_cpu_data+CPUINFO_x86
33 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
34 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
35 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
36 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
37 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
38 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
39 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
41 /*
42 * This is how much memory in addition to the memory covered up to
43 * and including _end we need mapped initially.
44 * We need:
45 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
46 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
47 *
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
50 *
51 * This should be a multiple of a page.
52 *
53 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
54 * and small than max_low_pfn, otherwise will waste some page table entries
55 */
57 #if PTRS_PER_PMD > 1
58 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
59 #else
60 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
61 #endif
63 /* Enough space to fit pagetables for the low memory linear map */
64 MAPPING_BEYOND_END = \
65 PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
67 /*
68 * Worst-case size of the kernel mapping we need to make:
69 * the worst-case size of the kernel itself, plus the extra we need
70 * to map for the linear map.
71 */
72 KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
74 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
75 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
77 /*
78 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
79 * %esi points to the real-mode code as a 32-bit pointer.
80 * CS and DS must be 4 GB flat segments, but we don't depend on
81 * any particular GDT layout, because we load our own as soon as we
82 * can.
83 */
84 __HEAD
85 ENTRY(startup_32)
86 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
87 us to not reload segments */
88 testb $(1<<6), BP_loadflags(%esi)
89 jnz 2f
91 /*
92 * Set segments to known values.
93 */
94 lgdt pa(boot_gdt_descr)
95 movl $(__BOOT_DS),%eax
96 movl %eax,%ds
97 movl %eax,%es
98 movl %eax,%fs
99 movl %eax,%gs
100 2:
102 /*
103 * Clear BSS first so that there are no surprises...
104 */
105 cld
106 xorl %eax,%eax
107 movl $pa(__bss_start),%edi
108 movl $pa(__bss_stop),%ecx
109 subl %edi,%ecx
110 shrl $2,%ecx
111 rep ; stosl
112 /*
113 * Copy bootup parameters out of the way.
114 * Note: %esi still has the pointer to the real-mode data.
115 * With the kexec as boot loader, parameter segment might be loaded beyond
116 * kernel image and might not even be addressable by early boot page tables.
117 * (kexec on panic case). Hence copy out the parameters before initializing
118 * page tables.
119 */
120 movl $pa(boot_params),%edi
121 movl $(PARAM_SIZE/4),%ecx
122 cld
123 rep
124 movsl
125 movl pa(boot_params) + NEW_CL_POINTER,%esi
126 andl %esi,%esi
127 jz 1f # No comand line
128 movl $pa(boot_command_line),%edi
129 movl $(COMMAND_LINE_SIZE/4),%ecx
130 rep
131 movsl
132 1:
134 #ifdef CONFIG_PARAVIRT
135 /* This is can only trip for a broken bootloader... */
136 cmpw $0x207, pa(boot_params + BP_version)
137 jb default_entry
139 /* Paravirt-compatible boot parameters. Look to see what architecture
140 we're booting under. */
141 movl pa(boot_params + BP_hardware_subarch), %eax
142 cmpl $num_subarch_entries, %eax
143 jae bad_subarch
145 movl pa(subarch_entries)(,%eax,4), %eax
146 subl $__PAGE_OFFSET, %eax
147 jmp *%eax
149 bad_subarch:
150 WEAK(lguest_entry)
151 WEAK(xen_entry)
152 /* Unknown implementation; there's really
153 nothing we can do at this point. */
154 ud2a
156 __INITDATA
158 subarch_entries:
159 .long default_entry /* normal x86/PC */
160 .long lguest_entry /* lguest hypervisor */
161 .long xen_entry /* Xen hypervisor */
162 .long default_entry /* Moorestown MID */
163 num_subarch_entries = (. - subarch_entries) / 4
164 .previous
165 #endif /* CONFIG_PARAVIRT */
167 /*
168 * Initialize page tables. This creates a PDE and a set of page
169 * tables, which are located immediately beyond __brk_base. The variable
170 * _brk_end is set up to point to the first "safe" location.
171 * Mappings are created both at virtual address 0 (identity mapping)
172 * and PAGE_OFFSET for up to _end.
173 *
174 * Note that the stack is not yet set up!
175 */
176 default_entry:
177 #ifdef CONFIG_X86_PAE
179 /*
180 * In PAE mode swapper_pg_dir is statically defined to contain enough
181 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
182 * entries). The identity mapping is handled by pointing two PGD
183 * entries to the first kernel PMD.
184 *
185 * Note the upper half of each PMD or PTE are always zero at
186 * this stage.
187 */
189 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
191 xorl %ebx,%ebx /* %ebx is kept at zero */
193 movl $pa(__brk_base), %edi
194 movl $pa(swapper_pg_pmd), %edx
195 movl $PTE_IDENT_ATTR, %eax
196 10:
197 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
198 movl %ecx,(%edx) /* Store PMD entry */
199 /* Upper half already zero */
200 addl $8,%edx
201 movl $512,%ecx
202 11:
203 stosl
204 xchgl %eax,%ebx
205 stosl
206 xchgl %eax,%ebx
207 addl $0x1000,%eax
208 loop 11b
210 /*
211 * End condition: we must map up to the end + MAPPING_BEYOND_END.
212 */
213 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
214 cmpl %ebp,%eax
215 jb 10b
216 1:
217 addl $__PAGE_OFFSET, %edi
218 movl %edi, pa(_brk_end)
219 shrl $12, %eax
220 movl %eax, pa(max_pfn_mapped)
222 /* Do early initialization of the fixmap area */
223 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
224 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
225 #else /* Not PAE */
227 page_pde_offset = (__PAGE_OFFSET >> 20);
229 movl $pa(__brk_base), %edi
230 movl $pa(swapper_pg_dir), %edx
231 movl $PTE_IDENT_ATTR, %eax
232 10:
233 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
234 movl %ecx,(%edx) /* Store identity PDE entry */
235 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
236 addl $4,%edx
237 movl $1024, %ecx
238 11:
239 stosl
240 addl $0x1000,%eax
241 loop 11b
242 /*
243 * End condition: we must map up to the end + MAPPING_BEYOND_END.
244 */
245 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
246 cmpl %ebp,%eax
247 jb 10b
248 addl $__PAGE_OFFSET, %edi
249 movl %edi, pa(_brk_end)
250 shrl $12, %eax
251 movl %eax, pa(max_pfn_mapped)
253 /* Do early initialization of the fixmap area */
254 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
255 movl %eax,pa(swapper_pg_dir+0xffc)
256 #endif
257 jmp 3f
258 /*
259 * Non-boot CPU entry point; entered from trampoline.S
260 * We can't lgdt here, because lgdt itself uses a data segment, but
261 * we know the trampoline has already loaded the boot_gdt for us.
262 *
263 * If cpu hotplug is not supported then this code can go in init section
264 * which will be freed later
265 */
267 __CPUINIT
269 #ifdef CONFIG_SMP
270 ENTRY(startup_32_smp)
271 cld
272 movl $(__BOOT_DS),%eax
273 movl %eax,%ds
274 movl %eax,%es
275 movl %eax,%fs
276 movl %eax,%gs
277 #endif /* CONFIG_SMP */
278 3:
280 /*
281 * New page tables may be in 4Mbyte page mode and may
282 * be using the global pages.
283 *
284 * NOTE! If we are on a 486 we may have no cr4 at all!
285 * So we do not try to touch it unless we really have
286 * some bits in it to set. This won't work if the BSP
287 * implements cr4 but this AP does not -- very unlikely
288 * but be warned! The same applies to the pse feature
289 * if not equally supported. --macro
290 *
291 * NOTE! We have to correct for the fact that we're
292 * not yet offset PAGE_OFFSET..
293 */
294 #define cr4_bits pa(mmu_cr4_features)
295 movl cr4_bits,%edx
296 andl %edx,%edx
297 jz 6f
298 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
299 orl %edx,%eax
300 movl %eax,%cr4
302 testb $X86_CR4_PAE, %al # check if PAE is enabled
303 jz 6f
305 /* Check if extended functions are implemented */
306 movl $0x80000000, %eax
307 cpuid
308 /* Value must be in the range 0x80000001 to 0x8000ffff */
309 subl $0x80000001, %eax
310 cmpl $(0x8000ffff-0x80000001), %eax
311 ja 6f
312 mov $0x80000001, %eax
313 cpuid
314 /* Execute Disable bit supported? */
315 btl $(X86_FEATURE_NX & 31), %edx
316 jnc 6f
318 /* Setup EFER (Extended Feature Enable Register) */
319 movl $MSR_EFER, %ecx
320 rdmsr
322 btsl $_EFER_NX, %eax
323 /* Make changes effective */
324 wrmsr
326 6:
328 /*
329 * Enable paging
330 */
331 movl $pa(swapper_pg_dir),%eax
332 movl %eax,%cr3 /* set the page table pointer.. */
333 movl %cr0,%eax
334 orl $X86_CR0_PG,%eax
335 movl %eax,%cr0 /* ..and set paging (PG) bit */
336 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
337 1:
338 /* Set up the stack pointer */
339 lss stack_start,%esp
341 /*
342 * Initialize eflags. Some BIOS's leave bits like NT set. This would
343 * confuse the debugger if this code is traced.
344 * XXX - best to initialize before switching to protected mode.
345 */
346 pushl $0
347 popfl
349 #ifdef CONFIG_SMP
350 cmpb $0, ready
351 jz 1f /* Initial CPU cleans BSS */
352 jmp checkCPUtype
353 1:
354 #endif /* CONFIG_SMP */
356 /*
357 * start system 32-bit setup. We need to re-do some of the things done
358 * in 16-bit mode for the "real" operations.
359 */
360 call setup_idt
362 checkCPUtype:
364 movl $-1,X86_CPUID # -1 for no CPUID initially
366 /* check if it is 486 or 386. */
367 /*
368 * XXX - this does a lot of unnecessary setup. Alignment checks don't
369 * apply at our cpl of 0 and the stack ought to be aligned already, and
370 * we don't need to preserve eflags.
371 */
373 movb $3,X86 # at least 386
374 pushfl # push EFLAGS
375 popl %eax # get EFLAGS
376 movl %eax,%ecx # save original EFLAGS
377 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
378 pushl %eax # copy to EFLAGS
379 popfl # set EFLAGS
380 pushfl # get new EFLAGS
381 popl %eax # put it in eax
382 xorl %ecx,%eax # change in flags
383 pushl %ecx # restore original EFLAGS
384 popfl
385 testl $0x40000,%eax # check if AC bit changed
386 je is386
388 movb $4,X86 # at least 486
389 testl $0x200000,%eax # check if ID bit changed
390 je is486
392 /* get vendor info */
393 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
394 cpuid
395 movl %eax,X86_CPUID # save CPUID level
396 movl %ebx,X86_VENDOR_ID # lo 4 chars
397 movl %edx,X86_VENDOR_ID+4 # next 4 chars
398 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
400 orl %eax,%eax # do we have processor info as well?
401 je is486
403 movl $1,%eax # Use the CPUID instruction to get CPU type
404 cpuid
405 movb %al,%cl # save reg for future use
406 andb $0x0f,%ah # mask processor family
407 movb %ah,X86
408 andb $0xf0,%al # mask model
409 shrb $4,%al
410 movb %al,X86_MODEL
411 andb $0x0f,%cl # mask mask revision
412 movb %cl,X86_MASK
413 movl %edx,X86_CAPABILITY
415 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
416 jmp 2f
418 is386: movl $2,%ecx # set MP
419 2: movl %cr0,%eax
420 andl $0x80000011,%eax # Save PG,PE,ET
421 orl %ecx,%eax
422 movl %eax,%cr0
424 call check_x87
425 lgdt early_gdt_descr
426 lidt idt_descr
427 ljmp $(__KERNEL_CS),$1f
428 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
429 movl %eax,%ss # after changing gdt.
431 movl $(__USER_DS),%eax # DS/ES contains default USER segment
432 movl %eax,%ds
433 movl %eax,%es
435 movl $(__KERNEL_PERCPU), %eax
436 movl %eax,%fs # set this cpu's percpu
438 #ifdef CONFIG_CC_STACKPROTECTOR
439 /*
440 * The linker can't handle this by relocation. Manually set
441 * base address in stack canary segment descriptor.
442 */
443 cmpb $0,ready
444 jne 1f
445 movl $gdt_page,%eax
446 movl $stack_canary,%ecx
447 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
448 shrl $16, %ecx
449 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
450 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
451 1:
452 #endif
453 movl $(__KERNEL_STACK_CANARY),%eax
454 movl %eax,%gs
456 xorl %eax,%eax # Clear LDT
457 lldt %ax
459 cld # gcc2 wants the direction flag cleared at all times
460 pushl $0 # fake return address for unwinder
461 #ifdef CONFIG_SMP
462 movb ready, %cl
463 movb $1, ready
464 cmpb $0,%cl # the first CPU calls start_kernel
465 je 1f
466 movl (stack_start), %esp
467 1:
468 #endif /* CONFIG_SMP */
469 jmp *(initial_code)
471 /*
472 * We depend on ET to be correct. This checks for 287/387.
473 */
474 check_x87:
475 movb $0,X86_HARD_MATH
476 clts
477 fninit
478 fstsw %ax
479 cmpb $0,%al
480 je 1f
481 movl %cr0,%eax /* no coprocessor: have to set bits */
482 xorl $4,%eax /* set EM */
483 movl %eax,%cr0
484 ret
485 ALIGN
486 1: movb $1,X86_HARD_MATH
487 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
488 ret
490 /*
491 * setup_idt
492 *
493 * sets up a idt with 256 entries pointing to
494 * ignore_int, interrupt gates. It doesn't actually load
495 * idt - that can be done only after paging has been enabled
496 * and the kernel moved to PAGE_OFFSET. Interrupts
497 * are enabled elsewhere, when we can be relatively
498 * sure everything is ok.
499 *
500 * Warning: %esi is live across this function.
501 */
502 setup_idt:
503 lea ignore_int,%edx
504 movl $(__KERNEL_CS << 16),%eax
505 movw %dx,%ax /* selector = 0x0010 = cs */
506 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
508 lea idt_table,%edi
509 mov $256,%ecx
510 rp_sidt:
511 movl %eax,(%edi)
512 movl %edx,4(%edi)
513 addl $8,%edi
514 dec %ecx
515 jne rp_sidt
517 .macro set_early_handler handler,trapno
518 lea \handler,%edx
519 movl $(__KERNEL_CS << 16),%eax
520 movw %dx,%ax
521 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
522 lea idt_table,%edi
523 movl %eax,8*\trapno(%edi)
524 movl %edx,8*\trapno+4(%edi)
525 .endm
527 set_early_handler handler=early_divide_err,trapno=0
528 set_early_handler handler=early_illegal_opcode,trapno=6
529 set_early_handler handler=early_protection_fault,trapno=13
530 set_early_handler handler=early_page_fault,trapno=14
532 ret
534 early_divide_err:
535 xor %edx,%edx
536 pushl $0 /* fake errcode */
537 jmp early_fault
539 early_illegal_opcode:
540 movl $6,%edx
541 pushl $0 /* fake errcode */
542 jmp early_fault
544 early_protection_fault:
545 movl $13,%edx
546 jmp early_fault
548 early_page_fault:
549 movl $14,%edx
550 jmp early_fault
552 early_fault:
553 cld
554 #ifdef CONFIG_PRINTK
555 pusha
556 movl $(__KERNEL_DS),%eax
557 movl %eax,%ds
558 movl %eax,%es
559 cmpl $2,early_recursion_flag
560 je hlt_loop
561 incl early_recursion_flag
562 movl %cr2,%eax
563 pushl %eax
564 pushl %edx /* trapno */
565 pushl $fault_msg
566 call printk
567 #endif
568 call dump_stack
569 hlt_loop:
570 hlt
571 jmp hlt_loop
573 /* This is the default interrupt "handler" :-) */
574 ALIGN
575 ignore_int:
576 cld
577 #ifdef CONFIG_PRINTK
578 pushl %eax
579 pushl %ecx
580 pushl %edx
581 pushl %es
582 pushl %ds
583 movl $(__KERNEL_DS),%eax
584 movl %eax,%ds
585 movl %eax,%es
586 cmpl $2,early_recursion_flag
587 je hlt_loop
588 incl early_recursion_flag
589 pushl 16(%esp)
590 pushl 24(%esp)
591 pushl 32(%esp)
592 pushl 40(%esp)
593 pushl $int_msg
594 call printk
596 call dump_stack
598 addl $(5*4),%esp
599 popl %ds
600 popl %es
601 popl %edx
602 popl %ecx
603 popl %eax
604 #endif
605 iret
607 __REFDATA
608 .align 4
609 ENTRY(initial_code)
610 .long i386_start_kernel
612 /*
613 * BSS section
614 */
615 __PAGE_ALIGNED_BSS
616 .align PAGE_SIZE_asm
617 #ifdef CONFIG_X86_PAE
618 swapper_pg_pmd:
619 .fill 1024*KPMDS,4,0
620 #else
621 ENTRY(swapper_pg_dir)
622 .fill 1024,4,0
623 #endif
624 swapper_pg_fixmap:
625 .fill 1024,4,0
626 ENTRY(empty_zero_page)
627 .fill 4096,1,0
629 /*
630 * This starts the data section.
631 */
632 #ifdef CONFIG_X86_PAE
633 __PAGE_ALIGNED_DATA
634 /* Page-aligned for the benefit of paravirt? */
635 .align PAGE_SIZE_asm
636 ENTRY(swapper_pg_dir)
637 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
638 # if KPMDS == 3
639 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
640 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
641 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
642 # elif KPMDS == 2
643 .long 0,0
644 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
645 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
646 # elif KPMDS == 1
647 .long 0,0
648 .long 0,0
649 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
650 # else
651 # error "Kernel PMDs should be 1, 2 or 3"
652 # endif
653 .align PAGE_SIZE_asm /* needs to be page-sized too */
654 #endif
656 .data
657 ENTRY(stack_start)
658 .long init_thread_union+THREAD_SIZE
659 .long __BOOT_DS
661 ready: .byte 0
663 early_recursion_flag:
664 .long 0
666 int_msg:
667 .asciz "Unknown interrupt or fault at: %p %p %p\n"
669 fault_msg:
670 /* fault info: */
671 .ascii "BUG: Int %d: CR2 %p\n"
672 /* pusha regs: */
673 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
674 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
675 /* fault frame: */
676 .ascii " err %p EIP %p CS %p flg %p\n"
677 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
678 .ascii " %p %p %p %p %p %p %p %p\n"
679 .asciz " %p %p %p %p %p %p %p %p\n"
681 #include "../../x86/xen/xen-head.S"
683 /*
684 * The IDT and GDT 'descriptors' are a strange 48-bit object
685 * only used by the lidt and lgdt instructions. They are not
686 * like usual segment descriptors - they consist of a 16-bit
687 * segment size, and 32-bit linear address value:
688 */
690 .globl boot_gdt_descr
691 .globl idt_descr
693 ALIGN
694 # early boot GDT descriptor (must use 1:1 address mapping)
695 .word 0 # 32 bit align gdt_desc.address
696 boot_gdt_descr:
697 .word __BOOT_DS+7
698 .long boot_gdt - __PAGE_OFFSET
700 .word 0 # 32-bit align idt_desc.address
701 idt_descr:
702 .word IDT_ENTRIES*8-1 # idt contains 256 entries
703 .long idt_table
705 # boot GDT descriptor (later on used by CPU#0):
706 .word 0 # 32 bit align gdt_desc.address
707 ENTRY(early_gdt_descr)
708 .word GDT_ENTRIES*8-1
709 .long gdt_page /* Overwritten for secondary CPUs */
711 /*
712 * The boot_gdt must mirror the equivalent in setup.S and is
713 * used only for booting.
714 */
715 .align L1_CACHE_BYTES
716 ENTRY(boot_gdt)
717 .fill GDT_ENTRY_BOOT_CS,8,0
718 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
719 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */