Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt

   1 Mediatek infracfg controller
   2 ============================
   3
   4 The Mediatek infracfg controller provides various clocks and reset
   5 outputs to the system.
   6
   7 Required Properties:
   8
   9 - compatible: Should be:
  10         - "mediatek,mt8135-infracfg", "syscon"
  11         - "mediatek,mt8173-infracfg", "syscon"
  12 - #clock-cells: Must be 1
  13 - #reset-cells: Must be 1
  14
  15 The infracfg controller uses the common clk binding from
  16 Documentation/devicetree/bindings/clock/clock-bindings.txt
  17 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
  18 Also it uses the common reset controller binding from
  19 Documentation/devicetree/bindings/reset/reset.txt.
  20 The available reset outputs are defined in
  21 dt-bindings/reset-controller/mt*-resets.h
  22
  23 Example:
  24
  25 infracfg: power-controller@10001000 {
  26         compatible = "mediatek,mt8173-infracfg", "syscon";
  27         reg = <0 0x10001000 0 0x1000>;
  28         #clock-cells = <1>;
  29         #reset-cells = <1>;
  30 };