2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
8 * Based on at91sam9260.dtsi
10 * Licensed under GPLv2 or later.
13 #include "skeleton.dtsi"
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91RM9200 family SoC";
21 compatible = "atmel,at91rm9200";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm920t";
52 reg = <0x20000000 0x04000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
70 compatible = "mmio-sram";
71 reg = <0x00200000 0x4000>;
75 compatible = "simple-bus";
81 compatible = "simple-bus";
86 aic: interrupt-controller@fffff000 {
87 #interrupt-cells = <3>;
88 compatible = "atmel,at91rm9200-aic";
90 reg = <0xfffff000 0x200>;
91 atmel,external-irqs = <25 26 27 28 29 30 31>;
94 ramc0: ramc@ffffff00 {
95 compatible = "atmel,at91rm9200-sdramc", "syscon";
96 reg = <0xffffff00 0x100>;
100 compatible = "atmel,at91rm9200-pmc";
101 reg = <0xfffffc00 0x100>;
102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
103 interrupt-controller;
104 #address-cells = <1>;
106 #interrupt-cells = <1>;
109 compatible = "atmel,at91rm9200-clk-main-osc";
111 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
112 clocks = <&main_xtal>;
116 compatible = "atmel,at91rm9200-clk-main";
118 clocks = <&main_osc>;
122 compatible = "atmel,at91rm9200-clk-pll";
124 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
127 atmel,clk-input-range = <1000000 32000000>;
128 #atmel,pll-clk-output-range-cells = <3>;
129 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
130 <150000000 180000000 2>;
134 compatible = "atmel,at91rm9200-clk-pll";
136 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
139 atmel,clk-input-range = <1000000 32000000>;
140 #atmel,pll-clk-output-range-cells = <3>;
141 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
142 <150000000 180000000 2>;
146 compatible = "atmel,at91rm9200-clk-master";
148 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
149 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
150 atmel,clk-output-range = <0 80000000>;
151 atmel,clk-divisors = <1 2 3 4>;
155 compatible = "atmel,at91rm9200-clk-usb";
157 atmel,clk-divisors = <1 2 0 0>;
162 compatible = "atmel,at91rm9200-clk-programmable";
163 #address-cells = <1>;
165 interrupt-parent = <&pmc>;
166 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
171 interrupts = <AT91_PMC_PCKRDY(0)>;
177 interrupts = <AT91_PMC_PCKRDY(1)>;
183 interrupts = <AT91_PMC_PCKRDY(2)>;
189 interrupts = <AT91_PMC_PCKRDY(3)>;
194 compatible = "atmel,at91rm9200-clk-system";
195 #address-cells = <1>;
236 compatible = "atmel,at91rm9200-clk-peripheral";
237 #address-cells = <1>;
261 usart0_clk: usart0_clk {
266 usart1_clk: usart1_clk {
271 usart2_clk: usart2_clk {
276 usart3_clk: usart3_clk {
351 macb0_clk: macb0_clk {
359 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
360 reg = <0xfffffd00 0x100>;
361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
364 compatible = "atmel,at91rm9200-wdt";
369 compatible = "atmel,at91rm9200-rtc";
370 reg = <0xfffffe00 0x40>;
371 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
375 tcb0: timer@fffa0000 {
376 compatible = "atmel,at91rm9200-tcb";
377 reg = <0xfffa0000 0x100>;
378 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
379 18 IRQ_TYPE_LEVEL_HIGH 0
380 19 IRQ_TYPE_LEVEL_HIGH 0>;
381 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
382 clock-names = "t0_clk", "t1_clk", "t2_clk";
385 tcb1: timer@fffa4000 {
386 compatible = "atmel,at91rm9200-tcb";
387 reg = <0xfffa4000 0x100>;
388 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
389 21 IRQ_TYPE_LEVEL_HIGH 0
390 22 IRQ_TYPE_LEVEL_HIGH 0>;
391 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
392 clock-names = "t0_clk", "t1_clk", "t2_clk";
396 compatible = "atmel,at91rm9200-i2c";
397 reg = <0xfffb8000 0x4000>;
398 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_twi>;
401 clocks = <&twi0_clk>;
402 #address-cells = <1>;
408 compatible = "atmel,hsmci";
409 reg = <0xfffb4000 0x4000>;
410 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
411 clocks = <&mci0_clk>;
412 clock-names = "mci_clk";
413 #address-cells = <1>;
415 pinctrl-names = "default";
420 compatible = "atmel,at91rm9200-ssc";
421 reg = <0xfffd0000 0x4000>;
422 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
423 pinctrl-names = "default";
424 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
425 clocks = <&ssc0_clk>;
426 clock-names = "pclk";
431 compatible = "atmel,at91rm9200-ssc";
432 reg = <0xfffd4000 0x4000>;
433 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
436 clocks = <&ssc1_clk>;
437 clock-names = "pclk";
442 compatible = "atmel,at91rm9200-ssc";
443 reg = <0xfffd8000 0x4000>;
444 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
447 clocks = <&ssc2_clk>;
448 clock-names = "pclk";
452 macb0: ethernet@fffbc000 {
453 compatible = "cdns,at91rm9200-emac", "cdns,emac";
454 reg = <0xfffbc000 0x4000>;
455 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_macb_rmii>;
459 clocks = <&macb0_clk>;
460 clock-names = "ether_clk";
465 #address-cells = <1>;
467 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
468 ranges = <0xfffff400 0xfffff400 0x800>;
472 0xffffffff 0xffffffff /* pioA */
473 0xffffffff 0x083fffff /* pioB */
474 0xffff3fff 0x00000000 /* pioC */
475 0x03ff87ff 0x0fffff80 /* pioD */
478 /* shared pinctrl settings */
480 pinctrl_dbgu: dbgu-0 {
482 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
483 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
488 pinctrl_uart0: uart0-0 {
490 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
491 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
494 pinctrl_uart0_cts: uart0_cts-0 {
496 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
499 pinctrl_uart0_rts: uart0_rts-0 {
501 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
506 pinctrl_uart1: uart1-0 {
508 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
509 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
512 pinctrl_uart1_rts: uart1_rts-0 {
514 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
517 pinctrl_uart1_cts: uart1_cts-0 {
519 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
522 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
524 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
525 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
528 pinctrl_uart1_dcd: uart1_dcd-0 {
530 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
533 pinctrl_uart1_ri: uart1_ri-0 {
535 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
540 pinctrl_uart2: uart2-0 {
542 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
543 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
546 pinctrl_uart2_rts: uart2_rts-0 {
548 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
551 pinctrl_uart2_cts: uart2_cts-0 {
553 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
558 pinctrl_uart3: uart3-0 {
560 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
561 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
564 pinctrl_uart3_rts: uart3_rts-0 {
566 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
569 pinctrl_uart3_cts: uart3_cts-0 {
571 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
576 pinctrl_nand: nand-0 {
578 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
579 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
584 pinctrl_macb_rmii: macb_rmii-0 {
586 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
587 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
588 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
589 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
590 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
591 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
592 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
593 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
594 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
595 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
598 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
600 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
601 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
602 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
603 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
604 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
605 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
606 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
607 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
612 pinctrl_mmc0_clk: mmc0_clk-0 {
614 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
617 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
619 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
620 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
623 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
625 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
626 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
627 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
630 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
632 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
633 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
636 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
638 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
639 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
640 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
645 pinctrl_ssc0_tx: ssc0_tx-0 {
647 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
648 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
649 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
652 pinctrl_ssc0_rx: ssc0_rx-0 {
654 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
655 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
656 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
661 pinctrl_ssc1_tx: ssc1_tx-0 {
663 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
664 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
665 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
668 pinctrl_ssc1_rx: ssc1_rx-0 {
670 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
671 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
672 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
677 pinctrl_ssc2_tx: ssc2_tx-0 {
679 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
680 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
681 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
684 pinctrl_ssc2_rx: ssc2_rx-0 {
686 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
687 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
688 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
695 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
696 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
699 pinctrl_twi_gpio: twi_gpio-0 {
701 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
702 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
707 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
708 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
711 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
712 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
715 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
716 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
719 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
720 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
723 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
724 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
727 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
728 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
731 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
732 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
735 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
736 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
739 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
740 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
745 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
746 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
749 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
750 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
753 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
754 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
757 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
758 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
761 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
762 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
765 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
766 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
769 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
770 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
773 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
774 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
777 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
778 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
783 pinctrl_spi0: spi0-0 {
785 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
786 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
787 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
791 pioA: gpio@fffff400 {
792 compatible = "atmel,at91rm9200-gpio";
793 reg = <0xfffff400 0x200>;
794 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
797 interrupt-controller;
798 #interrupt-cells = <2>;
799 clocks = <&pioA_clk>;
802 pioB: gpio@fffff600 {
803 compatible = "atmel,at91rm9200-gpio";
804 reg = <0xfffff600 0x200>;
805 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
808 interrupt-controller;
809 #interrupt-cells = <2>;
810 clocks = <&pioB_clk>;
813 pioC: gpio@fffff800 {
814 compatible = "atmel,at91rm9200-gpio";
815 reg = <0xfffff800 0x200>;
816 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
819 interrupt-controller;
820 #interrupt-cells = <2>;
821 clocks = <&pioC_clk>;
824 pioD: gpio@fffffa00 {
825 compatible = "atmel,at91rm9200-gpio";
826 reg = <0xfffffa00 0x200>;
827 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
830 interrupt-controller;
831 #interrupt-cells = <2>;
832 clocks = <&pioD_clk>;
836 dbgu: serial@fffff200 {
837 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
838 reg = <0xfffff200 0x200>;
839 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
840 pinctrl-names = "default";
841 pinctrl-0 = <&pinctrl_dbgu>;
843 clock-names = "usart";
847 usart0: serial@fffc0000 {
848 compatible = "atmel,at91rm9200-usart";
849 reg = <0xfffc0000 0x200>;
850 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
853 pinctrl-names = "default";
854 pinctrl-0 = <&pinctrl_uart0>;
855 clocks = <&usart0_clk>;
856 clock-names = "usart";
860 usart1: serial@fffc4000 {
861 compatible = "atmel,at91rm9200-usart";
862 reg = <0xfffc4000 0x200>;
863 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
866 pinctrl-names = "default";
867 pinctrl-0 = <&pinctrl_uart1>;
868 clocks = <&usart1_clk>;
869 clock-names = "usart";
873 usart2: serial@fffc8000 {
874 compatible = "atmel,at91rm9200-usart";
875 reg = <0xfffc8000 0x200>;
876 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
879 pinctrl-names = "default";
880 pinctrl-0 = <&pinctrl_uart2>;
881 clocks = <&usart2_clk>;
882 clock-names = "usart";
886 usart3: serial@fffcc000 {
887 compatible = "atmel,at91rm9200-usart";
888 reg = <0xfffcc000 0x200>;
889 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&pinctrl_uart3>;
894 clocks = <&usart3_clk>;
895 clock-names = "usart";
899 usb1: gadget@fffb0000 {
900 compatible = "atmel,at91rm9200-udc";
901 reg = <0xfffb0000 0x4000>;
902 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
903 clocks = <&udc_clk>, <&udpck>;
904 clock-names = "pclk", "hclk";
909 #address-cells = <1>;
911 compatible = "atmel,at91rm9200-spi";
912 reg = <0xfffe0000 0x200>;
913 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
914 pinctrl-names = "default";
915 pinctrl-0 = <&pinctrl_spi0>;
916 clocks = <&spi0_clk>;
917 clock-names = "spi_clk";
922 nand0: nand@40000000 {
923 compatible = "atmel,at91rm9200-nand";
924 #address-cells = <1>;
926 reg = <0x40000000 0x10000000>;
927 atmel,nand-addr-offset = <21>;
928 atmel,nand-cmd-offset = <22>;
929 pinctrl-names = "default";
930 pinctrl-0 = <&pinctrl_nand>;
931 nand-ecc-mode = "soft";
932 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
934 &pioB 1 GPIO_ACTIVE_HIGH
939 usb0: ohci@00300000 {
940 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
941 reg = <0x00300000 0x100000>;
942 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
943 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
944 clock-names = "ohci_clk", "hclk", "uhpck";
950 compatible = "i2c-gpio";
951 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
952 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
954 i2c-gpio,sda-open-drain;
955 i2c-gpio,scl-open-drain;
956 i2c-gpio,delay-us = <2>; /* ~100 kHz */
957 pinctrl-names = "default";
958 pinctrl-0 = <&pinctrl_twi_gpio>;
959 #address-cells = <1>;