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ARM: rockchip: fix broken build
[linux/fpc-iii.git] / drivers / scsi / megaraid / megaraid_sas_fp.c
blobbe57b18675a4b1b96243e067a71cd2db2a80c1c5
1 /*
2 * Linux MegaRAID driver for SAS based RAID controllers
3 *
4 * Copyright (c) 2009-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 *
20 * FILE: megaraid_sas_fp.c
21 *
22 * Authors: Avago Technologies
23 * Sumant Patro
24 * Varad Talamacki
25 * Manoj Jose
26 * Kashyap Desai <kashyap.desai@avagotech.com>
27 * Sumit Saxena <sumit.saxena@avagotech.com>
28 *
29 * Send feedback to: megaraidlinux.pdl@avagotech.com
30 *
31 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
32 * San Jose, California 95131
33 */
34
35 #include <linux/kernel.h>
36 #include <linux/types.h>
37 #include <linux/pci.h>
38 #include <linux/list.h>
39 #include <linux/moduleparam.h>
40 #include <linux/module.h>
41 #include <linux/spinlock.h>
42 #include <linux/interrupt.h>
43 #include <linux/delay.h>
44 #include <linux/uio.h>
45 #include <linux/uaccess.h>
46 #include <linux/fs.h>
47 #include <linux/compat.h>
48 #include <linux/blkdev.h>
49 #include <linux/poll.h>
50
51 #include <scsi/scsi.h>
52 #include <scsi/scsi_cmnd.h>
53 #include <scsi/scsi_device.h>
54 #include <scsi/scsi_host.h>
55
56 #include "megaraid_sas_fusion.h"
57 #include "megaraid_sas.h"
58 #include <asm/div64.h>
59
60 #define LB_PENDING_CMDS_DEFAULT 4
61 static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
62 module_param(lb_pending_cmds, int, S_IRUGO);
63 MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
64 "threshold. Valid Values are 1-128. Default: 4");
65
66
67 #define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
68 #define MR_LD_STATE_OPTIMAL 3
69
70 #ifdef FALSE
71 #undef FALSE
72 #endif
73 #define FALSE 0
74
75 #ifdef TRUE
76 #undef TRUE
77 #endif
78 #define TRUE 1
79
80 #define SPAN_DEBUG 0
81 #define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
82 #define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
83 #define SPAN_INVALID 0xff
84
85 /* Prototypes */
86 static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
87 PLD_SPAN_INFO ldSpanInfo);
88 static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
89 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
90 struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
91 static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
92 u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
93
94 u32 mega_mod64(u64 dividend, u32 divisor)
95 {
96 u64 d;
97 u32 remainder;
98
99 if (!divisor)
100 printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
101 d = dividend;
102 remainder = do_div(d, divisor);
103 return remainder;
104 }
105
106 /**
107 * @param dividend : Dividend
108 * @param divisor : Divisor
109 *
110 * @return quotient
111 **/
112 u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
113 {
114 u32 remainder;
115 u64 d;
116
117 if (!divisor)
118 printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
119
120 d = dividend;
121 remainder = do_div(d, divisor);
122
123 return d;
124 }
125
126 struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
127 {
128 return &map->raidMap.ldSpanMap[ld].ldRaid;
129 }
130
131 static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
132 struct MR_DRV_RAID_MAP_ALL
133 *map)
134 {
135 return &map->raidMap.ldSpanMap[ld].spanBlock[0];
136 }
137
138 static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
139 {
140 return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
141 }
142
143 u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
144 {
145 return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
146 }
147
148 u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
149 {
150 return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
151 }
152
153 __le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
154 {
155 return map->raidMap.devHndlInfo[pd].curDevHdl;
156 }
157
158 u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
159 {
160 return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
161 }
162
163 u8 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
164 {
165 return map->raidMap.ldTgtIdToLd[ldTgtId];
166 }
167
168 static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
169 struct MR_DRV_RAID_MAP_ALL *map)
170 {
171 return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
172 }
173
174 /*
175 * This function will Populate Driver Map using firmware raid map
176 */
177 void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
178 {
179 struct fusion_context *fusion = instance->ctrl_context;
180 struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
181 struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
182 int i;
183 u16 ld_count;
184
185
186 struct MR_DRV_RAID_MAP_ALL *drv_map =
187 fusion->ld_drv_map[(instance->map_id & 1)];
188 struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
189
190 if (instance->supportmax256vd) {
191 memcpy(fusion->ld_drv_map[instance->map_id & 1],
192 fusion->ld_map[instance->map_id & 1],
193 fusion->current_map_sz);
194 /* New Raid map will not set totalSize, so keep expected value
195 * for legacy code in ValidateMapInfo
196 */
197 pDrvRaidMap->totalSize =
198 cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
199 } else {
200 fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
201 fusion->ld_map[(instance->map_id & 1)];
202 pFwRaidMap = &fw_map_old->raidMap;
203 ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
204
205 #if VD_EXT_DEBUG
206 for (i = 0; i < ld_count; i++) {
207 dev_dbg(&instance->pdev->dev, "(%d) :Index 0x%x "
208 "Target Id 0x%x Seq Num 0x%x Size 0/%llx\n",
209 instance->unique_id, i,
210 fw_map_old->raidMap.ldSpanMap[i].ldRaid.targetId,
211 fw_map_old->raidMap.ldSpanMap[i].ldRaid.seqNum,
212 fw_map_old->raidMap.ldSpanMap[i].ldRaid.size);
213 }
214 #endif
215
216 memset(drv_map, 0, fusion->drv_map_sz);
217 pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
218 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
219 pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
220 for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
221 pDrvRaidMap->ldTgtIdToLd[i] =
222 (u8)pFwRaidMap->ldTgtIdToLd[i];
223 for (i = (MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS);
224 i < MAX_LOGICAL_DRIVES_EXT; i++)
225 pDrvRaidMap->ldTgtIdToLd[i] = 0xff;
226 for (i = 0; i < ld_count; i++) {
227 pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
228 #if VD_EXT_DEBUG
229 dev_dbg(&instance->pdev->dev,
230 "pFwRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
231 "pFwRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
232 "size 0x%x\n", i, i,
233 pFwRaidMap->ldSpanMap[i].ldRaid.targetId,
234 pFwRaidMap->ldSpanMap[i].ldRaid.seqNum,
235 (u32)pFwRaidMap->ldSpanMap[i].ldRaid.rowSize);
236 dev_dbg(&instance->pdev->dev,
237 "pDrvRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
238 "pDrvRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
239 "size 0x%x\n", i, i,
240 pDrvRaidMap->ldSpanMap[i].ldRaid.targetId,
241 pDrvRaidMap->ldSpanMap[i].ldRaid.seqNum,
242 (u32)pDrvRaidMap->ldSpanMap[i].ldRaid.rowSize);
243 dev_dbg(&instance->pdev->dev, "Driver raid map all %p "
244 "raid map %p LD RAID MAP %p/%p\n", drv_map,
245 pDrvRaidMap, &pFwRaidMap->ldSpanMap[i].ldRaid,
246 &pDrvRaidMap->ldSpanMap[i].ldRaid);
247 #endif
248 }
249 memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
250 sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
251 memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
252 sizeof(struct MR_DEV_HANDLE_INFO) *
253 MAX_RAIDMAP_PHYSICAL_DEVICES);
254 }
255 }
256
257 /*
258 * This function will validate Map info data provided by FW
259 */
260 u8 MR_ValidateMapInfo(struct megasas_instance *instance)
261 {
262 struct fusion_context *fusion;
263 struct MR_DRV_RAID_MAP_ALL *drv_map;
264 struct MR_DRV_RAID_MAP *pDrvRaidMap;
265 struct LD_LOAD_BALANCE_INFO *lbInfo;
266 PLD_SPAN_INFO ldSpanInfo;
267 struct MR_LD_RAID *raid;
268 u16 ldCount, num_lds;
269 u16 ld;
270 u32 expected_size;
271
272
273 MR_PopulateDrvRaidMap(instance);
274
275 fusion = instance->ctrl_context;
276 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
277 pDrvRaidMap = &drv_map->raidMap;
278
279 lbInfo = fusion->load_balance_info;
280 ldSpanInfo = fusion->log_to_span;
281
282 if (instance->supportmax256vd)
283 expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
284 else
285 expected_size =
286 (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
287 (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
288
289 if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
290 dev_err(&instance->pdev->dev, "map info structure size 0x%x is not matching with ld count\n",
291 (unsigned int) expected_size);
292 dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
293 (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
294 le32_to_cpu(pDrvRaidMap->totalSize));
295 return 0;
296 }
297
298 if (instance->UnevenSpanSupport)
299 mr_update_span_set(drv_map, ldSpanInfo);
300
301 mr_update_load_balance_params(drv_map, lbInfo);
302
303 num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
304
305 /*Convert Raid capability values to CPU arch */
306 for (ldCount = 0; ldCount < num_lds; ldCount++) {
307 ld = MR_TargetIdToLdGet(ldCount, drv_map);
308 raid = MR_LdRaidGet(ld, drv_map);
309 le32_to_cpus((u32 *)&raid->capability);
310 }
311
312 return 1;
313 }
314
315 u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
316 struct MR_DRV_RAID_MAP_ALL *map)
317 {
318 struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
319 struct MR_QUAD_ELEMENT *quad;
320 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
321 u32 span, j;
322
323 for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
324
325 for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
326 quad = &pSpanBlock->block_span_info.quad[j];
327
328 if (le32_to_cpu(quad->diff) == 0)
329 return SPAN_INVALID;
330 if (le64_to_cpu(quad->logStart) <= row && row <=
331 le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
332 le32_to_cpu(quad->diff))) == 0) {
333 if (span_blk != NULL) {
334 u64 blk, debugBlk;
335 blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
336 debugBlk = blk;
337
338 blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
339 *span_blk = blk;
340 }
341 return span;
342 }
343 }
344 }
345 return SPAN_INVALID;
346 }
347
348 /*
349 ******************************************************************************
350 *
351 * Function to print info about span set created in driver from FW raid map
352 *
353 * Inputs :
354 * map - LD map
355 * ldSpanInfo - ldSpanInfo per HBA instance
356 */
357 #if SPAN_DEBUG
358 static int getSpanInfo(struct MR_DRV_RAID_MAP_ALL *map,
359 PLD_SPAN_INFO ldSpanInfo)
360 {
361
362 u8 span;
363 u32 element;
364 struct MR_LD_RAID *raid;
365 LD_SPAN_SET *span_set;
366 struct MR_QUAD_ELEMENT *quad;
367 int ldCount;
368 u16 ld;
369
370 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
371 ld = MR_TargetIdToLdGet(ldCount, map);
372 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
373 continue;
374 raid = MR_LdRaidGet(ld, map);
375 dev_dbg(&instance->pdev->dev, "LD %x: span_depth=%x\n",
376 ld, raid->spanDepth);
377 for (span = 0; span < raid->spanDepth; span++)
378 dev_dbg(&instance->pdev->dev, "Span=%x,"
379 " number of quads=%x\n", span,
380 le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
381 block_span_info.noElements));
382 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
383 span_set = &(ldSpanInfo[ld].span_set[element]);
384 if (span_set->span_row_data_width == 0)
385 break;
386
387 dev_dbg(&instance->pdev->dev, "Span Set %x:"
388 "width=%x, diff=%x\n", element,
389 (unsigned int)span_set->span_row_data_width,
390 (unsigned int)span_set->diff);
391 dev_dbg(&instance->pdev->dev, "logical LBA"
392 "start=0x%08lx, end=0x%08lx\n",
393 (long unsigned int)span_set->log_start_lba,
394 (long unsigned int)span_set->log_end_lba);
395 dev_dbg(&instance->pdev->dev, "span row start=0x%08lx,"
396 " end=0x%08lx\n",
397 (long unsigned int)span_set->span_row_start,
398 (long unsigned int)span_set->span_row_end);
399 dev_dbg(&instance->pdev->dev, "data row start=0x%08lx,"
400 " end=0x%08lx\n",
401 (long unsigned int)span_set->data_row_start,
402 (long unsigned int)span_set->data_row_end);
403 dev_dbg(&instance->pdev->dev, "data strip start=0x%08lx,"
404 " end=0x%08lx\n",
405 (long unsigned int)span_set->data_strip_start,
406 (long unsigned int)span_set->data_strip_end);
407
408 for (span = 0; span < raid->spanDepth; span++) {
409 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
410 block_span_info.noElements) >=
411 element + 1) {
412 quad = &map->raidMap.ldSpanMap[ld].
413 spanBlock[span].block_span_info.
414 quad[element];
415 dev_dbg(&instance->pdev->dev, "Span=%x,"
416 "Quad=%x, diff=%x\n", span,
417 element, le32_to_cpu(quad->diff));
418 dev_dbg(&instance->pdev->dev,
419 "offset_in_span=0x%08lx\n",
420 (long unsigned int)le64_to_cpu(quad->offsetInSpan));
421 dev_dbg(&instance->pdev->dev,
422 "logical start=0x%08lx, end=0x%08lx\n",
423 (long unsigned int)le64_to_cpu(quad->logStart),
424 (long unsigned int)le64_to_cpu(quad->logEnd));
425 }
426 }
427 }
428 }
429 return 0;
430 }
431 #endif
432
433 /*
434 ******************************************************************************
435 *
436 * This routine calculates the Span block for given row using spanset.
437 *
438 * Inputs :
439 * instance - HBA instance
440 * ld - Logical drive number
441 * row - Row number
442 * map - LD map
443 *
444 * Outputs :
445 *
446 * span - Span number
447 * block - Absolute Block number in the physical disk
448 * div_error - Devide error code.
449 */
450
451 u32 mr_spanset_get_span_block(struct megasas_instance *instance,
452 u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
453 {
454 struct fusion_context *fusion = instance->ctrl_context;
455 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
456 LD_SPAN_SET *span_set;
457 struct MR_QUAD_ELEMENT *quad;
458 u32 span, info;
459 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
460
461 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
462 span_set = &(ldSpanInfo[ld].span_set[info]);
463
464 if (span_set->span_row_data_width == 0)
465 break;
466
467 if (row > span_set->data_row_end)
468 continue;
469
470 for (span = 0; span < raid->spanDepth; span++)
471 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
472 block_span_info.noElements) >= info+1) {
473 quad = &map->raidMap.ldSpanMap[ld].
474 spanBlock[span].
475 block_span_info.quad[info];
476 if (le32_to_cpu(quad->diff) == 0)
477 return SPAN_INVALID;
478 if (le64_to_cpu(quad->logStart) <= row &&
479 row <= le64_to_cpu(quad->logEnd) &&
480 (mega_mod64(row - le64_to_cpu(quad->logStart),
481 le32_to_cpu(quad->diff))) == 0) {
482 if (span_blk != NULL) {
483 u64 blk;
484 blk = mega_div64_32
485 ((row - le64_to_cpu(quad->logStart)),
486 le32_to_cpu(quad->diff));
487 blk = (blk + le64_to_cpu(quad->offsetInSpan))
488 << raid->stripeShift;
489 *span_blk = blk;
490 }
491 return span;
492 }
493 }
494 }
495 return SPAN_INVALID;
496 }
497
498 /*
499 ******************************************************************************
500 *
501 * This routine calculates the row for given strip using spanset.
502 *
503 * Inputs :
504 * instance - HBA instance
505 * ld - Logical drive number
506 * Strip - Strip
507 * map - LD map
508 *
509 * Outputs :
510 *
511 * row - row associated with strip
512 */
513
514 static u64 get_row_from_strip(struct megasas_instance *instance,
515 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
516 {
517 struct fusion_context *fusion = instance->ctrl_context;
518 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
519 LD_SPAN_SET *span_set;
520 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
521 u32 info, strip_offset, span, span_offset;
522 u64 span_set_Strip, span_set_Row, retval;
523
524 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
525 span_set = &(ldSpanInfo[ld].span_set[info]);
526
527 if (span_set->span_row_data_width == 0)
528 break;
529 if (strip > span_set->data_strip_end)
530 continue;
531
532 span_set_Strip = strip - span_set->data_strip_start;
533 strip_offset = mega_mod64(span_set_Strip,
534 span_set->span_row_data_width);
535 span_set_Row = mega_div64_32(span_set_Strip,
536 span_set->span_row_data_width) * span_set->diff;
537 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
538 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
539 block_span_info.noElements) >= info+1) {
540 if (strip_offset >=
541 span_set->strip_offset[span])
542 span_offset++;
543 else
544 break;
545 }
546 #if SPAN_DEBUG
547 dev_info(&instance->pdev->dev, "Strip 0x%llx,"
548 "span_set_Strip 0x%llx, span_set_Row 0x%llx"
549 "data width 0x%llx span offset 0x%x\n", strip,
550 (unsigned long long)span_set_Strip,
551 (unsigned long long)span_set_Row,
552 (unsigned long long)span_set->span_row_data_width,
553 span_offset);
554 dev_info(&instance->pdev->dev, "For strip 0x%llx"
555 "row is 0x%llx\n", strip,
556 (unsigned long long) span_set->data_row_start +
557 (unsigned long long) span_set_Row + (span_offset - 1));
558 #endif
559 retval = (span_set->data_row_start + span_set_Row +
560 (span_offset - 1));
561 return retval;
562 }
563 return -1LLU;
564 }
565
566
567 /*
568 ******************************************************************************
569 *
570 * This routine calculates the Start Strip for given row using spanset.
571 *
572 * Inputs :
573 * instance - HBA instance
574 * ld - Logical drive number
575 * row - Row number
576 * map - LD map
577 *
578 * Outputs :
579 *
580 * Strip - Start strip associated with row
581 */
582
583 static u64 get_strip_from_row(struct megasas_instance *instance,
584 u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
585 {
586 struct fusion_context *fusion = instance->ctrl_context;
587 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
588 LD_SPAN_SET *span_set;
589 struct MR_QUAD_ELEMENT *quad;
590 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
591 u32 span, info;
592 u64 strip;
593
594 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
595 span_set = &(ldSpanInfo[ld].span_set[info]);
596
597 if (span_set->span_row_data_width == 0)
598 break;
599 if (row > span_set->data_row_end)
600 continue;
601
602 for (span = 0; span < raid->spanDepth; span++)
603 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
604 block_span_info.noElements) >= info+1) {
605 quad = &map->raidMap.ldSpanMap[ld].
606 spanBlock[span].block_span_info.quad[info];
607 if (le64_to_cpu(quad->logStart) <= row &&
608 row <= le64_to_cpu(quad->logEnd) &&
609 mega_mod64((row - le64_to_cpu(quad->logStart)),
610 le32_to_cpu(quad->diff)) == 0) {
611 strip = mega_div64_32
612 (((row - span_set->data_row_start)
613 - le64_to_cpu(quad->logStart)),
614 le32_to_cpu(quad->diff));
615 strip *= span_set->span_row_data_width;
616 strip += span_set->data_strip_start;
617 strip += span_set->strip_offset[span];
618 return strip;
619 }
620 }
621 }
622 dev_err(&instance->pdev->dev, "get_strip_from_row"
623 "returns invalid strip for ld=%x, row=%lx\n",
624 ld, (long unsigned int)row);
625 return -1;
626 }
627
628 /*
629 ******************************************************************************
630 *
631 * This routine calculates the Physical Arm for given strip using spanset.
632 *
633 * Inputs :
634 * instance - HBA instance
635 * ld - Logical drive number
636 * strip - Strip
637 * map - LD map
638 *
639 * Outputs :
640 *
641 * Phys Arm - Phys Arm associated with strip
642 */
643
644 static u32 get_arm_from_strip(struct megasas_instance *instance,
645 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
646 {
647 struct fusion_context *fusion = instance->ctrl_context;
648 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
649 LD_SPAN_SET *span_set;
650 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
651 u32 info, strip_offset, span, span_offset, retval;
652
653 for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
654 span_set = &(ldSpanInfo[ld].span_set[info]);
655
656 if (span_set->span_row_data_width == 0)
657 break;
658 if (strip > span_set->data_strip_end)
659 continue;
660
661 strip_offset = (uint)mega_mod64
662 ((strip - span_set->data_strip_start),
663 span_set->span_row_data_width);
664
665 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
666 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
667 block_span_info.noElements) >= info+1) {
668 if (strip_offset >=
669 span_set->strip_offset[span])
670 span_offset =
671 span_set->strip_offset[span];
672 else
673 break;
674 }
675 #if SPAN_DEBUG
676 dev_info(&instance->pdev->dev, "get_arm_from_strip:"
677 "for ld=0x%x strip=0x%lx arm is 0x%x\n", ld,
678 (long unsigned int)strip, (strip_offset - span_offset));
679 #endif
680 retval = (strip_offset - span_offset);
681 return retval;
682 }
683
684 dev_err(&instance->pdev->dev, "get_arm_from_strip"
685 "returns invalid arm for ld=%x strip=%lx\n",
686 ld, (long unsigned int)strip);
687
688 return -1;
689 }
690
691 /* This Function will return Phys arm */
692 u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
693 struct MR_DRV_RAID_MAP_ALL *map)
694 {
695 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
696 /* Need to check correct default value */
697 u32 arm = 0;
698
699 switch (raid->level) {
700 case 0:
701 case 5:
702 case 6:
703 arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
704 break;
705 case 1:
706 /* start with logical arm */
707 arm = get_arm_from_strip(instance, ld, stripe, map);
708 if (arm != -1U)
709 arm *= 2;
710 break;
711 }
712
713 return arm;
714 }
715
716
717 /*
718 ******************************************************************************
719 *
720 * This routine calculates the arm, span and block for the specified stripe and
721 * reference in stripe using spanset
722 *
723 * Inputs :
724 *
725 * ld - Logical drive number
726 * stripRow - Stripe number
727 * stripRef - Reference in stripe
728 *
729 * Outputs :
730 *
731 * span - Span number
732 * block - Absolute Block number in the physical disk
733 */
734 static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
735 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
736 struct RAID_CONTEXT *pRAID_Context,
737 struct MR_DRV_RAID_MAP_ALL *map)
738 {
739 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
740 u32 pd, arRef;
741 u8 physArm, span;
742 u64 row;
743 u8 retval = TRUE;
744 u8 do_invader = 0;
745 u64 *pdBlock = &io_info->pdBlock;
746 __le16 *pDevHandle = &io_info->devHandle;
747 u32 logArm, rowMod, armQ, arm;
748
749 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
750 instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
751 do_invader = 1;
752
753 /*Get row and span from io_info for Uneven Span IO.*/
754 row = io_info->start_row;
755 span = io_info->start_span;
756
757
758 if (raid->level == 6) {
759 logArm = get_arm_from_strip(instance, ld, stripRow, map);
760 if (logArm == -1U)
761 return FALSE;
762 rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
763 armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
764 arm = armQ + 1 + logArm;
765 if (arm >= SPAN_ROW_SIZE(map, ld, span))
766 arm -= SPAN_ROW_SIZE(map, ld, span);
767 physArm = (u8)arm;
768 } else
769 /* Calculate the arm */
770 physArm = get_arm(instance, ld, span, stripRow, map);
771 if (physArm == 0xFF)
772 return FALSE;
773
774 arRef = MR_LdSpanArrayGet(ld, span, map);
775 pd = MR_ArPdGet(arRef, physArm, map);
776
777 if (pd != MR_PD_INVALID)
778 *pDevHandle = MR_PdDevHandleGet(pd, map);
779 else {
780 *pDevHandle = cpu_to_le16(MR_PD_INVALID);
781 if ((raid->level >= 5) &&
782 (!do_invader || (do_invader &&
783 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
784 pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
785 else if (raid->level == 1) {
786 pd = MR_ArPdGet(arRef, physArm + 1, map);
787 if (pd != MR_PD_INVALID)
788 *pDevHandle = MR_PdDevHandleGet(pd, map);
789 }
790 }
791
792 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
793 pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
794 physArm;
795 io_info->span_arm = pRAID_Context->spanArm;
796 return retval;
797 }
798
799 /*
800 ******************************************************************************
801 *
802 * This routine calculates the arm, span and block for the specified stripe and
803 * reference in stripe.
804 *
805 * Inputs :
806 *
807 * ld - Logical drive number
808 * stripRow - Stripe number
809 * stripRef - Reference in stripe
810 *
811 * Outputs :
812 *
813 * span - Span number
814 * block - Absolute Block number in the physical disk
815 */
816 u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
817 u16 stripRef, struct IO_REQUEST_INFO *io_info,
818 struct RAID_CONTEXT *pRAID_Context,
819 struct MR_DRV_RAID_MAP_ALL *map)
820 {
821 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
822 u32 pd, arRef;
823 u8 physArm, span;
824 u64 row;
825 u8 retval = TRUE;
826 u8 do_invader = 0;
827 u64 *pdBlock = &io_info->pdBlock;
828 __le16 *pDevHandle = &io_info->devHandle;
829
830 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
831 instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
832 do_invader = 1;
833
834 row = mega_div64_32(stripRow, raid->rowDataSize);
835
836 if (raid->level == 6) {
837 /* logical arm within row */
838 u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
839 u32 rowMod, armQ, arm;
840
841 if (raid->rowSize == 0)
842 return FALSE;
843 /* get logical row mod */
844 rowMod = mega_mod64(row, raid->rowSize);
845 armQ = raid->rowSize-1-rowMod; /* index of Q drive */
846 arm = armQ+1+logArm; /* data always logically follows Q */
847 if (arm >= raid->rowSize) /* handle wrap condition */
848 arm -= raid->rowSize;
849 physArm = (u8)arm;
850 } else {
851 if (raid->modFactor == 0)
852 return FALSE;
853 physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
854 raid->modFactor),
855 map);
856 }
857
858 if (raid->spanDepth == 1) {
859 span = 0;
860 *pdBlock = row << raid->stripeShift;
861 } else {
862 span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
863 if (span == SPAN_INVALID)
864 return FALSE;
865 }
866
867 /* Get the array on which this span is present */
868 arRef = MR_LdSpanArrayGet(ld, span, map);
869 pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
870
871 if (pd != MR_PD_INVALID)
872 /* Get dev handle from Pd. */
873 *pDevHandle = MR_PdDevHandleGet(pd, map);
874 else {
875 /* set dev handle as invalid. */
876 *pDevHandle = cpu_to_le16(MR_PD_INVALID);
877 if ((raid->level >= 5) &&
878 (!do_invader || (do_invader &&
879 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
880 pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
881 else if (raid->level == 1) {
882 /* Get alternate Pd. */
883 pd = MR_ArPdGet(arRef, physArm + 1, map);
884 if (pd != MR_PD_INVALID)
885 /* Get dev handle from Pd */
886 *pDevHandle = MR_PdDevHandleGet(pd, map);
887 }
888 }
889
890 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
891 pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
892 physArm;
893 io_info->span_arm = pRAID_Context->spanArm;
894 return retval;
895 }
896
897 /*
898 ******************************************************************************
899 *
900 * MR_BuildRaidContext function
901 *
902 * This function will initiate command processing. The start/end row and strip
903 * information is calculated then the lock is acquired.
904 * This function will return 0 if region lock was acquired OR return num strips
905 */
906 u8
907 MR_BuildRaidContext(struct megasas_instance *instance,
908 struct IO_REQUEST_INFO *io_info,
909 struct RAID_CONTEXT *pRAID_Context,
910 struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
911 {
912 struct MR_LD_RAID *raid;
913 u32 ld, stripSize, stripe_mask;
914 u64 endLba, endStrip, endRow, start_row, start_strip;
915 u64 regStart;
916 u32 regSize;
917 u8 num_strips, numRows;
918 u16 ref_in_start_stripe, ref_in_end_stripe;
919 u64 ldStartBlock;
920 u32 numBlocks, ldTgtId;
921 u8 isRead;
922 u8 retval = 0;
923 u8 startlba_span = SPAN_INVALID;
924 u64 *pdBlock = &io_info->pdBlock;
925
926 ldStartBlock = io_info->ldStartBlock;
927 numBlocks = io_info->numBlocks;
928 ldTgtId = io_info->ldTgtId;
929 isRead = io_info->isRead;
930 io_info->IoforUnevenSpan = 0;
931 io_info->start_span = SPAN_INVALID;
932
933 ld = MR_TargetIdToLdGet(ldTgtId, map);
934 raid = MR_LdRaidGet(ld, map);
935
936 /*
937 * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
938 * return FALSE
939 */
940 if (raid->rowDataSize == 0) {
941 if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
942 return FALSE;
943 else if (instance->UnevenSpanSupport) {
944 io_info->IoforUnevenSpan = 1;
945 } else {
946 dev_info(&instance->pdev->dev,
947 "raid->rowDataSize is 0, but has SPAN[0]"
948 "rowDataSize = 0x%0x,"
949 "but there is _NO_ UnevenSpanSupport\n",
950 MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
951 return FALSE;
952 }
953 }
954
955 stripSize = 1 << raid->stripeShift;
956 stripe_mask = stripSize-1;
957
958
959 /*
960 * calculate starting row and stripe, and number of strips and rows
961 */
962 start_strip = ldStartBlock >> raid->stripeShift;
963 ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
964 endLba = ldStartBlock + numBlocks - 1;
965 ref_in_end_stripe = (u16)(endLba & stripe_mask);
966 endStrip = endLba >> raid->stripeShift;
967 num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
968
969 if (io_info->IoforUnevenSpan) {
970 start_row = get_row_from_strip(instance, ld, start_strip, map);
971 endRow = get_row_from_strip(instance, ld, endStrip, map);
972 if (start_row == -1ULL || endRow == -1ULL) {
973 dev_info(&instance->pdev->dev, "return from %s %d."
974 "Send IO w/o region lock.\n",
975 __func__, __LINE__);
976 return FALSE;
977 }
978
979 if (raid->spanDepth == 1) {
980 startlba_span = 0;
981 *pdBlock = start_row << raid->stripeShift;
982 } else
983 startlba_span = (u8)mr_spanset_get_span_block(instance,
984 ld, start_row, pdBlock, map);
985 if (startlba_span == SPAN_INVALID) {
986 dev_info(&instance->pdev->dev, "return from %s %d"
987 "for row 0x%llx,start strip %llx"
988 "endSrip %llx\n", __func__, __LINE__,
989 (unsigned long long)start_row,
990 (unsigned long long)start_strip,
991 (unsigned long long)endStrip);
992 return FALSE;
993 }
994 io_info->start_span = startlba_span;
995 io_info->start_row = start_row;
996 #if SPAN_DEBUG
997 dev_dbg(&instance->pdev->dev, "Check Span number from %s %d"
998 "for row 0x%llx, start strip 0x%llx end strip 0x%llx"
999 " span 0x%x\n", __func__, __LINE__,
1000 (unsigned long long)start_row,
1001 (unsigned long long)start_strip,
1002 (unsigned long long)endStrip, startlba_span);
1003 dev_dbg(&instance->pdev->dev, "start_row 0x%llx endRow 0x%llx"
1004 "Start span 0x%x\n", (unsigned long long)start_row,
1005 (unsigned long long)endRow, startlba_span);
1006 #endif
1007 } else {
1008 start_row = mega_div64_32(start_strip, raid->rowDataSize);
1009 endRow = mega_div64_32(endStrip, raid->rowDataSize);
1010 }
1011 numRows = (u8)(endRow - start_row + 1);
1012
1013 /*
1014 * calculate region info.
1015 */
1016
1017 /* assume region is at the start of the first row */
1018 regStart = start_row << raid->stripeShift;
1019 /* assume this IO needs the full row - we'll adjust if not true */
1020 regSize = stripSize;
1021
1022 /* Check if we can send this I/O via FastPath */
1023 if (raid->capability.fpCapable) {
1024 if (isRead)
1025 io_info->fpOkForIo = (raid->capability.fpReadCapable &&
1026 ((num_strips == 1) ||
1027 raid->capability.
1028 fpReadAcrossStripe));
1029 else
1030 io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
1031 ((num_strips == 1) ||
1032 raid->capability.
1033 fpWriteAcrossStripe));
1034 } else
1035 io_info->fpOkForIo = FALSE;
1036
1037 if (numRows == 1) {
1038 /* single-strip IOs can always lock only the data needed */
1039 if (num_strips == 1) {
1040 regStart += ref_in_start_stripe;
1041 regSize = numBlocks;
1042 }
1043 /* multi-strip IOs always need to full stripe locked */
1044 } else if (io_info->IoforUnevenSpan == 0) {
1045 /*
1046 * For Even span region lock optimization.
1047 * If the start strip is the last in the start row
1048 */
1049 if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
1050 regStart += ref_in_start_stripe;
1051 /* initialize count to sectors from startref to end
1052 of strip */
1053 regSize = stripSize - ref_in_start_stripe;
1054 }
1055
1056 /* add complete rows in the middle of the transfer */
1057 if (numRows > 2)
1058 regSize += (numRows-2) << raid->stripeShift;
1059
1060 /* if IO ends within first strip of last row*/
1061 if (endStrip == endRow*raid->rowDataSize)
1062 regSize += ref_in_end_stripe+1;
1063 else
1064 regSize += stripSize;
1065 } else {
1066 /*
1067 * For Uneven span region lock optimization.
1068 * If the start strip is the last in the start row
1069 */
1070 if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
1071 SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
1072 regStart += ref_in_start_stripe;
1073 /* initialize count to sectors from
1074 * startRef to end of strip
1075 */
1076 regSize = stripSize - ref_in_start_stripe;
1077 }
1078 /* Add complete rows in the middle of the transfer*/
1079
1080 if (numRows > 2)
1081 /* Add complete rows in the middle of the transfer*/
1082 regSize += (numRows-2) << raid->stripeShift;
1083
1084 /* if IO ends within first strip of last row */
1085 if (endStrip == get_strip_from_row(instance, ld, endRow, map))
1086 regSize += ref_in_end_stripe + 1;
1087 else
1088 regSize += stripSize;
1089 }
1090
1091 pRAID_Context->timeoutValue =
1092 cpu_to_le16(raid->fpIoTimeoutForLd ?
1093 raid->fpIoTimeoutForLd :
1094 map->raidMap.fpPdIoTimeoutSec);
1095 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
1096 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
1097 pRAID_Context->regLockFlags = (isRead) ?
1098 raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
1099 else
1100 pRAID_Context->regLockFlags = (isRead) ?
1101 REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
1102 pRAID_Context->VirtualDiskTgtId = raid->targetId;
1103 pRAID_Context->regLockRowLBA = cpu_to_le64(regStart);
1104 pRAID_Context->regLockLength = cpu_to_le32(regSize);
1105 pRAID_Context->configSeqNum = raid->seqNum;
1106 /* save pointer to raid->LUN array */
1107 *raidLUN = raid->LUN;
1108
1109
1110 /*Get Phy Params only if FP capable, or else leave it to MR firmware
1111 to do the calculation.*/
1112 if (io_info->fpOkForIo) {
1113 retval = io_info->IoforUnevenSpan ?
1114 mr_spanset_get_phy_params(instance, ld,
1115 start_strip, ref_in_start_stripe,
1116 io_info, pRAID_Context, map) :
1117 MR_GetPhyParams(instance, ld, start_strip,
1118 ref_in_start_stripe, io_info,
1119 pRAID_Context, map);
1120 /* If IO on an invalid Pd, then FP is not possible.*/
1121 if (io_info->devHandle == cpu_to_le16(MR_PD_INVALID))
1122 io_info->fpOkForIo = FALSE;
1123 return retval;
1124 } else if (isRead) {
1125 uint stripIdx;
1126 for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
1127 retval = io_info->IoforUnevenSpan ?
1128 mr_spanset_get_phy_params(instance, ld,
1129 start_strip + stripIdx,
1130 ref_in_start_stripe, io_info,
1131 pRAID_Context, map) :
1132 MR_GetPhyParams(instance, ld,
1133 start_strip + stripIdx, ref_in_start_stripe,
1134 io_info, pRAID_Context, map);
1135 if (!retval)
1136 return TRUE;
1137 }
1138 }
1139
1140 #if SPAN_DEBUG
1141 /* Just for testing what arm we get for strip.*/
1142 if (io_info->IoforUnevenSpan)
1143 get_arm_from_strip(instance, ld, start_strip, map);
1144 #endif
1145 return TRUE;
1146 }
1147
1148 /*
1149 ******************************************************************************
1150 *
1151 * This routine pepare spanset info from Valid Raid map and store it into
1152 * local copy of ldSpanInfo per instance data structure.
1153 *
1154 * Inputs :
1155 * map - LD map
1156 * ldSpanInfo - ldSpanInfo per HBA instance
1157 *
1158 */
1159 void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
1160 PLD_SPAN_INFO ldSpanInfo)
1161 {
1162 u8 span, count;
1163 u32 element, span_row_width;
1164 u64 span_row;
1165 struct MR_LD_RAID *raid;
1166 LD_SPAN_SET *span_set, *span_set_prev;
1167 struct MR_QUAD_ELEMENT *quad;
1168 int ldCount;
1169 u16 ld;
1170
1171
1172 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1173 ld = MR_TargetIdToLdGet(ldCount, map);
1174 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
1175 continue;
1176 raid = MR_LdRaidGet(ld, map);
1177 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
1178 for (span = 0; span < raid->spanDepth; span++) {
1179 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
1180 block_span_info.noElements) <
1181 element + 1)
1182 continue;
1183 span_set = &(ldSpanInfo[ld].span_set[element]);
1184 quad = &map->raidMap.ldSpanMap[ld].
1185 spanBlock[span].block_span_info.
1186 quad[element];
1187
1188 span_set->diff = le32_to_cpu(quad->diff);
1189
1190 for (count = 0, span_row_width = 0;
1191 count < raid->spanDepth; count++) {
1192 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
1193 spanBlock[count].
1194 block_span_info.
1195 noElements) >= element + 1) {
1196 span_set->strip_offset[count] =
1197 span_row_width;
1198 span_row_width +=
1199 MR_LdSpanPtrGet
1200 (ld, count, map)->spanRowDataSize;
1201 printk(KERN_INFO "megasas:"
1202 "span %x rowDataSize %x\n",
1203 count, MR_LdSpanPtrGet
1204 (ld, count, map)->spanRowDataSize);
1205 }
1206 }
1207
1208 span_set->span_row_data_width = span_row_width;
1209 span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
1210 le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
1211 le32_to_cpu(quad->diff));
1212
1213 if (element == 0) {
1214 span_set->log_start_lba = 0;
1215 span_set->log_end_lba =
1216 ((span_row << raid->stripeShift)
1217 * span_row_width) - 1;
1218
1219 span_set->span_row_start = 0;
1220 span_set->span_row_end = span_row - 1;
1221
1222 span_set->data_strip_start = 0;
1223 span_set->data_strip_end =
1224 (span_row * span_row_width) - 1;
1225
1226 span_set->data_row_start = 0;
1227 span_set->data_row_end =
1228 (span_row * le32_to_cpu(quad->diff)) - 1;
1229 } else {
1230 span_set_prev = &(ldSpanInfo[ld].
1231 span_set[element - 1]);
1232 span_set->log_start_lba =
1233 span_set_prev->log_end_lba + 1;
1234 span_set->log_end_lba =
1235 span_set->log_start_lba +
1236 ((span_row << raid->stripeShift)
1237 * span_row_width) - 1;
1238
1239 span_set->span_row_start =
1240 span_set_prev->span_row_end + 1;
1241 span_set->span_row_end =
1242 span_set->span_row_start + span_row - 1;
1243
1244 span_set->data_strip_start =
1245 span_set_prev->data_strip_end + 1;
1246 span_set->data_strip_end =
1247 span_set->data_strip_start +
1248 (span_row * span_row_width) - 1;
1249
1250 span_set->data_row_start =
1251 span_set_prev->data_row_end + 1;
1252 span_set->data_row_end =
1253 span_set->data_row_start +
1254 (span_row * le32_to_cpu(quad->diff)) - 1;
1255 }
1256 break;
1257 }
1258 if (span == raid->spanDepth)
1259 break;
1260 }
1261 }
1262 #if SPAN_DEBUG
1263 getSpanInfo(map, ldSpanInfo);
1264 #endif
1265
1266 }
1267
1268 void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
1269 struct LD_LOAD_BALANCE_INFO *lbInfo)
1270 {
1271 int ldCount;
1272 u16 ld;
1273 struct MR_LD_RAID *raid;
1274
1275 if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
1276 lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
1277
1278 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1279 ld = MR_TargetIdToLdGet(ldCount, drv_map);
1280 if (ld >= MAX_LOGICAL_DRIVES_EXT) {
1281 lbInfo[ldCount].loadBalanceFlag = 0;
1282 continue;
1283 }
1284
1285 raid = MR_LdRaidGet(ld, drv_map);
1286 if ((raid->level != 1) ||
1287 (raid->ldState != MR_LD_STATE_OPTIMAL)) {
1288 lbInfo[ldCount].loadBalanceFlag = 0;
1289 continue;
1290 }
1291 lbInfo[ldCount].loadBalanceFlag = 1;
1292 }
1293 }
1294
1295 u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
1296 struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
1297 {
1298 struct fusion_context *fusion;
1299 struct MR_LD_RAID *raid;
1300 struct MR_DRV_RAID_MAP_ALL *drv_map;
1301 u16 pend0, pend1, ld;
1302 u64 diff0, diff1;
1303 u8 bestArm, pd0, pd1, span, arm;
1304 u32 arRef, span_row_size;
1305
1306 u64 block = io_info->ldStartBlock;
1307 u32 count = io_info->numBlocks;
1308
1309 span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
1310 >> RAID_CTX_SPANARM_SPAN_SHIFT);
1311 arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
1312
1313
1314 fusion = instance->ctrl_context;
1315 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
1316 ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
1317 raid = MR_LdRaidGet(ld, drv_map);
1318 span_row_size = instance->UnevenSpanSupport ?
1319 SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
1320
1321 arRef = MR_LdSpanArrayGet(ld, span, drv_map);
1322 pd0 = MR_ArPdGet(arRef, arm, drv_map);
1323 pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
1324 (arm + 1 - span_row_size) : arm + 1, drv_map);
1325
1326 /* get the pending cmds for the data and mirror arms */
1327 pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
1328 pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
1329
1330 /* Determine the disk whose head is nearer to the req. block */
1331 diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
1332 diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
1333 bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
1334
1335 if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
1336 (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
1337 bestArm ^= 1;
1338
1339 /* Update the last accessed block on the correct pd */
1340 io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
1341 lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
1342 io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
1343 #if SPAN_DEBUG
1344 if (arm != bestArm)
1345 dev_dbg(&instance->pdev->dev, "LSI Debug R1 Load balance "
1346 "occur - span 0x%x arm 0x%x bestArm 0x%x "
1347 "io_info->span_arm 0x%x\n",
1348 span, arm, bestArm, io_info->span_arm);
1349 #endif
1350 return io_info->pd_after_lb;
1351 }
1352
1353 __le16 get_updated_dev_handle(struct megasas_instance *instance,
1354 struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
1355 {
1356 u8 arm_pd;
1357 __le16 devHandle;
1358 struct fusion_context *fusion;
1359 struct MR_DRV_RAID_MAP_ALL *drv_map;
1360
1361 fusion = instance->ctrl_context;
1362 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
1363
1364 /* get best new arm (PD ID) */
1365 arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info);
1366 devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
1367 atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
1368 return devHandle;
1369 }
Linux with added FPC-III support