2 * simple driver for PWM (Pulse Width Modulator) controller
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15 #include <linux/err.h>
16 #include <linux/clk.h>
18 #include <linux/pwm.h>
19 #include <linux/of_device.h>
21 /* i.MX1 and i.MX21 share the same PWM function block: */
23 #define MX1_PWMC 0x00 /* PWM Control Register */
24 #define MX1_PWMS 0x04 /* PWM Sample Register */
25 #define MX1_PWMP 0x08 /* PWM Period Register */
27 #define MX1_PWMC_EN (1 << 4)
29 /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
31 #define MX3_PWMCR 0x00 /* PWM Control Register */
32 #define MX3_PWMSAR 0x0C /* PWM Sample Register */
33 #define MX3_PWMPR 0x10 /* PWM Period Register */
34 #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35 #define MX3_PWMCR_DOZEEN (1 << 24)
36 #define MX3_PWMCR_WAITEN (1 << 23)
37 #define MX3_PWMCR_DBGEN (1 << 22)
38 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
39 #define MX3_PWMCR_CLKSRC_IPG (1 << 16)
40 #define MX3_PWMCR_EN (1 << 0)
46 void __iomem
*mmio_base
;
50 int (*config
)(struct pwm_chip
*chip
,
51 struct pwm_device
*pwm
, int duty_ns
, int period_ns
);
52 void (*set_enable
)(struct pwm_chip
*chip
, bool enable
);
55 #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
57 static int imx_pwm_config_v1(struct pwm_chip
*chip
,
58 struct pwm_device
*pwm
, int duty_ns
, int period_ns
)
60 struct imx_chip
*imx
= to_imx_chip(chip
);
63 * The PWM subsystem allows for exact frequencies. However,
64 * I cannot connect a scope on my device to the PWM line and
65 * thus cannot provide the program the PWM controller
66 * exactly. Instead, I'm relying on the fact that the
67 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
68 * function group already. So I'll just modify the PWM sample
69 * register to follow the ratio of duty_ns vs. period_ns
72 * This is good enough for programming the brightness of
75 * The real implementation would divide PERCLK[0] first by
76 * both the prescaler (/1 .. /128) and then by CLKSEL
79 u32 max
= readl(imx
->mmio_base
+ MX1_PWMP
);
80 u32 p
= max
* duty_ns
/ period_ns
;
81 writel(max
- p
, imx
->mmio_base
+ MX1_PWMS
);
86 static void imx_pwm_set_enable_v1(struct pwm_chip
*chip
, bool enable
)
88 struct imx_chip
*imx
= to_imx_chip(chip
);
91 val
= readl(imx
->mmio_base
+ MX1_PWMC
);
98 writel(val
, imx
->mmio_base
+ MX1_PWMC
);
101 static int imx_pwm_config_v2(struct pwm_chip
*chip
,
102 struct pwm_device
*pwm
, int duty_ns
, int period_ns
)
104 struct imx_chip
*imx
= to_imx_chip(chip
);
105 unsigned long long c
;
106 unsigned long period_cycles
, duty_cycles
, prescale
;
109 c
= clk_get_rate(imx
->clk_per
);
111 do_div(c
, 1000000000);
114 prescale
= period_cycles
/ 0x10000 + 1;
116 period_cycles
/= prescale
;
117 c
= (unsigned long long)period_cycles
* duty_ns
;
118 do_div(c
, period_ns
);
122 * according to imx pwm RM, the real period value should be
123 * PERIOD value in PWMPR plus 2.
125 if (period_cycles
> 2)
130 writel(duty_cycles
, imx
->mmio_base
+ MX3_PWMSAR
);
131 writel(period_cycles
, imx
->mmio_base
+ MX3_PWMPR
);
133 cr
= MX3_PWMCR_PRESCALER(prescale
) |
134 MX3_PWMCR_DOZEEN
| MX3_PWMCR_WAITEN
|
135 MX3_PWMCR_DBGEN
| MX3_PWMCR_CLKSRC_IPG_HIGH
;
137 if (test_bit(PWMF_ENABLED
, &pwm
->flags
))
140 writel(cr
, imx
->mmio_base
+ MX3_PWMCR
);
145 static void imx_pwm_set_enable_v2(struct pwm_chip
*chip
, bool enable
)
147 struct imx_chip
*imx
= to_imx_chip(chip
);
150 val
= readl(imx
->mmio_base
+ MX3_PWMCR
);
155 val
&= ~MX3_PWMCR_EN
;
157 writel(val
, imx
->mmio_base
+ MX3_PWMCR
);
160 static int imx_pwm_config(struct pwm_chip
*chip
,
161 struct pwm_device
*pwm
, int duty_ns
, int period_ns
)
163 struct imx_chip
*imx
= to_imx_chip(chip
);
166 ret
= clk_prepare_enable(imx
->clk_ipg
);
170 ret
= imx
->config(chip
, pwm
, duty_ns
, period_ns
);
172 clk_disable_unprepare(imx
->clk_ipg
);
177 static int imx_pwm_enable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
179 struct imx_chip
*imx
= to_imx_chip(chip
);
182 ret
= clk_prepare_enable(imx
->clk_per
);
186 imx
->set_enable(chip
, true);
191 static void imx_pwm_disable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
193 struct imx_chip
*imx
= to_imx_chip(chip
);
195 imx
->set_enable(chip
, false);
197 clk_disable_unprepare(imx
->clk_per
);
200 static struct pwm_ops imx_pwm_ops
= {
201 .enable
= imx_pwm_enable
,
202 .disable
= imx_pwm_disable
,
203 .config
= imx_pwm_config
,
204 .owner
= THIS_MODULE
,
207 struct imx_pwm_data
{
208 int (*config
)(struct pwm_chip
*chip
,
209 struct pwm_device
*pwm
, int duty_ns
, int period_ns
);
210 void (*set_enable
)(struct pwm_chip
*chip
, bool enable
);
213 static struct imx_pwm_data imx_pwm_data_v1
= {
214 .config
= imx_pwm_config_v1
,
215 .set_enable
= imx_pwm_set_enable_v1
,
218 static struct imx_pwm_data imx_pwm_data_v2
= {
219 .config
= imx_pwm_config_v2
,
220 .set_enable
= imx_pwm_set_enable_v2
,
223 static const struct of_device_id imx_pwm_dt_ids
[] = {
224 { .compatible
= "fsl,imx1-pwm", .data
= &imx_pwm_data_v1
, },
225 { .compatible
= "fsl,imx27-pwm", .data
= &imx_pwm_data_v2
, },
228 MODULE_DEVICE_TABLE(of
, imx_pwm_dt_ids
);
230 static int imx_pwm_probe(struct platform_device
*pdev
)
232 const struct of_device_id
*of_id
=
233 of_match_device(imx_pwm_dt_ids
, &pdev
->dev
);
234 const struct imx_pwm_data
*data
;
235 struct imx_chip
*imx
;
242 imx
= devm_kzalloc(&pdev
->dev
, sizeof(*imx
), GFP_KERNEL
);
244 dev_err(&pdev
->dev
, "failed to allocate memory\n");
248 imx
->clk_per
= devm_clk_get(&pdev
->dev
, "per");
249 if (IS_ERR(imx
->clk_per
)) {
250 dev_err(&pdev
->dev
, "getting per clock failed with %ld\n",
251 PTR_ERR(imx
->clk_per
));
252 return PTR_ERR(imx
->clk_per
);
255 imx
->clk_ipg
= devm_clk_get(&pdev
->dev
, "ipg");
256 if (IS_ERR(imx
->clk_ipg
)) {
257 dev_err(&pdev
->dev
, "getting ipg clock failed with %ld\n",
258 PTR_ERR(imx
->clk_ipg
));
259 return PTR_ERR(imx
->clk_ipg
);
262 imx
->chip
.ops
= &imx_pwm_ops
;
263 imx
->chip
.dev
= &pdev
->dev
;
267 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
268 imx
->mmio_base
= devm_ioremap_resource(&pdev
->dev
, r
);
269 if (IS_ERR(imx
->mmio_base
))
270 return PTR_ERR(imx
->mmio_base
);
273 imx
->config
= data
->config
;
274 imx
->set_enable
= data
->set_enable
;
276 ret
= pwmchip_add(&imx
->chip
);
280 platform_set_drvdata(pdev
, imx
);
284 static int imx_pwm_remove(struct platform_device
*pdev
)
286 struct imx_chip
*imx
;
288 imx
= platform_get_drvdata(pdev
);
292 return pwmchip_remove(&imx
->chip
);
295 static struct platform_driver imx_pwm_driver
= {
298 .owner
= THIS_MODULE
,
299 .of_match_table
= of_match_ptr(imx_pwm_dt_ids
),
301 .probe
= imx_pwm_probe
,
302 .remove
= imx_pwm_remove
,
305 module_platform_driver(imx_pwm_driver
);
307 MODULE_LICENSE("GPL v2");
308 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");