?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
perf record: Fix segfault with --no-mmap-pages
[linux/fpc-iii.git] / drivers / scsi / mac_esp.c
blob994fc5caf036c89434f1231425696ec6ecd398ba
1 /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
2 *
3 * Adapted from jazz_esp.c and the old mac_esp.c.
4 *
5 * The pseudo DMA algorithm is based on the one used in NetBSD.
6 * See sys/arch/mac68k/obio/esp.c for some background information.
7 *
8 * Copyright (C) 2007-2008 Finn Thain
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/scatterlist.h>
19 #include <linux/delay.h>
20 #include <linux/io.h>
21 #include <linux/nubus.h>
22 #include <linux/slab.h>
23
24 #include <asm/irq.h>
25 #include <asm/dma.h>
26 #include <asm/macints.h>
27 #include <asm/macintosh.h>
28 #include <asm/mac_via.h>
29
30 #include <scsi/scsi_host.h>
31
32 #include "esp_scsi.h"
33
34 #define DRV_MODULE_NAME "mac_esp"
35 #define PFX DRV_MODULE_NAME ": "
36 #define DRV_VERSION "1.000"
37 #define DRV_MODULE_RELDATE "Sept 15, 2007"
38
39 #define MAC_ESP_IO_BASE 0x50F00000
40 #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
41 #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
42 #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
43 #define MAC_ESP_REGS_SPACING 0x402
44 #define MAC_ESP_PDMA_REG 0xF9800024
45 #define MAC_ESP_PDMA_REG_SPACING 0x4
46 #define MAC_ESP_PDMA_IO_OFFSET 0x100
47
48 #define esp_read8(REG) mac_esp_read8(esp, REG)
49 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
50
51 struct mac_esp_priv {
52 struct esp *esp;
53 void __iomem *pdma_regs;
54 void __iomem *pdma_io;
55 int error;
56 };
57 static struct esp *esp_chips[2];
58
59 #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
60 platform_get_drvdata((struct platform_device *) \
61 (esp->dev)))
62
63 static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
64 {
65 nubus_writeb(val, esp->regs + reg * 16);
66 }
67
68 static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
69 {
70 return nubus_readb(esp->regs + reg * 16);
71 }
72
73 /* For pseudo DMA and PIO we need the virtual address
74 * so this address mapping is the identity mapping.
75 */
76
77 static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
78 size_t sz, int dir)
79 {
80 return (dma_addr_t)buf;
81 }
82
83 static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
84 int num_sg, int dir)
85 {
86 int i;
87
88 for (i = 0; i < num_sg; i++)
89 sg[i].dma_address = (u32)sg_virt(&sg[i]);
90 return num_sg;
91 }
92
93 static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
94 size_t sz, int dir)
95 {
96 /* Nothing to do. */
97 }
98
99 static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
100 int num_sg, int dir)
101 {
102 /* Nothing to do. */
103 }
104
105 static void mac_esp_reset_dma(struct esp *esp)
106 {
107 /* Nothing to do. */
108 }
109
110 static void mac_esp_dma_drain(struct esp *esp)
111 {
112 /* Nothing to do. */
113 }
114
115 static void mac_esp_dma_invalidate(struct esp *esp)
116 {
117 /* Nothing to do. */
118 }
119
120 static int mac_esp_dma_error(struct esp *esp)
121 {
122 return MAC_ESP_GET_PRIV(esp)->error;
123 }
124
125 static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
126 {
127 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
128 int i = 500000;
129
130 do {
131 if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
132 return 0;
133
134 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
135 return 1;
136
137 udelay(2);
138 } while (--i);
139
140 printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
141 esp_read8(ESP_STATUS));
142 mep->error = 1;
143 return 1;
144 }
145
146 static inline int mac_esp_wait_for_dreq(struct esp *esp)
147 {
148 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
149 int i = 500000;
150
151 do {
152 if (mep->pdma_regs == NULL) {
153 if (via2_scsi_drq_pending())
154 return 0;
155 } else {
156 if (nubus_readl(mep->pdma_regs) & 0x200)
157 return 0;
158 }
159
160 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
161 return 1;
162
163 udelay(2);
164 } while (--i);
165
166 printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
167 esp_read8(ESP_STATUS));
168 mep->error = 1;
169 return 1;
170 }
171
172 #define MAC_ESP_PDMA_LOOP(operands) \
173 asm volatile ( \
174 " tstw %1 \n" \
175 " jbeq 20f \n" \
176 "1: movew " operands " \n" \
177 "2: movew " operands " \n" \
178 "3: movew " operands " \n" \
179 "4: movew " operands " \n" \
180 "5: movew " operands " \n" \
181 "6: movew " operands " \n" \
182 "7: movew " operands " \n" \
183 "8: movew " operands " \n" \
184 "9: movew " operands " \n" \
185 "10: movew " operands " \n" \
186 "11: movew " operands " \n" \
187 "12: movew " operands " \n" \
188 "13: movew " operands " \n" \
189 "14: movew " operands " \n" \
190 "15: movew " operands " \n" \
191 "16: movew " operands " \n" \
192 " subqw #1,%1 \n" \
193 " jbne 1b \n" \
194 "20: tstw %2 \n" \
195 " jbeq 30f \n" \
196 "21: movew " operands " \n" \
197 " subqw #1,%2 \n" \
198 " jbne 21b \n" \
199 "30: tstw %3 \n" \
200 " jbeq 40f \n" \
201 "31: moveb " operands " \n" \
202 "32: nop \n" \
203 "40: \n" \
204 " \n" \
205 " .section __ex_table,\"a\" \n" \
206 " .align 4 \n" \
207 " .long 1b,40b \n" \
208 " .long 2b,40b \n" \
209 " .long 3b,40b \n" \
210 " .long 4b,40b \n" \
211 " .long 5b,40b \n" \
212 " .long 6b,40b \n" \
213 " .long 7b,40b \n" \
214 " .long 8b,40b \n" \
215 " .long 9b,40b \n" \
216 " .long 10b,40b \n" \
217 " .long 11b,40b \n" \
218 " .long 12b,40b \n" \
219 " .long 13b,40b \n" \
220 " .long 14b,40b \n" \
221 " .long 15b,40b \n" \
222 " .long 16b,40b \n" \
223 " .long 21b,40b \n" \
224 " .long 31b,40b \n" \
225 " .long 32b,40b \n" \
226 " .previous \n" \
227 : "+a" (addr), "+r" (count32), "+r" (count2) \
228 : "g" (count1), "a" (mep->pdma_io))
229
230 static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
231 u32 dma_count, int write, u8 cmd)
232 {
233 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
234
235 mep->error = 0;
236
237 if (!write)
238 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
239
240 esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
241 esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
242
243 scsi_esp_cmd(esp, cmd);
244
245 do {
246 unsigned int count32 = esp_count >> 5;
247 unsigned int count2 = (esp_count & 0x1F) >> 1;
248 unsigned int count1 = esp_count & 1;
249 unsigned int start_addr = addr;
250
251 if (mac_esp_wait_for_dreq(esp))
252 break;
253
254 if (write) {
255 MAC_ESP_PDMA_LOOP("%4@,%0@+");
256
257 esp_count -= addr - start_addr;
258 } else {
259 unsigned int n;
260
261 MAC_ESP_PDMA_LOOP("%0@+,%4@");
262
263 if (mac_esp_wait_for_empty_fifo(esp))
264 break;
265
266 n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
267 addr = start_addr + esp_count - n;
268 esp_count = n;
269 }
270 } while (esp_count);
271 }
272
273 /*
274 * Programmed IO routines follow.
275 */
276
277 static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
278 {
279 int i = 500000;
280
281 do {
282 unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
283
284 if (fbytes)
285 return fbytes;
286
287 udelay(2);
288 } while (--i);
289
290 printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
291 esp_read8(ESP_STATUS));
292 return 0;
293 }
294
295 static inline int mac_esp_wait_for_intr(struct esp *esp)
296 {
297 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
298 int i = 500000;
299
300 do {
301 esp->sreg = esp_read8(ESP_STATUS);
302 if (esp->sreg & ESP_STAT_INTR)
303 return 0;
304
305 udelay(2);
306 } while (--i);
307
308 printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
309 mep->error = 1;
310 return 1;
311 }
312
313 #define MAC_ESP_PIO_LOOP(operands, reg1) \
314 asm volatile ( \
315 "1: moveb " operands " \n" \
316 " subqw #1,%1 \n" \
317 " jbne 1b \n" \
318 : "+a" (addr), "+r" (reg1) \
319 : "a" (fifo))
320
321 #define MAC_ESP_PIO_FILL(operands, reg1) \
322 asm volatile ( \
323 " moveb " operands " \n" \
324 " moveb " operands " \n" \
325 " moveb " operands " \n" \
326 " moveb " operands " \n" \
327 " moveb " operands " \n" \
328 " moveb " operands " \n" \
329 " moveb " operands " \n" \
330 " moveb " operands " \n" \
331 " moveb " operands " \n" \
332 " moveb " operands " \n" \
333 " moveb " operands " \n" \
334 " moveb " operands " \n" \
335 " moveb " operands " \n" \
336 " moveb " operands " \n" \
337 " moveb " operands " \n" \
338 " moveb " operands " \n" \
339 " subqw #8,%1 \n" \
340 " subqw #8,%1 \n" \
341 : "+a" (addr), "+r" (reg1) \
342 : "a" (fifo))
343
344 #define MAC_ESP_FIFO_SIZE 16
345
346 static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
347 u32 dma_count, int write, u8 cmd)
348 {
349 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
350 u8 *fifo = esp->regs + ESP_FDATA * 16;
351
352 cmd &= ~ESP_CMD_DMA;
353 mep->error = 0;
354
355 if (write) {
356 scsi_esp_cmd(esp, cmd);
357
358 while (1) {
359 unsigned int n;
360
361 n = mac_esp_wait_for_fifo(esp);
362 if (!n)
363 break;
364
365 if (n > esp_count)
366 n = esp_count;
367 esp_count -= n;
368
369 MAC_ESP_PIO_LOOP("%2@,%0@+", n);
370
371 if (!esp_count)
372 break;
373
374 if (mac_esp_wait_for_intr(esp))
375 break;
376
377 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
378 ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
379 break;
380
381 esp->ireg = esp_read8(ESP_INTRPT);
382 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
383 ESP_INTR_BSERV)
384 break;
385
386 scsi_esp_cmd(esp, ESP_CMD_TI);
387 }
388 } else {
389 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
390
391 if (esp_count >= MAC_ESP_FIFO_SIZE)
392 MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
393 else
394 MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
395
396 scsi_esp_cmd(esp, cmd);
397
398 while (esp_count) {
399 unsigned int n;
400
401 if (mac_esp_wait_for_intr(esp))
402 break;
403
404 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
405 ((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
406 break;
407
408 esp->ireg = esp_read8(ESP_INTRPT);
409 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
410 ESP_INTR_BSERV)
411 break;
412
413 n = MAC_ESP_FIFO_SIZE -
414 (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
415 if (n > esp_count)
416 n = esp_count;
417
418 if (n == MAC_ESP_FIFO_SIZE) {
419 MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
420 } else {
421 esp_count -= n;
422 MAC_ESP_PIO_LOOP("%0@+,%2@", n);
423 }
424
425 scsi_esp_cmd(esp, ESP_CMD_TI);
426 }
427 }
428 }
429
430 static int mac_esp_irq_pending(struct esp *esp)
431 {
432 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
433 return 1;
434 return 0;
435 }
436
437 static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
438 {
439 return dma_len > 0xFFFF ? 0xFFFF : dma_len;
440 }
441
442 static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
443 {
444 int got_intr;
445
446 /*
447 * This is an edge triggered IRQ, so we have to be careful to
448 * avoid missing a transition when it is shared by two ESP devices.
449 */
450
451 do {
452 got_intr = 0;
453 if (esp_chips[0] &&
454 (mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
455 (void)scsi_esp_intr(irq, esp_chips[0]);
456 got_intr = 1;
457 }
458 if (esp_chips[1] &&
459 (mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
460 (void)scsi_esp_intr(irq, esp_chips[1]);
461 got_intr = 1;
462 }
463 } while (got_intr);
464
465 return IRQ_HANDLED;
466 }
467
468 static struct esp_driver_ops mac_esp_ops = {
469 .esp_write8 = mac_esp_write8,
470 .esp_read8 = mac_esp_read8,
471 .map_single = mac_esp_map_single,
472 .map_sg = mac_esp_map_sg,
473 .unmap_single = mac_esp_unmap_single,
474 .unmap_sg = mac_esp_unmap_sg,
475 .irq_pending = mac_esp_irq_pending,
476 .dma_length_limit = mac_esp_dma_length_limit,
477 .reset_dma = mac_esp_reset_dma,
478 .dma_drain = mac_esp_dma_drain,
479 .dma_invalidate = mac_esp_dma_invalidate,
480 .send_dma_cmd = mac_esp_send_pdma_cmd,
481 .dma_error = mac_esp_dma_error,
482 };
483
484 static int esp_mac_probe(struct platform_device *dev)
485 {
486 struct scsi_host_template *tpnt = &scsi_esp_template;
487 struct Scsi_Host *host;
488 struct esp *esp;
489 int err;
490 struct mac_esp_priv *mep;
491
492 if (!MACH_IS_MAC)
493 return -ENODEV;
494
495 if (dev->id > 1)
496 return -ENODEV;
497
498 host = scsi_host_alloc(tpnt, sizeof(struct esp));
499
500 err = -ENOMEM;
501 if (!host)
502 goto fail;
503
504 host->max_id = 8;
505 host->use_clustering = DISABLE_CLUSTERING;
506 esp = shost_priv(host);
507
508 esp->host = host;
509 esp->dev = dev;
510
511 esp->command_block = kzalloc(16, GFP_KERNEL);
512 if (!esp->command_block)
513 goto fail_unlink;
514 esp->command_block_dma = (dma_addr_t)esp->command_block;
515
516 esp->scsi_id = 7;
517 host->this_id = esp->scsi_id;
518 esp->scsi_id_mask = 1 << esp->scsi_id;
519
520 mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
521 if (!mep)
522 goto fail_free_command_block;
523 mep->esp = esp;
524 platform_set_drvdata(dev, mep);
525
526 switch (macintosh_config->scsi_type) {
527 case MAC_SCSI_QUADRA:
528 esp->cfreq = 16500000;
529 esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
530 mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
531 mep->pdma_regs = NULL;
532 break;
533 case MAC_SCSI_QUADRA2:
534 esp->cfreq = 25000000;
535 esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
536 dev->id * MAC_ESP_REGS_SPACING);
537 mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
538 mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
539 dev->id * MAC_ESP_PDMA_REG_SPACING);
540 nubus_writel(0x1d1, mep->pdma_regs);
541 break;
542 case MAC_SCSI_QUADRA3:
543 /* These quadras have a real DMA controller (the PSC) but we
544 * don't know how to drive it so we must use PIO instead.
545 */
546 esp->cfreq = 25000000;
547 esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
548 mep->pdma_io = NULL;
549 mep->pdma_regs = NULL;
550 break;
551 }
552
553 esp->ops = &mac_esp_ops;
554 if (mep->pdma_io == NULL) {
555 printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
556 esp_write8(0, ESP_TCLOW);
557 esp_write8(0, ESP_TCMED);
558 esp->flags = ESP_FLAG_DISABLE_SYNC;
559 mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
560 } else {
561 printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
562 }
563
564 host->irq = IRQ_MAC_SCSI;
565 esp_chips[dev->id] = esp;
566 mb();
567 if (esp_chips[!dev->id] == NULL) {
568 err = request_irq(host->irq, mac_scsi_esp_intr, 0, "ESP", NULL);
569 if (err < 0) {
570 esp_chips[dev->id] = NULL;
571 goto fail_free_priv;
572 }
573 }
574
575 err = scsi_esp_register(esp, &dev->dev);
576 if (err)
577 goto fail_free_irq;
578
579 return 0;
580
581 fail_free_irq:
582 if (esp_chips[!dev->id] == NULL)
583 free_irq(host->irq, esp);
584 fail_free_priv:
585 kfree(mep);
586 fail_free_command_block:
587 kfree(esp->command_block);
588 fail_unlink:
589 scsi_host_put(host);
590 fail:
591 return err;
592 }
593
594 static int esp_mac_remove(struct platform_device *dev)
595 {
596 struct mac_esp_priv *mep = platform_get_drvdata(dev);
597 struct esp *esp = mep->esp;
598 unsigned int irq = esp->host->irq;
599
600 scsi_esp_unregister(esp);
601
602 esp_chips[dev->id] = NULL;
603 if (!(esp_chips[0] || esp_chips[1]))
604 free_irq(irq, NULL);
605
606 kfree(mep);
607
608 kfree(esp->command_block);
609
610 scsi_host_put(esp->host);
611
612 return 0;
613 }
614
615 static struct platform_driver esp_mac_driver = {
616 .probe = esp_mac_probe,
617 .remove = esp_mac_remove,
618 .driver = {
619 .name = DRV_MODULE_NAME,
620 .owner = THIS_MODULE,
621 },
622 };
623
624 static int __init mac_esp_init(void)
625 {
626 return platform_driver_register(&esp_mac_driver);
627 }
628
629 static void __exit mac_esp_exit(void)
630 {
631 platform_driver_unregister(&esp_mac_driver);
632 }
633
634 MODULE_DESCRIPTION("Mac ESP SCSI driver");
635 MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
636 MODULE_LICENSE("GPL v2");
637 MODULE_VERSION(DRV_VERSION);
638 MODULE_ALIAS("platform:" DRV_MODULE_NAME);
639
640 module_init(mac_esp_init);
641 module_exit(mac_esp_exit);
Linux with added FPC-III support