2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 1995 Waldorf Electronics
7 * Written by Ralf Baechle and Andreas Busse
8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle
9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
16 #include <linux/init.h>
17 #include <linux/threads.h>
19 #include <asm/addrspace.h>
21 #include <asm/asmmacro.h>
22 #include <asm/irqflags.h>
23 #include <asm/regdef.h>
24 #include <asm/mipsregs.h>
25 #include <asm/stackframe.h>
27 #include <kernel-entry-init.h>
30 * For the moment disable interrupts, mark the kernel mode and
31 * set ST0_KX so that the CPU does not spit fire when using
32 * 64-bit addresses. A full initialization of the CPU's status
33 * register is done later in per_cpu_trap_init().
35 .macro setup_c0_status set clr
38 or t0, ST0_CU0|\set|0x1f|\clr
46 .macro setup_c0_status_pri
48 setup_c0_status ST0_KX 0
54 .macro setup_c0_status_sec
56 setup_c0_status ST0_KX ST0_BEV
58 setup_c0_status 0 ST0_BEV
62 #ifndef CONFIG_NO_EXCEPT_FILL
64 * Reserved space for exception handlers.
65 * Necessary for machines which link their kernels at KSEG0.
72 #ifdef CONFIG_BOOT_RAW
74 * Give us a fighting chance of running if execution beings at the
75 * kernel load address. This is needed because this platform does
76 * not have a ELF loader yet.
78 FEXPORT(__kernel_entry)
80 #endif /* CONFIG_BOOT_RAW */
84 NESTED(kernel_entry, 16, sp) # kernel entry point
86 kernel_entry_setup # cpu specific setup
90 /* We might not get launched at the address the kernel is linked to,
97 #if defined(CONFIG_MIPS_RAW_APPENDED_DTB) || \
98 defined(CONFIG_MIPS_ELF_APPENDED_DTB)
100 PTR_LA t2, __appended_dtb
102 #ifdef CONFIG_CPU_BIG_ENDIAN
104 #else /* !CONFIG_CPU_BIG_ENDIAN */
106 #endif /* !CONFIG_CPU_BIG_ENDIAN */
108 beq t0, t1, dtb_found
109 #endif /* CONFIG_MIPS_RAW_APPENDED_DTB || CONFIG_MIPS_ELF_APPENDED_DTB */
112 beq a0, t1, dtb_found
116 #endif /* CONFIG_USE_OF */
117 PTR_LA t0, __bss_start # clear .bss
119 PTR_LA t1, __bss_stop - LONGSIZE
121 PTR_ADDIU t0, LONGSIZE
125 LONG_S a0, fw_arg0 # firmware arguments
131 LONG_S t2, fw_passed_dtb
134 MTC0 zero, CP0_CONTEXT # clear context register
135 PTR_LA $28, init_thread_union
136 /* Set the SP after an empty pt_regs. */
137 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
139 back_to_back_c0_hazard
140 set_saved_sp sp, t0, t1
141 PTR_SUBU sp, 4 * SZREG # init stack pointer
143 #ifdef CONFIG_RELOCATABLE
144 /* Copy kernel and apply the relocations */
147 /* Repoint the sp into the new kernel image */
148 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
150 set_saved_sp sp, t0, t1
151 PTR_SUBU sp, 4 * SZREG # init stack pointer
154 * relocate_kernel returns the entry point either
155 * in the relocated kernel or the original if for
156 * some reason relocation failed - jump there now
157 * with instruction hazard barrier because of the
158 * newly sync'd icache.
161 #else /* !CONFIG_RELOCATABLE */
163 #endif /* !CONFIG_RELOCATABLE */
168 * SMP slave cpus entry point. Board specific code for bootstrap calls this
169 * function after setting up the stack and gp registers.
171 NESTED(smp_bootstrap, 16, sp)
176 #endif /* CONFIG_SMP */