arch/arm/mach-realview/realview_pb11mp.c

   1 /*
   2  *  linux/arch/arm/mach-realview/realview_pb11mp.c
   3  *
   4  *  Copyright (C) 2008 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/sysdev.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl061.h>
  27 #include <linux/amba/mmci.h>
  28 #include <linux/io.h>
  29
  30 #include <mach/hardware.h>
  31 #include <asm/irq.h>
  32 #include <asm/leds.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/hardware/gic.h>
  35 #include <asm/hardware/icst307.h>
  36 #include <asm/hardware/cache-l2x0.h>
  37 #include <asm/localtimer.h>
  38
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/flash.h>
  41 #include <asm/mach/map.h>
  42 #include <asm/mach/time.h>
  43
  44 #include <mach/board-pb11mp.h>
  45 #include <mach/irqs.h>
  46
  47 #include "core.h"
  48 #include "clock.h"
  49
  50 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
  51         {
  52                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  53                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  54                 .length         = SZ_4K,
  55                 .type           = MT_DEVICE,
  56         }, {
  57                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
  58                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
  59                 .length         = SZ_4K,
  60                 .type           = MT_DEVICE,
  61         }, {
  62                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
  63                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
  64                 .length         = SZ_4K,
  65                 .type           = MT_DEVICE,
  66         }, {
  67                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
  68                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
  69                 .length         = SZ_4K,
  70                 .type           = MT_DEVICE,
  71         }, {
  72                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
  73                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
  74                 .length         = SZ_4K,
  75                 .type           = MT_DEVICE,
  76         }, {
  77                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  78                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  79                 .length         = SZ_4K,
  80                 .type           = MT_DEVICE,
  81         }, {
  82                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
  83                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
  84                 .length         = SZ_4K,
  85                 .type           = MT_DEVICE,
  86         }, {
  87                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
  88                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
  89                 .length         = SZ_4K,
  90                 .type           = MT_DEVICE,
  91         }, {
  92                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
  93                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
  94                 .length         = SZ_8K,
  95                 .type           = MT_DEVICE,
  96         },
  97 #ifdef CONFIG_DEBUG_LL
  98         {
  99                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
 100                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
 101                 .length         = SZ_4K,
 102                 .type           = MT_DEVICE,
 103         },
 104 #endif
 105 };
 106
 107 static void __init realview_pb11mp_map_io(void)
 108 {
 109         iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
 110 }
 111
 112 static struct pl061_platform_data gpio0_plat_data = {
 113         .gpio_base      = 0,
 114         .irq_base       = -1,
 115 };
 116
 117 static struct pl061_platform_data gpio1_plat_data = {
 118         .gpio_base      = 8,
 119         .irq_base       = -1,
 120 };
 121
 122 static struct pl061_platform_data gpio2_plat_data = {
 123         .gpio_base      = 16,
 124         .irq_base       = -1,
 125 };
 126
 127 /*
 128  * RealView PB11MPCore AMBA devices
 129  */
 130
 131 #define GPIO2_IRQ               { IRQ_PB11MP_GPIO2, NO_IRQ }
 132 #define GPIO2_DMA               { 0, 0 }
 133 #define GPIO3_IRQ               { IRQ_PB11MP_GPIO3, NO_IRQ }
 134 #define GPIO3_DMA               { 0, 0 }
 135 #define AACI_IRQ                { IRQ_TC11MP_AACI, NO_IRQ }
 136 #define AACI_DMA                { 0x80, 0x81 }
 137 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
 138 #define MMCI0_DMA               { 0x84, 0 }
 139 #define KMI0_IRQ                { IRQ_TC11MP_KMI0, NO_IRQ }
 140 #define KMI0_DMA                { 0, 0 }
 141 #define KMI1_IRQ                { IRQ_TC11MP_KMI1, NO_IRQ }
 142 #define KMI1_DMA                { 0, 0 }
 143 #define PB11MP_SMC_IRQ          { NO_IRQ, NO_IRQ }
 144 #define PB11MP_SMC_DMA          { 0, 0 }
 145 #define MPMC_IRQ                { NO_IRQ, NO_IRQ }
 146 #define MPMC_DMA                { 0, 0 }
 147 #define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD, NO_IRQ }
 148 #define PB11MP_CLCD_DMA         { 0, 0 }
 149 #define DMAC_IRQ                { IRQ_PB11MP_DMAC, NO_IRQ }
 150 #define DMAC_DMA                { 0, 0 }
 151 #define SCTL_IRQ                { NO_IRQ, NO_IRQ }
 152 #define SCTL_DMA                { 0, 0 }
 153 #define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG, NO_IRQ }
 154 #define PB11MP_WATCHDOG_DMA     { 0, 0 }
 155 #define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0, NO_IRQ }
 156 #define PB11MP_GPIO0_DMA        { 0, 0 }
 157 #define GPIO1_IRQ               { IRQ_PB11MP_GPIO1, NO_IRQ }
 158 #define GPIO1_DMA               { 0, 0 }
 159 #define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC, NO_IRQ }
 160 #define PB11MP_RTC_DMA          { 0, 0 }
 161 #define SCI_IRQ                 { IRQ_PB11MP_SCI, NO_IRQ }
 162 #define SCI_DMA                 { 7, 6 }
 163 #define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0, NO_IRQ }
 164 #define PB11MP_UART0_DMA        { 15, 14 }
 165 #define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1, NO_IRQ }
 166 #define PB11MP_UART1_DMA        { 13, 12 }
 167 #define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2, NO_IRQ }
 168 #define PB11MP_UART2_DMA        { 11, 10 }
 169 #define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3, NO_IRQ }
 170 #define PB11MP_UART3_DMA        { 0x86, 0x87 }
 171 #define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP, NO_IRQ }
 172 #define PB11MP_SSP_DMA          { 9, 8 }
 173
 174 /* FPGA Primecells */
 175 AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
 176 AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
 177 AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
 178 AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
 179 AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
 180
 181 /* DevChip Primecells */
 182 AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
 183 AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
 184 AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
 185 AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
 186 AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
 187 AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
 188 AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
 189 AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
 190 AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
 191 AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
 192 AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
 193 AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     NULL);
 194
 195 /* Primecells on the NEC ISSP chip */
 196 AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
 197 AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 198
 199 static struct amba_device *amba_devs[] __initdata = {
 200         &dmac_device,
 201         &uart0_device,
 202         &uart1_device,
 203         &uart2_device,
 204         &uart3_device,
 205         &smc_device,
 206         &clcd_device,
 207         &sctl_device,
 208         &wdog_device,
 209         &gpio0_device,
 210         &gpio1_device,
 211         &gpio2_device,
 212         &rtc_device,
 213         &sci0_device,
 214         &ssp0_device,
 215         &aaci_device,
 216         &mmc0_device,
 217         &kmi0_device,
 218         &kmi1_device,
 219 };
 220
 221 /*
 222  * RealView PB11MPCore platform devices
 223  */
 224 static struct resource realview_pb11mp_flash_resource[] = {
 225         [0] = {
 226                 .start          = REALVIEW_PB11MP_FLASH0_BASE,
 227                 .end            = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
 228                 .flags          = IORESOURCE_MEM,
 229         },
 230         [1] = {
 231                 .start          = REALVIEW_PB11MP_FLASH1_BASE,
 232                 .end            = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
 233                 .flags          = IORESOURCE_MEM,
 234         },
 235 };
 236
 237 static struct resource realview_pb11mp_smsc911x_resources[] = {
 238         [0] = {
 239                 .start          = REALVIEW_PB11MP_ETH_BASE,
 240                 .end            = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
 241                 .flags          = IORESOURCE_MEM,
 242         },
 243         [1] = {
 244                 .start          = IRQ_TC11MP_ETH,
 245                 .end            = IRQ_TC11MP_ETH,
 246                 .flags          = IORESOURCE_IRQ,
 247         },
 248 };
 249
 250 static struct resource realview_pb11mp_isp1761_resources[] = {
 251         [0] = {
 252                 .start          = REALVIEW_PB11MP_USB_BASE,
 253                 .end            = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
 254                 .flags          = IORESOURCE_MEM,
 255         },
 256         [1] = {
 257                 .start          = IRQ_TC11MP_USB,
 258                 .end            = IRQ_TC11MP_USB,
 259                 .flags          = IORESOURCE_IRQ,
 260         },
 261 };
 262
 263 static void __init gic_init_irq(void)
 264 {
 265         unsigned int pldctrl;
 266
 267         /* new irq mode with no DCC */
 268         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 269         pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 270         pldctrl |= 2 << 22;
 271         writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 272         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 273
 274         /* ARM11MPCore test chip GIC, primary */
 275         gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
 276         gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
 277         gic_cpu_init(0, gic_cpu_base_addr);
 278
 279         /* board GIC, secondary */
 280         gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
 281         gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
 282         gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
 283 }
 284
 285 static void __init realview_pb11mp_timer_init(void)
 286 {
 287         timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
 288         timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
 289         timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
 290         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
 291
 292 #ifdef CONFIG_LOCAL_TIMERS
 293         twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
 294 #endif
 295         realview_timer_init(IRQ_TC11MP_TIMER0_1);
 296 }
 297
 298 static struct sys_timer realview_pb11mp_timer = {
 299         .init           = realview_pb11mp_timer_init,
 300 };
 301
 302 static void realview_pb11mp_reset(char mode)
 303 {
 304         void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
 305                 REALVIEW_SYS_RESETCTL_OFFSET;
 306         unsigned int val;
 307
 308         /*
 309          * To reset, we hit the on-board reset register
 310          * in the system FPGA
 311          */
 312         val = __raw_readl(hdr_ctrl);
 313         val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR;
 314         __raw_writel(val, hdr_ctrl);
 315 }
 316
 317 static void __init realview_pb11mp_init(void)
 318 {
 319         int i;
 320
 321 #ifdef CONFIG_CACHE_L2X0
 322         /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
 323          * Bits:  .... ...0 0111 1001 0000 .... .... .... */
 324         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 325 #endif
 326
 327         realview_flash_register(realview_pb11mp_flash_resource,
 328                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
 329         realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
 330         platform_device_register(&realview_i2c_device);
 331         platform_device_register(&realview_cf_device);
 332         realview_usb_register(realview_pb11mp_isp1761_resources);
 333
 334         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 335                 struct amba_device *d = amba_devs[i];
 336                 amba_device_register(d, &iomem_resource);
 337         }
 338
 339 #ifdef CONFIG_LEDS
 340         leds_event = realview_leds_event;
 341 #endif
 342         realview_reset = realview_pb11mp_reset;
 343 }
 344
 345 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
 346         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 347         .phys_io        = REALVIEW_PB11MP_UART0_BASE,
 348         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
 349         .boot_params    = PHYS_OFFSET + 0x00000100,
 350         .fixup          = realview_fixup,
 351         .map_io         = realview_pb11mp_map_io,
 352         .init_irq       = gic_init_irq,
 353         .timer          = &realview_pb11mp_timer,
 354         .init_machine   = realview_pb11mp_init,
 355 MACHINE_END