2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35 defined(CONFIG_ARCH_AT91SAM9RL)
36 #define ATMEL_LCDC_FIFO_SIZE 2048
38 #define ATMEL_LCDC_FIFO_SIZE 512
41 #if defined(CONFIG_ARCH_AT91)
42 #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
44 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
45 struct fb_var_screeninfo
*var
)
49 #elif defined(CONFIG_AVR32)
50 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
51 | FBINFO_PARTIAL_PAN_OK \
52 | FBINFO_HWACCEL_XPAN \
53 | FBINFO_HWACCEL_YPAN)
55 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
56 struct fb_var_screeninfo
*var
)
61 pixeloff
= (var
->xoffset
* var
->bits_per_pixel
) & 0x1f;
63 dma2dcfg
= ((var
->xres_virtual
- var
->xres
) * var
->bits_per_pixel
) / 8;
64 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
65 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
67 /* Update configuration */
68 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
69 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
70 | ATMEL_LCDC_DMAUPDT
);
74 static const u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
75 | ATMEL_LCDC_POL_POSITIVE
76 | ATMEL_LCDC_ENA_PWMENABLE
;
78 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
80 /* some bl->props field just changed */
81 static int atmel_bl_update_status(struct backlight_device
*bl
)
83 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
84 int power
= sinfo
->bl_power
;
85 int brightness
= bl
->props
.brightness
;
87 /* REVISIT there may be a meaningful difference between
88 * fb_blank and power ... there seem to be some cases
89 * this doesn't handle correctly.
91 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
92 power
= bl
->props
.fb_blank
;
93 else if (bl
->props
.power
!= sinfo
->bl_power
)
94 power
= bl
->props
.power
;
96 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
97 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
98 else if (power
!= FB_BLANK_UNBLANK
)
101 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
102 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
103 brightness
? contrast_ctr
: 0);
105 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
110 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
112 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
114 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
117 static struct backlight_ops atmel_lcdc_bl_ops
= {
118 .update_status
= atmel_bl_update_status
,
119 .get_brightness
= atmel_bl_get_brightness
,
122 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
124 struct backlight_device
*bl
;
126 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
128 if (sinfo
->backlight
)
131 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
,
132 sinfo
, &atmel_lcdc_bl_ops
);
133 if (IS_ERR(sinfo
->backlight
)) {
134 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
138 sinfo
->backlight
= bl
;
140 bl
->props
.power
= FB_BLANK_UNBLANK
;
141 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
142 bl
->props
.max_brightness
= 0xff;
143 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
146 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
148 if (sinfo
->backlight
)
149 backlight_device_unregister(sinfo
->backlight
);
154 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
156 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
159 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
165 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
167 /* have some default contrast/backlight settings */
168 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
169 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
171 if (sinfo
->lcdcon_is_backlight
)
172 init_backlight(sinfo
);
176 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
177 .type
= FB_TYPE_PACKED_PIXELS
,
178 .visual
= FB_VISUAL_TRUECOLOR
,
182 .accel
= FB_ACCEL_NONE
,
185 static unsigned long compute_hozval(unsigned long xres
, unsigned long lcdcon2
)
189 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
193 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
195 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
198 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
199 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
200 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
201 value
= DIV_ROUND_UP(value
, 4);
203 value
= DIV_ROUND_UP(value
, 8);
209 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
210 struct fb_var_screeninfo
*var
)
212 struct atmel_lcdfb_info
*sinfo
= info
->par
;
213 struct fb_fix_screeninfo
*fix
= &info
->fix
;
214 unsigned long dma_addr
;
216 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
217 + var
->xoffset
* var
->bits_per_pixel
/ 8);
221 /* Set framebuffer DMA base address and pixel offset */
222 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
224 atmel_lcdfb_update_dma2d(sinfo
, var
);
227 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
229 struct fb_info
*info
= sinfo
->info
;
231 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
232 info
->screen_base
, info
->fix
.smem_start
);
236 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
237 * @sinfo: the frame buffer to allocate memory for
239 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
241 struct fb_info
*info
= sinfo
->info
;
242 struct fb_var_screeninfo
*var
= &info
->var
;
244 info
->fix
.smem_len
= (var
->xres_virtual
* var
->yres_virtual
245 * ((var
->bits_per_pixel
+ 7) / 8));
247 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
248 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
250 if (!info
->screen_base
) {
254 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
260 * atmel_lcdfb_check_var - Validates a var passed in.
261 * @var: frame buffer variable screen structure
262 * @info: frame buffer structure that represents a single frame buffer
264 * Checks to see if the hardware supports the state requested by
265 * var passed in. This function does not alter the hardware
266 * state!!! This means the data stored in struct fb_info and
267 * struct atmel_lcdfb_info do not change. This includes the var
268 * inside of struct fb_info. Do NOT change these. This function
269 * can be called on its own if we intent to only test a mode and
270 * not actually set it. The stuff in modedb.c is a example of
271 * this. If the var passed in is slightly off by what the
272 * hardware can support then we alter the var PASSED in to what
273 * we can do. If the hardware doesn't support mode change a
274 * -EINVAL will be returned by the upper layers. You don't need
275 * to implement this function then. If you hardware doesn't
276 * support changing the resolution then this function is not
277 * needed. In this case the driver would just provide a var that
278 * represents the static state the screen is in.
280 * Returns negative errno on error, or zero on success.
282 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
283 struct fb_info
*info
)
285 struct device
*dev
= info
->device
;
286 struct atmel_lcdfb_info
*sinfo
= info
->par
;
287 unsigned long clk_value_khz
;
289 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
291 dev_dbg(dev
, "%s:\n", __func__
);
292 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
293 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
294 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
295 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
297 if ((PICOS2KHZ(var
->pixclock
) * var
->bits_per_pixel
/ 8) > clk_value_khz
) {
298 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
302 /* Force same alignment for each line */
303 var
->xres
= (var
->xres
+ 3) & ~3UL;
304 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
306 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
307 var
->transp
.msb_right
= 0;
308 var
->transp
.offset
= var
->transp
.length
= 0;
309 var
->xoffset
= var
->yoffset
= 0;
311 /* Saturate vertical and horizontal timings at maximum values */
312 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
313 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
314 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
315 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
316 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
318 var
->right_margin
= min_t(u32
, var
->right_margin
,
319 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
320 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
321 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
322 var
->left_margin
= min_t(u32
, var
->left_margin
,
325 /* Some parameters can't be zero */
326 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
327 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
328 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
329 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
331 switch (var
->bits_per_pixel
) {
336 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
337 var
->red
.length
= var
->green
.length
= var
->blue
.length
338 = var
->bits_per_pixel
;
342 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
344 var
->red
.offset
= 11;
345 var
->blue
.offset
= 0;
346 var
->green
.length
= 6;
350 var
->blue
.offset
= 10;
351 var
->green
.length
= 5;
353 var
->green
.offset
= 5;
354 var
->red
.length
= var
->blue
.length
= 5;
357 var
->transp
.offset
= 24;
358 var
->transp
.length
= 8;
361 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
363 var
->red
.offset
= 16;
364 var
->blue
.offset
= 0;
368 var
->blue
.offset
= 16;
370 var
->green
.offset
= 8;
371 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
374 dev_err(dev
, "color depth %d not supported\n",
375 var
->bits_per_pixel
);
383 * atmel_lcdfb_set_par - Alters the hardware state.
384 * @info: frame buffer structure that represents a single frame buffer
386 * Using the fb_var_screeninfo in fb_info we set the resolution
387 * of the this particular framebuffer. This function alters the
388 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
389 * not alter var in fb_info since we are using that data. This
390 * means we depend on the data in var inside fb_info to be
391 * supported by the hardware. atmel_lcdfb_check_var is always called
392 * before atmel_lcdfb_set_par to ensure this. Again if you can't
393 * change the resolution you don't need this function.
396 static int atmel_lcdfb_set_par(struct fb_info
*info
)
398 struct atmel_lcdfb_info
*sinfo
= info
->par
;
399 unsigned long hozval_linesz
;
401 unsigned long clk_value_khz
;
402 unsigned long bits_per_line
;
404 dev_dbg(info
->device
, "%s:\n", __func__
);
405 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
406 info
->var
.xres
, info
->var
.yres
,
407 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
409 /* Turn off the LCD controller and the DMA controller */
410 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
, sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
412 /* Wait for the LCDC core to become idle */
413 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
416 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
418 if (info
->var
.bits_per_pixel
== 1)
419 info
->fix
.visual
= FB_VISUAL_MONO01
;
420 else if (info
->var
.bits_per_pixel
<= 8)
421 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
423 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
425 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
426 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
428 /* Re-initialize the DMA engine... */
429 dev_dbg(info
->device
, " * update DMA engine\n");
430 atmel_lcdfb_update_dma(info
, &info
->var
);
432 /* ...set frame size and burst length = 8 words (?) */
433 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
434 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
435 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
437 /* Now, the LCDC core... */
439 /* Set pixel clock */
440 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
442 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
444 value
= (value
/ 2) - 1;
445 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n", value
);
448 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
449 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
451 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
452 info
->var
.pixclock
= KHZ2PICOS(clk_value_khz
/ (2 * (value
+ 1)));
453 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
454 PICOS2KHZ(info
->var
.pixclock
));
458 /* Initialize control register 2 */
459 value
= sinfo
->default_lcdcon2
;
461 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
462 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
463 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
464 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
466 switch (info
->var
.bits_per_pixel
) {
467 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
468 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
469 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
470 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
471 case 15: /* fall through */
472 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
473 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
474 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
475 default: BUG(); break;
477 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
478 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
480 /* Vertical timing */
481 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
482 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
483 value
|= info
->var
.lower_margin
;
484 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
485 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
487 /* Horizontal timing */
488 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
489 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
490 value
|= (info
->var
.left_margin
- 1);
491 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
492 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
494 /* Horizontal value (aka line size) */
495 hozval_linesz
= compute_hozval(info
->var
.xres
,
496 lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
));
499 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
500 value
|= info
->var
.yres
- 1;
501 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
502 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
504 /* FIFO Threshold: Use formula from data sheet */
505 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
506 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
508 /* Toggle LCD_MODE every frame */
509 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
511 /* Disable all interrupts */
512 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
514 /* ...wait for DMA engine to become idle... */
515 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
518 dev_dbg(info
->device
, " * re-enable DMA engine\n");
519 /* ...and enable it with updated configuration */
520 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, sinfo
->default_dmacon
);
522 dev_dbg(info
->device
, " * re-enable LCDC core\n");
523 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
524 (sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
) | ATMEL_LCDC_PWR
);
526 dev_dbg(info
->device
, " * DONE\n");
531 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
534 chan
>>= 16 - bf
->length
;
535 return chan
<< bf
->offset
;
539 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
540 * @regno: Which register in the CLUT we are programming
541 * @red: The red value which can be up to 16 bits wide
542 * @green: The green value which can be up to 16 bits wide
543 * @blue: The blue value which can be up to 16 bits wide.
544 * @transp: If supported the alpha value which can be up to 16 bits wide.
545 * @info: frame buffer info structure
547 * Set a single color register. The values supplied have a 16 bit
548 * magnitude which needs to be scaled in this function for the hardware.
549 * Things to take into consideration are how many color registers, if
550 * any, are supported with the current color visual. With truecolor mode
551 * no color palettes are supported. Here a psuedo palette is created
552 * which we store the value in pseudo_palette in struct fb_info. For
553 * pseudocolor mode we have a limited color palette. To deal with this
554 * we can program what color is displayed for a particular pixel value.
555 * DirectColor is similar in that we can program each color field. If
556 * we have a static colormap we don't need to implement this function.
558 * Returns negative errno on error, or zero on success. In an
559 * ideal world, this would have been the case, but as it turns
560 * out, the other drivers return 1 on failure, so that's what
563 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
564 unsigned int green
, unsigned int blue
,
565 unsigned int transp
, struct fb_info
*info
)
567 struct atmel_lcdfb_info
*sinfo
= info
->par
;
572 if (info
->var
.grayscale
)
573 red
= green
= blue
= (19595 * red
+ 38470 * green
574 + 7471 * blue
) >> 16;
576 switch (info
->fix
.visual
) {
577 case FB_VISUAL_TRUECOLOR
:
579 pal
= info
->pseudo_palette
;
581 val
= chan_to_field(red
, &info
->var
.red
);
582 val
|= chan_to_field(green
, &info
->var
.green
);
583 val
|= chan_to_field(blue
, &info
->var
.blue
);
590 case FB_VISUAL_PSEUDOCOLOR
:
592 val
= ((red
>> 11) & 0x001f);
593 val
|= ((green
>> 6) & 0x03e0);
594 val
|= ((blue
>> 1) & 0x7c00);
597 * TODO: intensity bit. Maybe something like
598 * ~(red[10] ^ green[10] ^ blue[10]) & 1
601 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
606 case FB_VISUAL_MONO01
:
608 val
= (regno
== 0) ? 0x00 : 0x1F;
609 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
619 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
620 struct fb_info
*info
)
622 dev_dbg(info
->device
, "%s\n", __func__
);
624 atmel_lcdfb_update_dma(info
, var
);
629 static struct fb_ops atmel_lcdfb_ops
= {
630 .owner
= THIS_MODULE
,
631 .fb_check_var
= atmel_lcdfb_check_var
,
632 .fb_set_par
= atmel_lcdfb_set_par
,
633 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
634 .fb_pan_display
= atmel_lcdfb_pan_display
,
635 .fb_fillrect
= cfb_fillrect
,
636 .fb_copyarea
= cfb_copyarea
,
637 .fb_imageblit
= cfb_imageblit
,
640 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
642 struct fb_info
*info
= dev_id
;
643 struct atmel_lcdfb_info
*sinfo
= info
->par
;
646 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
647 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, status
);
651 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
653 struct fb_info
*info
= sinfo
->info
;
656 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
658 dev_info(info
->device
,
659 "%luKiB frame buffer at %08lx (mapped at %p)\n",
660 (unsigned long)info
->fix
.smem_len
/ 1024,
661 (unsigned long)info
->fix
.smem_start
,
664 /* Allocate colormap */
665 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
667 dev_err(info
->device
, "Alloc color map failed\n");
672 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
675 clk_enable(sinfo
->bus_clk
);
676 clk_enable(sinfo
->lcdc_clk
);
679 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
682 clk_disable(sinfo
->bus_clk
);
683 clk_disable(sinfo
->lcdc_clk
);
687 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
689 struct device
*dev
= &pdev
->dev
;
690 struct fb_info
*info
;
691 struct atmel_lcdfb_info
*sinfo
;
692 struct atmel_lcdfb_info
*pdata_sinfo
;
693 struct resource
*regs
= NULL
;
694 struct resource
*map
= NULL
;
697 dev_dbg(dev
, "%s BEGIN\n", __func__
);
700 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
702 dev_err(dev
, "cannot allocate memory\n");
708 if (dev
->platform_data
) {
709 pdata_sinfo
= (struct atmel_lcdfb_info
*)dev
->platform_data
;
710 sinfo
->default_bpp
= pdata_sinfo
->default_bpp
;
711 sinfo
->default_dmacon
= pdata_sinfo
->default_dmacon
;
712 sinfo
->default_lcdcon2
= pdata_sinfo
->default_lcdcon2
;
713 sinfo
->default_monspecs
= pdata_sinfo
->default_monspecs
;
714 sinfo
->atmel_lcdfb_power_control
= pdata_sinfo
->atmel_lcdfb_power_control
;
715 sinfo
->guard_time
= pdata_sinfo
->guard_time
;
716 sinfo
->lcdcon_is_backlight
= pdata_sinfo
->lcdcon_is_backlight
;
717 sinfo
->lcd_wiring_mode
= pdata_sinfo
->lcd_wiring_mode
;
719 dev_err(dev
, "cannot get default configuration\n");
725 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
726 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
727 info
->pseudo_palette
= sinfo
->pseudo_palette
;
728 info
->fbops
= &atmel_lcdfb_ops
;
730 memcpy(&info
->monspecs
, sinfo
->default_monspecs
, sizeof(info
->monspecs
));
731 info
->fix
= atmel_lcdfb_fix
;
733 /* Enable LCDC Clocks */
734 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
735 sinfo
->bus_clk
= clk_get(dev
, "hck1");
736 if (IS_ERR(sinfo
->bus_clk
)) {
737 ret
= PTR_ERR(sinfo
->bus_clk
);
741 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
742 if (IS_ERR(sinfo
->lcdc_clk
)) {
743 ret
= PTR_ERR(sinfo
->lcdc_clk
);
746 atmel_lcdfb_start_clock(sinfo
);
748 ret
= fb_find_mode(&info
->var
, info
, NULL
, info
->monspecs
.modedb
,
749 info
->monspecs
.modedb_len
, info
->monspecs
.modedb
,
752 dev_err(dev
, "no suitable video mode found\n");
757 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
759 dev_err(dev
, "resources unusable\n");
764 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
765 if (sinfo
->irq_base
< 0) {
766 dev_err(dev
, "unable to get irq\n");
767 ret
= sinfo
->irq_base
;
771 /* Initialize video memory */
772 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
774 /* use a pre-allocated memory buffer */
775 info
->fix
.smem_start
= map
->start
;
776 info
->fix
.smem_len
= map
->end
- map
->start
+ 1;
777 if (!request_mem_region(info
->fix
.smem_start
,
778 info
->fix
.smem_len
, pdev
->name
)) {
783 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
784 if (!info
->screen_base
)
788 * Don't clear the framebuffer -- someone may have set
792 /* alocate memory buffer */
793 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
795 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
801 info
->fix
.mmio_start
= regs
->start
;
802 info
->fix
.mmio_len
= regs
->end
- regs
->start
+ 1;
804 if (!request_mem_region(info
->fix
.mmio_start
,
805 info
->fix
.mmio_len
, pdev
->name
)) {
810 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
812 dev_err(dev
, "cannot map LCDC registers\n");
816 /* Initialize PWM for contrast or backlight ("off") */
817 init_contrast(sinfo
);
820 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
822 dev_err(dev
, "request_irq failed: %d\n", ret
);
826 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
828 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
829 goto unregister_irqs
;
833 * This makes sure that our colour bitfield
834 * descriptors are correctly initialised.
836 atmel_lcdfb_check_var(&info
->var
, info
);
838 ret
= fb_set_var(info
, &info
->var
);
840 dev_warn(dev
, "unable to set display parameters\n");
844 dev_set_drvdata(dev
, info
);
847 * Tell the world that we're ready to go
849 ret
= register_framebuffer(info
);
851 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
855 /* Power up the LCDC screen */
856 if (sinfo
->atmel_lcdfb_power_control
)
857 sinfo
->atmel_lcdfb_power_control(1);
859 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
860 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
866 fb_dealloc_cmap(&info
->cmap
);
868 free_irq(sinfo
->irq_base
, info
);
870 exit_backlight(sinfo
);
871 iounmap(sinfo
->mmio
);
873 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
876 iounmap(info
->screen_base
);
878 atmel_lcdfb_free_video_memory(sinfo
);
882 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
884 atmel_lcdfb_stop_clock(sinfo
);
885 clk_put(sinfo
->lcdc_clk
);
888 clk_put(sinfo
->bus_clk
);
890 framebuffer_release(info
);
892 dev_dbg(dev
, "%s FAILED\n", __func__
);
896 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
898 struct device
*dev
= &pdev
->dev
;
899 struct fb_info
*info
= dev_get_drvdata(dev
);
900 struct atmel_lcdfb_info
*sinfo
= info
->par
;
905 exit_backlight(sinfo
);
906 if (sinfo
->atmel_lcdfb_power_control
)
907 sinfo
->atmel_lcdfb_power_control(0);
908 unregister_framebuffer(info
);
909 atmel_lcdfb_stop_clock(sinfo
);
910 clk_put(sinfo
->lcdc_clk
);
912 clk_put(sinfo
->bus_clk
);
913 fb_dealloc_cmap(&info
->cmap
);
914 free_irq(sinfo
->irq_base
, info
);
915 iounmap(sinfo
->mmio
);
916 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
917 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
918 iounmap(info
->screen_base
);
919 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
921 atmel_lcdfb_free_video_memory(sinfo
);
924 dev_set_drvdata(dev
, NULL
);
925 framebuffer_release(info
);
932 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
934 struct fb_info
*info
= platform_get_drvdata(pdev
);
935 struct atmel_lcdfb_info
*sinfo
= info
->par
;
937 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
938 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
939 if (sinfo
->atmel_lcdfb_power_control
)
940 sinfo
->atmel_lcdfb_power_control(0);
941 atmel_lcdfb_stop_clock(sinfo
);
945 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
947 struct fb_info
*info
= platform_get_drvdata(pdev
);
948 struct atmel_lcdfb_info
*sinfo
= info
->par
;
950 atmel_lcdfb_start_clock(sinfo
);
951 if (sinfo
->atmel_lcdfb_power_control
)
952 sinfo
->atmel_lcdfb_power_control(1);
953 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
958 #define atmel_lcdfb_suspend NULL
959 #define atmel_lcdfb_resume NULL
962 static struct platform_driver atmel_lcdfb_driver
= {
963 .remove
= __exit_p(atmel_lcdfb_remove
),
964 .suspend
= atmel_lcdfb_suspend
,
965 .resume
= atmel_lcdfb_resume
,
968 .name
= "atmel_lcdfb",
969 .owner
= THIS_MODULE
,
973 static int __init
atmel_lcdfb_init(void)
975 return platform_driver_probe(&atmel_lcdfb_driver
, atmel_lcdfb_probe
);
978 static void __exit
atmel_lcdfb_exit(void)
980 platform_driver_unregister(&atmel_lcdfb_driver
);
983 module_init(atmel_lcdfb_init
);
984 module_exit(atmel_lcdfb_exit
);
986 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
987 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
988 MODULE_LICENSE("GPL");