include/asm-blackfin/mach-bf537/bfin_serial_5xx.h

   1 /*
   2  * file:         include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
   3  * based on:
   4  * author:
   5  *
   6  * created:
   7  * description:
   8  *      blackfin serial driver header files
   9  * rev:
  10  *
  11  * modified:
  12  *
  13  *
  14  * bugs:         enter bugs at http://blackfin.uclinux.org/
  15  *
  16  * this program is free software; you can redistribute it and/or modify
  17  * it under the terms of the gnu general public license as published by
  18  * the free software foundation; either version 2, or (at your option)
  19  * any later version.
  20  *
  21  * this program is distributed in the hope that it will be useful,
  22  * but without any warranty; without even the implied warranty of
  23  * merchantability or fitness for a particular purpose.  see the
  24  * gnu general public license for more details.
  25  *
  26  * you should have received a copy of the gnu general public license
  27  * along with this program; see the file copying.
  28  * if not, write to the free software foundation,
  29  * 59 temple place - suite 330, boston, ma 02111-1307, usa.
  30  */
  31
  32 #include <linux/serial.h>
  33 #include <asm/dma.h>
  34 #include <asm/portmux.h>
  35
  36 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
  37 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
  38 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
  39 #define UART_GET_DLH(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLH))
  40 #define UART_GET_IIR(uart)      bfin_read16(((uart)->port.membase + OFFSET_IIR))
  41 #define UART_GET_LCR(uart)      bfin_read16(((uart)->port.membase + OFFSET_LCR))
  42 #define UART_GET_GCTL(uart)     bfin_read16(((uart)->port.membase + OFFSET_GCTL))
  43
  44 #define UART_PUT_CHAR(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_THR),v)
  45 #define UART_PUT_DLL(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
  46 #define UART_PUT_IER(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_IER),v)
  47 #define UART_SET_IER(uart,v)    UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
  48 #define UART_CLEAR_IER(uart,v)  UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
  49 #define UART_PUT_DLH(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
  50 #define UART_PUT_LCR(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
  51 #define UART_PUT_GCTL(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
  52
  53 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
  54 # define CONFIG_SERIAL_BFIN_CTSRTS
  55
  56 # ifndef CONFIG_UART0_CTS_PIN
  57 #  define CONFIG_UART0_CTS_PIN -1
  58 # endif
  59
  60 # ifndef CONFIG_UART0_RTS_PIN
  61 #  define CONFIG_UART0_RTS_PIN -1
  62 # endif
  63
  64 # ifndef CONFIG_UART1_CTS_PIN
  65 #  define CONFIG_UART1_CTS_PIN -1
  66 # endif
  67
  68 # ifndef CONFIG_UART1_RTS_PIN
  69 #  define CONFIG_UART1_RTS_PIN -1
  70 # endif
  71 #endif
  72 /*
  73  * The pin configuration is different from schematic
  74  */
  75 struct bfin_serial_port {
  76         struct uart_port        port;
  77         unsigned int            old_status;
  78         unsigned int lsr;
  79 #ifdef CONFIG_SERIAL_BFIN_DMA
  80         int                     tx_done;
  81         int                     tx_count;
  82         struct circ_buf         rx_dma_buf;
  83         struct timer_list       rx_dma_timer;
  84         int                     rx_dma_nrows;
  85         unsigned int            tx_dma_channel;
  86         unsigned int            rx_dma_channel;
  87         struct work_struct      tx_dma_workqueue;
  88 #endif
  89 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  90         struct work_struct      cts_workqueue;
  91         int             cts_pin;
  92         int             rts_pin;
  93 #endif
  94 };
  95
  96 /* The hardware clears the LSR bits upon read, so we need to cache
  97  * some of the more fun bits in software so they don't get lost
  98  * when checking the LSR in other code paths (TX).
  99  */
 100 static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
 101 {
 102         unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
 103         uart->lsr |= (lsr & (BI|FE|PE|OE));
 104         return lsr | uart->lsr;
 105 }
 106
 107 static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 108 {
 109         uart->lsr = 0;
 110         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 111 }
 112
 113 struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 114 struct bfin_serial_res {
 115         unsigned long   uart_base_addr;
 116         int             uart_irq;
 117 #ifdef CONFIG_SERIAL_BFIN_DMA
 118         unsigned int    uart_tx_dma_channel;
 119         unsigned int    uart_rx_dma_channel;
 120 #endif
 121 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 122         int     uart_cts_pin;
 123         int     uart_rts_pin;
 124 #endif
 125 };
 126
 127 struct bfin_serial_res bfin_serial_resource[] = {
 128 #ifdef CONFIG_SERIAL_BFIN_UART0
 129         {
 130         0xFFC00400,
 131         IRQ_UART0_RX,
 132 #ifdef CONFIG_SERIAL_BFIN_DMA
 133         CH_UART0_TX,
 134         CH_UART0_RX,
 135 #endif
 136 #ifdef CONFIG_BFIN_UART0_CTSRTS
 137         CONFIG_UART0_CTS_PIN,
 138         CONFIG_UART0_RTS_PIN,
 139 #endif
 140         },
 141 #endif
 142 #ifdef CONFIG_SERIAL_BFIN_UART1
 143         {
 144         0xFFC02000,
 145         IRQ_UART1_RX,
 146 #ifdef CONFIG_SERIAL_BFIN_DMA
 147         CH_UART1_TX,
 148         CH_UART1_RX,
 149 #endif
 150 #ifdef CONFIG_BFIN_UART1_CTSRTS
 151         CONFIG_UART1_CTS_PIN,
 152         CONFIG_UART1_RTS_PIN,
 153 #endif
 154         },
 155 #endif
 156 };
 157
 158 int nr_ports = ARRAY_SIZE(bfin_serial_resource);
 159
 160 #define DRIVER_NAME "bfin-uart"
 161
 162 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 163 {
 164
 165 #ifdef CONFIG_SERIAL_BFIN_UART0
 166         peripheral_request(P_UART0_TX, DRIVER_NAME);
 167         peripheral_request(P_UART0_RX, DRIVER_NAME);
 168 #endif
 169
 170 #ifdef CONFIG_SERIAL_BFIN_UART1
 171         peripheral_request(P_UART1_TX, DRIVER_NAME);
 172         peripheral_request(P_UART1_RX, DRIVER_NAME);
 173 #endif
 174
 175 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 176         if (uart->cts_pin >= 0) {
 177                 gpio_request(uart->cts_pin, DRIVER_NAME);
 178                 gpio_direction_input(uart->cts_pin);
 179         }
 180
 181         if (uart->rts_pin >= 0) {
 182                 gpio_request(uart->rts_pin, DRIVER_NAME);
 183                 gpio_direction_output(uart->rts_pin, 0);
 184         }
 185 #endif
 186 }