2 * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
4 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
8 * Version 0.03 Cleaned auto-tune, added probe
9 * Version 0.04 Added second channel tuning
10 * Version 0.05 Enhanced tuning ; added qd6500 support
11 * Version 0.06 Added dos driver's list
12 * Version 0.07 Second channel bug fix
14 * QDI QD6500/QD6580 EIDE controller fast support
16 * Please set local bus speed using kernel parameter idebus
17 * for example, "idebus=33" stands for 33Mhz VLbus
18 * To activate controller support, use "ide0=qd65xx"
19 * To enable tuning, use "ide0=autotune"
20 * To enable second channel tuning (qd6580 only), use "ide1=autotune"
24 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
25 * Samuel Thibault <samuel.thibault@fnac.net>
28 #undef REALLY_SLOW_IO /* most systems can safely undef this */
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/delay.h>
34 #include <linux/timer.h>
36 #include <linux/ioport.h>
37 #include <linux/blkdev.h>
38 #include <linux/hdreg.h>
39 #include <linux/ide.h>
40 #include <linux/init.h>
41 #include <asm/system.h>
47 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
48 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
49 * -- qd6500 is a single IDE interface
50 * -- qd6580 is a dual IDE interface
52 * More research on qd6580 being done by willmore@cig.mot.com (David)
53 * More Information given by Petr Soucek (petr@ryston.cz)
54 * http://www.ryston.cz/petr/vlb
61 * base+0x01: Config (R/O)
63 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
64 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
65 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
66 * bit 3: qd6500: 1 = disabled, 0 = enabled
70 * qd6580: either 1010 or 0101
73 * base+0x02: Timer2 (qd6580 only)
76 * base+0x03: Control (qd6580 only)
78 * bits 0-3 must always be set 1
79 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
80 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
81 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
82 * channel 1 for hdc & hdd
83 * bit 1 : 1 = only disks on primary port
84 * 0 = disks & ATAPI devices on primary port
86 * bit 5 : status, but of what ?
87 * bit 6 : always set 1 by dos driver
88 * bit 7 : set 1 for non-ATAPI devices on primary port
89 * (maybe read-ahead and post-write buffer ?)
92 static int timings
[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
94 static void qd_write_reg (u8 content
, unsigned long reg
)
98 spin_lock_irqsave(&ide_lock
, flags
);
100 spin_unlock_irqrestore(&ide_lock
, flags
);
103 static u8 __init
qd_read_reg (unsigned long reg
)
108 spin_lock_irqsave(&ide_lock
, flags
);
110 spin_unlock_irqrestore(&ide_lock
, flags
);
117 * This routine is invoked from ide.c to prepare for access to a given drive.
120 static void qd_select (ide_drive_t
*drive
)
122 u8 index
= (( (QD_TIMREG(drive
)) & 0x80 ) >> 7) |
123 (QD_TIMREG(drive
) & 0x02);
125 if (timings
[index
] != QD_TIMING(drive
))
126 qd_write_reg(timings
[index
] = QD_TIMING(drive
), QD_TIMREG(drive
));
130 * qd6500_compute_timing
132 * computes the timing value where
133 * lower nibble represents active time, in count of VLB clocks
134 * upper nibble represents recovery time, in count of VLB clocks
137 static u8
qd6500_compute_timing (ide_hwif_t
*hwif
, int active_time
, int recovery_time
)
139 u8 active_cycle
,recovery_cycle
;
141 if (system_bus_clock()<=33) {
142 active_cycle
= 9 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 9);
143 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 0, 15);
145 active_cycle
= 8 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 1, 8);
146 recovery_cycle
= 18 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 3, 18);
149 return((recovery_cycle
<<4) | 0x08 | active_cycle
);
153 * qd6580_compute_timing
158 static u8
qd6580_compute_timing (int active_time
, int recovery_time
)
160 u8 active_cycle
= 17 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 17);
161 u8 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 2, 15);
163 return((recovery_cycle
<<4) | active_cycle
);
169 * tries to find timing from dos driver's table
172 static int qd_find_disk_type (ide_drive_t
*drive
,
173 int *active_time
, int *recovery_time
)
175 struct qd65xx_timing_s
*p
;
178 if (!*drive
->id
->model
) return 0;
180 strncpy(model
,drive
->id
->model
,40);
181 ide_fixstring(model
,40,1); /* byte-swap */
183 for (p
= qd65xx_timing
; p
->offset
!= -1 ; p
++) {
184 if (!strncmp(p
->model
, model
+p
->offset
, 4)) {
185 printk(KERN_DEBUG
"%s: listed !\n", drive
->name
);
186 *active_time
= p
->active
;
187 *recovery_time
= p
->recovery
;
197 * check whether timings don't conflict
200 static int qd_timing_ok (ide_drive_t drives
[])
202 return (IDE_IMPLY(drives
[0].present
&& drives
[1].present
,
203 IDE_IMPLY(QD_TIMREG(drives
) == QD_TIMREG(drives
+1),
204 QD_TIMING(drives
) == QD_TIMING(drives
+1))));
205 /* if same timing register, must be same timing */
211 * records the timing, and enables selectproc as needed
214 static void qd_set_timing (ide_drive_t
*drive
, u8 timing
)
216 ide_hwif_t
*hwif
= HWIF(drive
);
218 drive
->drive_data
&= 0xff00;
219 drive
->drive_data
|= timing
;
220 if (qd_timing_ok(hwif
->drives
)) {
221 qd_select(drive
); /* selects once */
222 hwif
->selectproc
= NULL
;
224 hwif
->selectproc
= &qd_select
;
226 printk(KERN_DEBUG
"%s: %#x\n", drive
->name
, timing
);
233 static void qd6500_tune_drive (ide_drive_t
*drive
, u8 pio
)
235 int active_time
= 175;
236 int recovery_time
= 415; /* worst case values from the dos driver */
238 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)
239 && drive
->id
->tPIO
&& (drive
->id
->field_valid
& 0x02)
240 && drive
->id
->eide_pio
>= 240) {
242 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,
245 recovery_time
= drive
->id
->eide_pio
- 120;
248 qd_set_timing(drive
, qd6500_compute_timing(HWIF(drive
), active_time
, recovery_time
));
255 static void qd6580_tune_drive (ide_drive_t
*drive
, u8 pio
)
258 int base
= HWIF(drive
)->select_data
;
259 int active_time
= 175;
260 int recovery_time
= 415; /* worst case values from the dos driver */
262 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)) {
263 pio
= ide_get_best_pio_mode(drive
, pio
, 255, &d
);
264 pio
= min_t(u8
, pio
, 4);
269 if (d
.cycle_time
>= 110) {
271 recovery_time
= d
.cycle_time
- 102;
273 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
276 if (d
.cycle_time
>= 69) {
278 recovery_time
= d
.cycle_time
- 61;
280 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
283 if (d
.cycle_time
>= 180) {
285 recovery_time
= d
.cycle_time
- 120;
287 active_time
= ide_pio_timings
[pio
].active_time
;
288 recovery_time
= d
.cycle_time
292 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,pio
);
295 if (!HWIF(drive
)->channel
&& drive
->media
!= ide_disk
) {
296 qd_write_reg(0x5f, QD_CONTROL_PORT
);
297 printk(KERN_WARNING
"%s: ATAPI: disabled read-ahead FIFO "
298 "and post-write buffer on %s.\n",
299 drive
->name
, HWIF(drive
)->name
);
302 qd_set_timing(drive
, qd6580_compute_timing(active_time
, recovery_time
));
308 * tests if the given port is a register
311 static int __init
qd_testreg(int port
)
317 spin_lock_irqsave(&ide_lock
, flags
);
318 savereg
= inb_p(port
);
319 outb_p(QD_TESTVAL
, port
); /* safe value */
320 readreg
= inb_p(port
);
322 spin_unlock_irqrestore(&ide_lock
, flags
);
324 if (savereg
== QD_TESTVAL
) {
325 printk(KERN_ERR
"Outch ! the probe for qd65xx isn't reliable !\n");
326 printk(KERN_ERR
"Please contact maintainers to tell about your hardware\n");
327 printk(KERN_ERR
"Assuming qd65xx is not present.\n");
331 return (readreg
!= QD_TESTVAL
);
337 * called to setup an ata channel : adjusts attributes & links for tuning
340 static void __init
qd_setup(ide_hwif_t
*hwif
, int base
, int config
,
341 unsigned int data0
, unsigned int data1
,
342 void (*tuneproc
) (ide_drive_t
*, u8 pio
))
344 hwif
->chipset
= ide_qd65xx
;
345 hwif
->channel
= hwif
->index
;
346 hwif
->select_data
= base
;
347 hwif
->config_data
= config
;
348 hwif
->drives
[0].drive_data
= data0
;
349 hwif
->drives
[1].drive_data
= data1
;
350 hwif
->drives
[0].io_32bit
=
351 hwif
->drives
[1].io_32bit
= 1;
352 hwif
->tuneproc
= tuneproc
;
353 probe_hwif_init(hwif
);
359 * called to unsetup an ata channel : back to default values, unlinks tuning
362 static void __exit qd_unsetup(ide_hwif_t *hwif)
364 u8 config = hwif->config_data;
365 int base = hwif->select_data;
366 void *tuneproc = (void *) hwif->tuneproc;
368 if (hwif->chipset != ide_qd65xx)
371 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
373 hwif->selectproc = NULL;
374 hwif->tuneproc = NULL;
376 if (tuneproc == (void *) qd6500_tune_drive) {
377 // will do it for both
378 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
379 } else if (tuneproc == (void *) qd6580_tune_drive) {
380 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
381 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
382 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
384 qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
387 printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
388 printk(KERN_WARNING "keeping settings !\n");
396 * looks at the specified baseport, and if qd found, registers & initialises it
397 * return 1 if another qd may be probed
400 static int __init
qd_probe(int base
)
406 config
= qd_read_reg(QD_CONFIG_PORT
);
408 if (! ((config
& QD_CONFIG_BASEPORT
) >> 1 == (base
== 0xb0)) )
411 unit
= ! (config
& QD_CONFIG_IDE_BASEPORT
);
413 if ((config
& 0xf0) == QD_CONFIG_QD6500
) {
415 if (qd_testreg(base
)) return 1; /* bad register */
419 hwif
= &ide_hwifs
[unit
];
420 printk(KERN_NOTICE
"%s: qd6500 at %#x\n", hwif
->name
, base
);
421 printk(KERN_DEBUG
"qd6500: config=%#x, ID3=%u\n",
424 if (config
& QD_CONFIG_DISABLED
) {
425 printk(KERN_WARNING
"qd6500 is disabled !\n");
429 qd_setup(hwif
, base
, config
, QD6500_DEF_DATA
, QD6500_DEF_DATA
,
432 create_proc_ide_interfaces();
437 if (((config
& 0xf0) == QD_CONFIG_QD6580_A
) ||
438 ((config
& 0xf0) == QD_CONFIG_QD6580_B
)) {
442 if (qd_testreg(base
) || qd_testreg(base
+0x02)) return 1;
447 control
= qd_read_reg(QD_CONTROL_PORT
);
449 printk(KERN_NOTICE
"qd6580 at %#x\n", base
);
450 printk(KERN_DEBUG
"qd6580: config=%#x, control=%#x, ID3=%u\n",
451 config
, control
, QD_ID3
);
453 if (control
& QD_CONTR_SEC_DISABLED
) {
454 /* secondary disabled */
456 hwif
= &ide_hwifs
[unit
];
457 printk(KERN_INFO
"%s: qd6580: single IDE board\n",
459 qd_setup(hwif
, base
, config
| (control
<< 8),
460 QD6580_DEF_DATA
, QD6580_DEF_DATA2
,
462 qd_write_reg(QD_DEF_CONTR
,QD_CONTROL_PORT
);
464 create_proc_ide_interfaces();
470 hwif
= &ide_hwifs
[0];
471 mate
= &ide_hwifs
[1];
472 /* secondary enabled */
473 printk(KERN_INFO
"%s&%s: qd6580: dual IDE board\n",
474 hwif
->name
, mate
->name
);
476 qd_setup(hwif
, base
, config
| (control
<< 8),
477 QD6580_DEF_DATA
, QD6580_DEF_DATA
,
479 qd_setup(mate
, base
, config
| (control
<< 8),
480 QD6580_DEF_DATA2
, QD6580_DEF_DATA2
,
482 qd_write_reg(QD_DEF_CONTR
,QD_CONTROL_PORT
);
484 create_proc_ide_interfaces();
486 return 0; /* no other qd65xx possible */
489 /* no qd65xx found */
493 /* Can be called directly from ide.c. */
494 int __init
qd65xx_init(void)
498 if (ide_hwifs
[0].chipset
!= ide_qd65xx
&&
499 ide_hwifs
[1].chipset
!= ide_qd65xx
)
505 module_init(qd65xx_init
);
508 MODULE_AUTHOR("Samuel Thibault");
509 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
510 MODULE_LICENSE("GPL");