5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chipnr: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
307 page
= (int)(ofs
>> chip
->page_shift
);
308 chipnr
= (int)(ofs
>> chip
->chip_shift
);
310 nand_get_device(chip
, mtd
, FL_READING
);
312 /* Select the NAND device */
313 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
319 page
& chip
->pagemask
);
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
,
327 page
& chip
->pagemask
);
328 if (chip
->read_byte(mtd
) != 0xff)
333 nand_release_device(mtd
);
339 * nand_default_block_markbad - [DEFAULT] mark a block bad
340 * @mtd: MTD device structure
341 * @ofs: offset from device start
343 * This is the default implementation, which can be overridden by
344 * a hardware specific driver.
346 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
348 struct nand_chip
*chip
= mtd
->priv
;
349 uint8_t buf
[2] = { 0, 0 };
352 /* Get block number */
353 block
= ((int)ofs
) >> chip
->bbt_erase_shift
;
355 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
357 /* Do we have a flash based bad block table ? */
358 if (chip
->options
& NAND_USE_FLASH_BBT
)
359 ret
= nand_update_bbt(mtd
, ofs
);
361 /* We write two bytes, so we dont have to mess with 16 bit
365 chip
->ops
.len
= chip
->ops
.ooblen
= 2;
366 chip
->ops
.datbuf
= NULL
;
367 chip
->ops
.oobbuf
= buf
;
368 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
370 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
373 mtd
->ecc_stats
.badblocks
++;
378 * nand_check_wp - [GENERIC] check if the chip is write protected
379 * @mtd: MTD device structure
380 * Check, if the device is write protected
382 * The function expects, that the device is already selected
384 static int nand_check_wp(struct mtd_info
*mtd
)
386 struct nand_chip
*chip
= mtd
->priv
;
387 /* Check the WP bit */
388 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
389 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
393 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
394 * @mtd: MTD device structure
395 * @ofs: offset from device start
396 * @getchip: 0, if the chip is already selected
397 * @allowbbt: 1, if its allowed to access the bbt area
399 * Check, if the block is bad. Either by reading the bad block table or
400 * calling of the scan function.
402 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
405 struct nand_chip
*chip
= mtd
->priv
;
408 return chip
->block_bad(mtd
, ofs
, getchip
);
410 /* Return info from the table */
411 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
415 * Wait for the ready pin, after a command
416 * The timeout is catched later.
418 void nand_wait_ready(struct mtd_info
*mtd
)
420 struct nand_chip
*chip
= mtd
->priv
;
421 unsigned long timeo
= jiffies
+ 2;
423 led_trigger_event(nand_led_trigger
, LED_FULL
);
424 /* wait until command is processed or timeout occures */
426 if (chip
->dev_ready(mtd
))
428 touch_softlockup_watchdog();
429 } while (time_before(jiffies
, timeo
));
430 led_trigger_event(nand_led_trigger
, LED_OFF
);
432 EXPORT_SYMBOL_GPL(nand_wait_ready
);
435 * nand_command - [DEFAULT] Send command to NAND device
436 * @mtd: MTD device structure
437 * @command: the command to be sent
438 * @column: the column address for this command, -1 if none
439 * @page_addr: the page address for this command, -1 if none
441 * Send command to NAND device. This function is used for small page
442 * devices (256/512 Bytes per page)
444 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
445 int column
, int page_addr
)
447 register struct nand_chip
*chip
= mtd
->priv
;
448 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
451 * Write out the command to the device.
453 if (command
== NAND_CMD_SEQIN
) {
456 if (column
>= mtd
->writesize
) {
458 column
-= mtd
->writesize
;
459 readcmd
= NAND_CMD_READOOB
;
460 } else if (column
< 256) {
461 /* First 256 bytes --> READ0 */
462 readcmd
= NAND_CMD_READ0
;
465 readcmd
= NAND_CMD_READ1
;
467 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
468 ctrl
&= ~NAND_CTRL_CHANGE
;
470 chip
->cmd_ctrl(mtd
, command
, ctrl
);
473 * Address cycle, when necessary
475 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
476 /* Serially input address */
478 /* Adjust columns for 16 bit buswidth */
479 if (chip
->options
& NAND_BUSWIDTH_16
)
481 chip
->cmd_ctrl(mtd
, column
, ctrl
);
482 ctrl
&= ~NAND_CTRL_CHANGE
;
484 if (page_addr
!= -1) {
485 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
486 ctrl
&= ~NAND_CTRL_CHANGE
;
487 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
488 /* One more address cycle for devices > 32MiB */
489 if (chip
->chipsize
> (32 << 20))
490 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
492 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
495 * program and erase have their own busy handlers
496 * status and sequential in needs no delay
500 case NAND_CMD_PAGEPROG
:
501 case NAND_CMD_ERASE1
:
502 case NAND_CMD_ERASE2
:
504 case NAND_CMD_STATUS
:
510 udelay(chip
->chip_delay
);
511 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
512 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
514 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
515 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
518 /* This applies to read commands */
521 * If we don't have access to the busy pin, we apply the given
524 if (!chip
->dev_ready
) {
525 udelay(chip
->chip_delay
);
529 /* Apply this short delay always to ensure that we do wait tWB in
530 * any case on any machine. */
533 nand_wait_ready(mtd
);
537 * nand_command_lp - [DEFAULT] Send command to NAND large page device
538 * @mtd: MTD device structure
539 * @command: the command to be sent
540 * @column: the column address for this command, -1 if none
541 * @page_addr: the page address for this command, -1 if none
543 * Send command to NAND device. This is the version for the new large page
544 * devices We dont have the separate regions as we have in the small page
545 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
547 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
548 int column
, int page_addr
)
550 register struct nand_chip
*chip
= mtd
->priv
;
552 /* Emulate NAND_CMD_READOOB */
553 if (command
== NAND_CMD_READOOB
) {
554 column
+= mtd
->writesize
;
555 command
= NAND_CMD_READ0
;
558 /* Command latch cycle */
559 chip
->cmd_ctrl(mtd
, command
& 0xff,
560 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
562 if (column
!= -1 || page_addr
!= -1) {
563 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
565 /* Serially input address */
567 /* Adjust columns for 16 bit buswidth */
568 if (chip
->options
& NAND_BUSWIDTH_16
)
570 chip
->cmd_ctrl(mtd
, column
, ctrl
);
571 ctrl
&= ~NAND_CTRL_CHANGE
;
572 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
574 if (page_addr
!= -1) {
575 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
576 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
577 NAND_NCE
| NAND_ALE
);
578 /* One more address cycle for devices > 128MiB */
579 if (chip
->chipsize
> (128 << 20))
580 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
581 NAND_NCE
| NAND_ALE
);
584 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
587 * program and erase have their own busy handlers
588 * status, sequential in, and deplete1 need no delay
592 case NAND_CMD_CACHEDPROG
:
593 case NAND_CMD_PAGEPROG
:
594 case NAND_CMD_ERASE1
:
595 case NAND_CMD_ERASE2
:
598 case NAND_CMD_STATUS
:
599 case NAND_CMD_DEPLETE1
:
603 * read error status commands require only a short delay
605 case NAND_CMD_STATUS_ERROR
:
606 case NAND_CMD_STATUS_ERROR0
:
607 case NAND_CMD_STATUS_ERROR1
:
608 case NAND_CMD_STATUS_ERROR2
:
609 case NAND_CMD_STATUS_ERROR3
:
610 udelay(chip
->chip_delay
);
616 udelay(chip
->chip_delay
);
617 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
618 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
619 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
620 NAND_NCE
| NAND_CTRL_CHANGE
);
621 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
624 case NAND_CMD_RNDOUT
:
625 /* No ready / busy check necessary */
626 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
627 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
628 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
629 NAND_NCE
| NAND_CTRL_CHANGE
);
633 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
634 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
635 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
636 NAND_NCE
| NAND_CTRL_CHANGE
);
638 /* This applies to read commands */
641 * If we don't have access to the busy pin, we apply the given
644 if (!chip
->dev_ready
) {
645 udelay(chip
->chip_delay
);
650 /* Apply this short delay always to ensure that we do wait tWB in
651 * any case on any machine. */
654 nand_wait_ready(mtd
);
658 * nand_get_device - [GENERIC] Get chip for selected access
659 * @chip: the nand chip descriptor
660 * @mtd: MTD device structure
661 * @new_state: the state which is requested
663 * Get the device and lock it for exclusive access
666 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
668 spinlock_t
*lock
= &chip
->controller
->lock
;
669 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
670 DECLARE_WAITQUEUE(wait
, current
);
674 /* Hardware controller shared among independend devices */
675 /* Hardware controller shared among independend devices */
676 if (!chip
->controller
->active
)
677 chip
->controller
->active
= chip
;
679 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
680 chip
->state
= new_state
;
684 if (new_state
== FL_PM_SUSPENDED
) {
686 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
688 set_current_state(TASK_UNINTERRUPTIBLE
);
689 add_wait_queue(wq
, &wait
);
692 remove_wait_queue(wq
, &wait
);
697 * nand_wait - [DEFAULT] wait until the command is done
698 * @mtd: MTD device structure
699 * @chip: NAND chip structure
701 * Wait for command done. This applies to erase and program only
702 * Erase can take up to 400ms and program up to 20ms according to
703 * general NAND and SmartMedia specs
705 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
708 unsigned long timeo
= jiffies
;
709 int status
, state
= chip
->state
;
711 if (state
== FL_ERASING
)
712 timeo
+= (HZ
* 400) / 1000;
714 timeo
+= (HZ
* 20) / 1000;
716 led_trigger_event(nand_led_trigger
, LED_FULL
);
718 /* Apply this short delay always to ensure that we do wait tWB in
719 * any case on any machine. */
722 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
723 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
725 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
727 while (time_before(jiffies
, timeo
)) {
728 if (chip
->dev_ready
) {
729 if (chip
->dev_ready(mtd
))
732 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
737 led_trigger_event(nand_led_trigger
, LED_OFF
);
739 status
= (int)chip
->read_byte(mtd
);
744 * nand_read_page_raw - [Intern] read raw page data without ecc
745 * @mtd: mtd info structure
746 * @chip: nand chip info structure
747 * @buf: buffer to store read data
749 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
752 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
753 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
758 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
759 * @mtd: mtd info structure
760 * @chip: nand chip info structure
761 * @buf: buffer to store read data
763 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
766 int i
, eccsize
= chip
->ecc
.size
;
767 int eccbytes
= chip
->ecc
.bytes
;
768 int eccsteps
= chip
->ecc
.steps
;
770 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
771 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
772 int *eccpos
= chip
->ecc
.layout
->eccpos
;
774 nand_read_page_raw(mtd
, chip
, buf
);
776 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
777 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
779 for (i
= 0; i
< chip
->ecc
.total
; i
++)
780 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
782 eccsteps
= chip
->ecc
.steps
;
785 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
788 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
790 mtd
->ecc_stats
.failed
++;
792 mtd
->ecc_stats
.corrected
+= stat
;
798 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
799 * @mtd: mtd info structure
800 * @chip: nand chip info structure
801 * @buf: buffer to store read data
803 * Not for syndrome calculating ecc controllers which need a special oob layout
805 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
808 int i
, eccsize
= chip
->ecc
.size
;
809 int eccbytes
= chip
->ecc
.bytes
;
810 int eccsteps
= chip
->ecc
.steps
;
812 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
813 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
814 int *eccpos
= chip
->ecc
.layout
->eccpos
;
816 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
817 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
818 chip
->read_buf(mtd
, p
, eccsize
);
819 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
821 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
823 for (i
= 0; i
< chip
->ecc
.total
; i
++)
824 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
826 eccsteps
= chip
->ecc
.steps
;
829 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
832 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
834 mtd
->ecc_stats
.failed
++;
836 mtd
->ecc_stats
.corrected
+= stat
;
842 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
843 * @mtd: mtd info structure
844 * @chip: nand chip info structure
845 * @buf: buffer to store read data
847 * The hw generator calculates the error syndrome automatically. Therefor
848 * we need a special oob layout and handling.
850 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
853 int i
, eccsize
= chip
->ecc
.size
;
854 int eccbytes
= chip
->ecc
.bytes
;
855 int eccsteps
= chip
->ecc
.steps
;
857 uint8_t *oob
= chip
->oob_poi
;
859 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
862 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
863 chip
->read_buf(mtd
, p
, eccsize
);
865 if (chip
->ecc
.prepad
) {
866 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
867 oob
+= chip
->ecc
.prepad
;
870 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
871 chip
->read_buf(mtd
, oob
, eccbytes
);
872 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
875 mtd
->ecc_stats
.failed
++;
877 mtd
->ecc_stats
.corrected
+= stat
;
881 if (chip
->ecc
.postpad
) {
882 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
883 oob
+= chip
->ecc
.postpad
;
887 /* Calculate remaining oob bytes */
888 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
890 chip
->read_buf(mtd
, oob
, i
);
896 * nand_transfer_oob - [Internal] Transfer oob to client buffer
897 * @chip: nand chip structure
898 * @oob: oob destination address
899 * @ops: oob ops structure
900 * @len: size of oob to transfer
902 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
903 struct mtd_oob_ops
*ops
, size_t len
)
909 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
913 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
914 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
917 for(; free
->length
&& len
; free
++, len
-= bytes
) {
918 /* Read request not from offset 0 ? */
919 if (unlikely(roffs
)) {
920 if (roffs
>= free
->length
) {
921 roffs
-= free
->length
;
924 boffs
= free
->offset
+ roffs
;
925 bytes
= min_t(size_t, len
,
926 (free
->length
- roffs
));
929 bytes
= min_t(size_t, len
, free
->length
);
930 boffs
= free
->offset
;
932 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
944 * nand_do_read_ops - [Internal] Read data with ECC
946 * @mtd: MTD device structure
947 * @from: offset to read from
948 * @ops: oob ops structure
950 * Internal function. Called with chip held.
952 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
953 struct mtd_oob_ops
*ops
)
955 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
956 struct nand_chip
*chip
= mtd
->priv
;
957 struct mtd_ecc_stats stats
;
958 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
961 uint32_t readlen
= ops
->len
;
962 uint32_t oobreadlen
= ops
->ooblen
;
963 uint8_t *bufpoi
, *oob
, *buf
;
965 stats
= mtd
->ecc_stats
;
967 chipnr
= (int)(from
>> chip
->chip_shift
);
968 chip
->select_chip(mtd
, chipnr
);
970 realpage
= (int)(from
>> chip
->page_shift
);
971 page
= realpage
& chip
->pagemask
;
973 col
= (int)(from
& (mtd
->writesize
- 1));
979 bytes
= min(mtd
->writesize
- col
, readlen
);
980 aligned
= (bytes
== mtd
->writesize
);
982 /* Is the current page in the buffer ? */
983 if (realpage
!= chip
->pagebuf
|| oob
) {
984 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
986 if (likely(sndcmd
)) {
987 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
991 /* Now read the page into the buffer */
992 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
993 ret
= chip
->ecc
.read_page_raw(mtd
, chip
, bufpoi
);
995 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
999 /* Transfer not aligned data */
1001 chip
->pagebuf
= realpage
;
1002 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1007 if (unlikely(oob
)) {
1008 /* Raw mode does data:oob:data:oob */
1009 if (ops
->mode
!= MTD_OOB_RAW
) {
1010 int toread
= min(oobreadlen
,
1011 chip
->ecc
.layout
->oobavail
);
1013 oob
= nand_transfer_oob(chip
,
1015 oobreadlen
-= toread
;
1018 buf
= nand_transfer_oob(chip
,
1019 buf
, ops
, mtd
->oobsize
);
1022 if (!(chip
->options
& NAND_NO_READRDY
)) {
1024 * Apply delay or wait for ready/busy pin. Do
1025 * this before the AUTOINCR check, so no
1026 * problems arise if a chip which does auto
1027 * increment is marked as NOAUTOINCR by the
1030 if (!chip
->dev_ready
)
1031 udelay(chip
->chip_delay
);
1033 nand_wait_ready(mtd
);
1036 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1045 /* For subsequent reads align to page boundary. */
1047 /* Increment page address */
1050 page
= realpage
& chip
->pagemask
;
1051 /* Check, if we cross a chip boundary */
1054 chip
->select_chip(mtd
, -1);
1055 chip
->select_chip(mtd
, chipnr
);
1058 /* Check, if the chip supports auto page increment
1059 * or if we have hit a block boundary.
1061 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1065 ops
->retlen
= ops
->len
- (size_t) readlen
;
1067 ops
->oobretlen
= ops
->ooblen
- oobreadlen
;
1072 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1075 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1079 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1080 * @mtd: MTD device structure
1081 * @from: offset to read from
1082 * @len: number of bytes to read
1083 * @retlen: pointer to variable to store the number of read bytes
1084 * @buf: the databuffer to put data
1086 * Get hold of the chip and call nand_do_read
1088 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1089 size_t *retlen
, uint8_t *buf
)
1091 struct nand_chip
*chip
= mtd
->priv
;
1094 /* Do not allow reads past end of device */
1095 if ((from
+ len
) > mtd
->size
)
1100 nand_get_device(chip
, mtd
, FL_READING
);
1102 chip
->ops
.len
= len
;
1103 chip
->ops
.datbuf
= buf
;
1104 chip
->ops
.oobbuf
= NULL
;
1106 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1108 *retlen
= chip
->ops
.retlen
;
1110 nand_release_device(mtd
);
1116 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1117 * @mtd: mtd info structure
1118 * @chip: nand chip info structure
1119 * @page: page number to read
1120 * @sndcmd: flag whether to issue read command or not
1122 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1123 int page
, int sndcmd
)
1126 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1129 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1134 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1136 * @mtd: mtd info structure
1137 * @chip: nand chip info structure
1138 * @page: page number to read
1139 * @sndcmd: flag whether to issue read command or not
1141 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1142 int page
, int sndcmd
)
1144 uint8_t *buf
= chip
->oob_poi
;
1145 int length
= mtd
->oobsize
;
1146 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1147 int eccsize
= chip
->ecc
.size
;
1148 uint8_t *bufpoi
= buf
;
1149 int i
, toread
, sndrnd
= 0, pos
;
1151 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1152 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1154 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1155 if (mtd
->writesize
> 512)
1156 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1158 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1161 toread
= min_t(int, length
, chunk
);
1162 chip
->read_buf(mtd
, bufpoi
, toread
);
1167 chip
->read_buf(mtd
, bufpoi
, length
);
1173 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1174 * @mtd: mtd info structure
1175 * @chip: nand chip info structure
1176 * @page: page number to write
1178 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1182 const uint8_t *buf
= chip
->oob_poi
;
1183 int length
= mtd
->oobsize
;
1185 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1186 chip
->write_buf(mtd
, buf
, length
);
1187 /* Send command to program the OOB data */
1188 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1190 status
= chip
->waitfunc(mtd
, chip
);
1192 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1196 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1197 * with syndrome - only for large page flash !
1198 * @mtd: mtd info structure
1199 * @chip: nand chip info structure
1200 * @page: page number to write
1202 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1203 struct nand_chip
*chip
, int page
)
1205 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1206 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1207 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1208 const uint8_t *bufpoi
= chip
->oob_poi
;
1211 * data-ecc-data-ecc ... ecc-oob
1213 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1215 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1216 pos
= steps
* (eccsize
+ chunk
);
1221 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1222 for (i
= 0; i
< steps
; i
++) {
1224 if (mtd
->writesize
<= 512) {
1225 uint32_t fill
= 0xFFFFFFFF;
1229 int num
= min_t(int, len
, 4);
1230 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1235 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1236 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1240 len
= min_t(int, length
, chunk
);
1241 chip
->write_buf(mtd
, bufpoi
, len
);
1246 chip
->write_buf(mtd
, bufpoi
, length
);
1248 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1249 status
= chip
->waitfunc(mtd
, chip
);
1251 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1255 * nand_do_read_oob - [Intern] NAND read out-of-band
1256 * @mtd: MTD device structure
1257 * @from: offset to read from
1258 * @ops: oob operations description structure
1260 * NAND read out-of-band data from the spare area
1262 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1263 struct mtd_oob_ops
*ops
)
1265 int page
, realpage
, chipnr
, sndcmd
= 1;
1266 struct nand_chip
*chip
= mtd
->priv
;
1267 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1268 int readlen
= ops
->ooblen
;
1270 uint8_t *buf
= ops
->oobbuf
;
1272 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1273 (unsigned long long)from
, readlen
);
1275 if (ops
->mode
== MTD_OOB_RAW
)
1278 len
= chip
->ecc
.layout
->oobavail
;
1280 chipnr
= (int)(from
>> chip
->chip_shift
);
1281 chip
->select_chip(mtd
, chipnr
);
1283 /* Shift to get page */
1284 realpage
= (int)(from
>> chip
->page_shift
);
1285 page
= realpage
& chip
->pagemask
;
1288 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1290 len
= min(len
, readlen
);
1291 buf
= nand_transfer_oob(chip
, buf
, ops
, len
);
1293 if (!(chip
->options
& NAND_NO_READRDY
)) {
1295 * Apply delay or wait for ready/busy pin. Do this
1296 * before the AUTOINCR check, so no problems arise if a
1297 * chip which does auto increment is marked as
1298 * NOAUTOINCR by the board driver.
1300 if (!chip
->dev_ready
)
1301 udelay(chip
->chip_delay
);
1303 nand_wait_ready(mtd
);
1310 /* Increment page address */
1313 page
= realpage
& chip
->pagemask
;
1314 /* Check, if we cross a chip boundary */
1317 chip
->select_chip(mtd
, -1);
1318 chip
->select_chip(mtd
, chipnr
);
1321 /* Check, if the chip supports auto page increment
1322 * or if we have hit a block boundary.
1324 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1328 ops
->oobretlen
= ops
->ooblen
;
1333 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1334 * @mtd: MTD device structure
1335 * @from: offset to read from
1336 * @ops: oob operation description structure
1338 * NAND read data and/or out-of-band data
1340 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1341 struct mtd_oob_ops
*ops
)
1343 struct nand_chip
*chip
= mtd
->priv
;
1344 int ret
= -ENOTSUPP
;
1348 /* Do not allow reads past end of device */
1349 if (ops
->datbuf
&& (from
+ ops
->len
) > mtd
->size
) {
1350 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1351 "Attempt read beyond end of device\n");
1355 nand_get_device(chip
, mtd
, FL_READING
);
1368 ret
= nand_do_read_oob(mtd
, from
, ops
);
1370 ret
= nand_do_read_ops(mtd
, from
, ops
);
1373 nand_release_device(mtd
);
1379 * nand_write_page_raw - [Intern] raw page write function
1380 * @mtd: mtd info structure
1381 * @chip: nand chip info structure
1384 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1387 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1388 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1392 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1393 * @mtd: mtd info structure
1394 * @chip: nand chip info structure
1397 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1400 int i
, eccsize
= chip
->ecc
.size
;
1401 int eccbytes
= chip
->ecc
.bytes
;
1402 int eccsteps
= chip
->ecc
.steps
;
1403 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1404 const uint8_t *p
= buf
;
1405 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1407 /* Software ecc calculation */
1408 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1409 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1411 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1412 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1414 nand_write_page_raw(mtd
, chip
, buf
);
1418 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1419 * @mtd: mtd info structure
1420 * @chip: nand chip info structure
1423 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1426 int i
, eccsize
= chip
->ecc
.size
;
1427 int eccbytes
= chip
->ecc
.bytes
;
1428 int eccsteps
= chip
->ecc
.steps
;
1429 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1430 const uint8_t *p
= buf
;
1431 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1433 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1434 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1435 chip
->write_buf(mtd
, p
, eccsize
);
1436 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1439 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1440 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1442 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1446 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1447 * @mtd: mtd info structure
1448 * @chip: nand chip info structure
1451 * The hw generator calculates the error syndrome automatically. Therefor
1452 * we need a special oob layout and handling.
1454 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1455 struct nand_chip
*chip
, const uint8_t *buf
)
1457 int i
, eccsize
= chip
->ecc
.size
;
1458 int eccbytes
= chip
->ecc
.bytes
;
1459 int eccsteps
= chip
->ecc
.steps
;
1460 const uint8_t *p
= buf
;
1461 uint8_t *oob
= chip
->oob_poi
;
1463 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1465 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1466 chip
->write_buf(mtd
, p
, eccsize
);
1468 if (chip
->ecc
.prepad
) {
1469 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1470 oob
+= chip
->ecc
.prepad
;
1473 chip
->ecc
.calculate(mtd
, p
, oob
);
1474 chip
->write_buf(mtd
, oob
, eccbytes
);
1477 if (chip
->ecc
.postpad
) {
1478 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1479 oob
+= chip
->ecc
.postpad
;
1483 /* Calculate remaining oob bytes */
1484 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1486 chip
->write_buf(mtd
, oob
, i
);
1490 * nand_write_page - [REPLACEABLE] write one page
1491 * @mtd: MTD device structure
1492 * @chip: NAND chip descriptor
1493 * @buf: the data to write
1494 * @page: page number to write
1495 * @cached: cached programming
1496 * @raw: use _raw version of write_page
1498 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1499 const uint8_t *buf
, int page
, int cached
, int raw
)
1503 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1506 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1508 chip
->ecc
.write_page(mtd
, chip
, buf
);
1511 * Cached progamming disabled for now, Not sure if its worth the
1512 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1516 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1518 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1519 status
= chip
->waitfunc(mtd
, chip
);
1521 * See if operation failed and additional status checks are
1524 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1525 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1528 if (status
& NAND_STATUS_FAIL
)
1531 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1532 status
= chip
->waitfunc(mtd
, chip
);
1535 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1536 /* Send command to read back the data */
1537 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1539 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1546 * nand_fill_oob - [Internal] Transfer client buffer to oob
1547 * @chip: nand chip structure
1548 * @oob: oob data buffer
1549 * @ops: oob ops structure
1551 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1552 struct mtd_oob_ops
*ops
)
1554 size_t len
= ops
->ooblen
;
1560 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1563 case MTD_OOB_AUTO
: {
1564 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1565 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1568 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1569 /* Write request not from offset 0 ? */
1570 if (unlikely(woffs
)) {
1571 if (woffs
>= free
->length
) {
1572 woffs
-= free
->length
;
1575 boffs
= free
->offset
+ woffs
;
1576 bytes
= min_t(size_t, len
,
1577 (free
->length
- woffs
));
1580 bytes
= min_t(size_t, len
, free
->length
);
1581 boffs
= free
->offset
;
1583 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1594 #define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
1597 * nand_do_write_ops - [Internal] NAND write with ECC
1598 * @mtd: MTD device structure
1599 * @to: offset to write to
1600 * @ops: oob operations description structure
1602 * NAND write with ECC
1604 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1605 struct mtd_oob_ops
*ops
)
1607 int chipnr
, realpage
, page
, blockmask
, column
;
1608 struct nand_chip
*chip
= mtd
->priv
;
1609 uint32_t writelen
= ops
->len
;
1610 uint8_t *oob
= ops
->oobbuf
;
1611 uint8_t *buf
= ops
->datbuf
;
1618 /* reject writes, which are not page aligned */
1619 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1620 printk(KERN_NOTICE
"nand_write: "
1621 "Attempt to write not page aligned data\n");
1625 column
= to
& (mtd
->writesize
- 1);
1626 subpage
= column
|| (writelen
& (mtd
->writesize
- 1));
1631 chipnr
= (int)(to
>> chip
->chip_shift
);
1632 chip
->select_chip(mtd
, chipnr
);
1634 /* Check, if it is write protected */
1635 if (nand_check_wp(mtd
))
1638 realpage
= (int)(to
>> chip
->page_shift
);
1639 page
= realpage
& chip
->pagemask
;
1640 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1642 /* Invalidate the page cache, when we write to the cached page */
1643 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1644 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1647 /* If we're not given explicit OOB data, let it be 0xFF */
1649 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1652 int bytes
= mtd
->writesize
;
1653 int cached
= writelen
> bytes
&& page
!= blockmask
;
1654 uint8_t *wbuf
= buf
;
1656 /* Partial page write ? */
1657 if (unlikely(column
|| writelen
< (mtd
->writesize
- 1))) {
1659 bytes
= min_t(int, bytes
- column
, (int) writelen
);
1661 memset(chip
->buffers
->databuf
, 0xff, mtd
->writesize
);
1662 memcpy(&chip
->buffers
->databuf
[column
], buf
, bytes
);
1663 wbuf
= chip
->buffers
->databuf
;
1667 oob
= nand_fill_oob(chip
, oob
, ops
);
1669 ret
= chip
->write_page(mtd
, chip
, wbuf
, page
, cached
,
1670 (ops
->mode
== MTD_OOB_RAW
));
1682 page
= realpage
& chip
->pagemask
;
1683 /* Check, if we cross a chip boundary */
1686 chip
->select_chip(mtd
, -1);
1687 chip
->select_chip(mtd
, chipnr
);
1691 ops
->retlen
= ops
->len
- writelen
;
1693 ops
->oobretlen
= ops
->ooblen
;
1698 * nand_write - [MTD Interface] NAND write with ECC
1699 * @mtd: MTD device structure
1700 * @to: offset to write to
1701 * @len: number of bytes to write
1702 * @retlen: pointer to variable to store the number of written bytes
1703 * @buf: the data to write
1705 * NAND write with ECC
1707 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1708 size_t *retlen
, const uint8_t *buf
)
1710 struct nand_chip
*chip
= mtd
->priv
;
1713 /* Do not allow reads past end of device */
1714 if ((to
+ len
) > mtd
->size
)
1719 nand_get_device(chip
, mtd
, FL_WRITING
);
1721 chip
->ops
.len
= len
;
1722 chip
->ops
.datbuf
= (uint8_t *)buf
;
1723 chip
->ops
.oobbuf
= NULL
;
1725 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1727 *retlen
= chip
->ops
.retlen
;
1729 nand_release_device(mtd
);
1735 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1736 * @mtd: MTD device structure
1737 * @to: offset to write to
1738 * @ops: oob operation description structure
1740 * NAND write out-of-band
1742 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1743 struct mtd_oob_ops
*ops
)
1745 int chipnr
, page
, status
;
1746 struct nand_chip
*chip
= mtd
->priv
;
1748 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1749 (unsigned int)to
, (int)ops
->ooblen
);
1751 /* Do not allow write past end of page */
1752 if ((ops
->ooboffs
+ ops
->ooblen
) > mtd
->oobsize
) {
1753 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1754 "Attempt to write past end of page\n");
1758 chipnr
= (int)(to
>> chip
->chip_shift
);
1759 chip
->select_chip(mtd
, chipnr
);
1761 /* Shift to get page */
1762 page
= (int)(to
>> chip
->page_shift
);
1765 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1766 * of my DiskOnChip 2000 test units) will clear the whole data page too
1767 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1768 * it in the doc2000 driver in August 1999. dwmw2.
1770 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1772 /* Check, if it is write protected */
1773 if (nand_check_wp(mtd
))
1776 /* Invalidate the page cache, if we write to the cached page */
1777 if (page
== chip
->pagebuf
)
1780 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1781 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1782 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1783 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1788 ops
->oobretlen
= ops
->ooblen
;
1794 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1795 * @mtd: MTD device structure
1796 * @to: offset to write to
1797 * @ops: oob operation description structure
1799 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1800 struct mtd_oob_ops
*ops
)
1802 struct nand_chip
*chip
= mtd
->priv
;
1803 int ret
= -ENOTSUPP
;
1807 /* Do not allow writes past end of device */
1808 if (ops
->datbuf
&& (to
+ ops
->len
) > mtd
->size
) {
1809 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1810 "Attempt read beyond end of device\n");
1814 nand_get_device(chip
, mtd
, FL_WRITING
);
1827 ret
= nand_do_write_oob(mtd
, to
, ops
);
1829 ret
= nand_do_write_ops(mtd
, to
, ops
);
1832 nand_release_device(mtd
);
1837 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1838 * @mtd: MTD device structure
1839 * @page: the page address of the block which will be erased
1841 * Standard erase command for NAND chips
1843 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1845 struct nand_chip
*chip
= mtd
->priv
;
1846 /* Send commands to erase a block */
1847 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1848 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1852 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1853 * @mtd: MTD device structure
1854 * @page: the page address of the block which will be erased
1856 * AND multi block erase command function
1857 * Erase 4 consecutive blocks
1859 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1861 struct nand_chip
*chip
= mtd
->priv
;
1862 /* Send commands to erase a block */
1863 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1864 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1865 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1866 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1867 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1871 * nand_erase - [MTD Interface] erase block(s)
1872 * @mtd: MTD device structure
1873 * @instr: erase instruction
1875 * Erase one ore more blocks
1877 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1879 return nand_erase_nand(mtd
, instr
, 0);
1882 #define BBT_PAGE_MASK 0xffffff3f
1884 * nand_erase_nand - [Internal] erase block(s)
1885 * @mtd: MTD device structure
1886 * @instr: erase instruction
1887 * @allowbbt: allow erasing the bbt area
1889 * Erase one ore more blocks
1891 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1894 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1895 struct nand_chip
*chip
= mtd
->priv
;
1896 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1897 unsigned int bbt_masked_page
= 0xffffffff;
1899 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1900 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1902 /* Start address must align on block boundary */
1903 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1904 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1908 /* Length must align on block boundary */
1909 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1910 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1911 "Length not block aligned\n");
1915 /* Do not allow erase past end of device */
1916 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1917 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1918 "Erase past end of device\n");
1922 instr
->fail_addr
= 0xffffffff;
1924 /* Grab the lock and see if the device is available */
1925 nand_get_device(chip
, mtd
, FL_ERASING
);
1927 /* Shift to get first page */
1928 page
= (int)(instr
->addr
>> chip
->page_shift
);
1929 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1931 /* Calculate pages in each block */
1932 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1934 /* Select the NAND device */
1935 chip
->select_chip(mtd
, chipnr
);
1937 /* Check, if it is write protected */
1938 if (nand_check_wp(mtd
)) {
1939 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1940 "Device is write protected!!!\n");
1941 instr
->state
= MTD_ERASE_FAILED
;
1946 * If BBT requires refresh, set the BBT page mask to see if the BBT
1947 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1948 * can not be matched. This is also done when the bbt is actually
1949 * erased to avoid recusrsive updates
1951 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1952 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1954 /* Loop through the pages */
1957 instr
->state
= MTD_ERASING
;
1961 * heck if we have a bad block, we do not erase bad blocks !
1963 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1964 chip
->page_shift
, 0, allowbbt
)) {
1965 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1966 "bad block at page 0x%08x\n", page
);
1967 instr
->state
= MTD_ERASE_FAILED
;
1972 * Invalidate the page cache, if we erase the block which
1973 * contains the current cached page
1975 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1976 (page
+ pages_per_block
))
1979 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
1981 status
= chip
->waitfunc(mtd
, chip
);
1984 * See if operation failed and additional status checks are
1987 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1988 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
1991 /* See if block erase succeeded */
1992 if (status
& NAND_STATUS_FAIL
) {
1993 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1994 "Failed erase, page 0x%08x\n", page
);
1995 instr
->state
= MTD_ERASE_FAILED
;
1996 instr
->fail_addr
= (page
<< chip
->page_shift
);
2001 * If BBT requires refresh, set the BBT rewrite flag to the
2004 if (bbt_masked_page
!= 0xffffffff &&
2005 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
2006 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
2008 /* Increment page address and decrement length */
2009 len
-= (1 << chip
->phys_erase_shift
);
2010 page
+= pages_per_block
;
2012 /* Check, if we cross a chip boundary */
2013 if (len
&& !(page
& chip
->pagemask
)) {
2015 chip
->select_chip(mtd
, -1);
2016 chip
->select_chip(mtd
, chipnr
);
2019 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2020 * page mask to see if this BBT should be rewritten
2022 if (bbt_masked_page
!= 0xffffffff &&
2023 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2024 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2028 instr
->state
= MTD_ERASE_DONE
;
2032 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2033 /* Do call back function */
2035 mtd_erase_callback(instr
);
2037 /* Deselect and wake up anyone waiting on the device */
2038 nand_release_device(mtd
);
2041 * If BBT requires refresh and erase was successful, rewrite any
2042 * selected bad block tables
2044 if (bbt_masked_page
== 0xffffffff || ret
)
2047 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2048 if (!rewrite_bbt
[chipnr
])
2050 /* update the BBT for chip */
2051 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2052 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2053 chip
->bbt_td
->pages
[chipnr
]);
2054 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2057 /* Return more or less happy */
2062 * nand_sync - [MTD Interface] sync
2063 * @mtd: MTD device structure
2065 * Sync is actually a wait for chip ready function
2067 static void nand_sync(struct mtd_info
*mtd
)
2069 struct nand_chip
*chip
= mtd
->priv
;
2071 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2073 /* Grab the lock and see if the device is available */
2074 nand_get_device(chip
, mtd
, FL_SYNCING
);
2075 /* Release it and go back */
2076 nand_release_device(mtd
);
2080 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2081 * @mtd: MTD device structure
2082 * @offs: offset relative to mtd start
2084 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2086 /* Check for invalid offset */
2087 if (offs
> mtd
->size
)
2090 return nand_block_checkbad(mtd
, offs
, 1, 0);
2094 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2095 * @mtd: MTD device structure
2096 * @ofs: offset relative to mtd start
2098 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2100 struct nand_chip
*chip
= mtd
->priv
;
2103 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2104 /* If it was bad already, return success and do nothing. */
2110 return chip
->block_markbad(mtd
, ofs
);
2114 * nand_suspend - [MTD Interface] Suspend the NAND flash
2115 * @mtd: MTD device structure
2117 static int nand_suspend(struct mtd_info
*mtd
)
2119 struct nand_chip
*chip
= mtd
->priv
;
2121 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2125 * nand_resume - [MTD Interface] Resume the NAND flash
2126 * @mtd: MTD device structure
2128 static void nand_resume(struct mtd_info
*mtd
)
2130 struct nand_chip
*chip
= mtd
->priv
;
2132 if (chip
->state
== FL_PM_SUSPENDED
)
2133 nand_release_device(mtd
);
2135 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2136 "in suspended state\n");
2140 * Set default functions
2142 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2144 /* check for proper chip_delay setup, set 20us if not */
2145 if (!chip
->chip_delay
)
2146 chip
->chip_delay
= 20;
2148 /* check, if a user supplied command function given */
2149 if (chip
->cmdfunc
== NULL
)
2150 chip
->cmdfunc
= nand_command
;
2152 /* check, if a user supplied wait function given */
2153 if (chip
->waitfunc
== NULL
)
2154 chip
->waitfunc
= nand_wait
;
2156 if (!chip
->select_chip
)
2157 chip
->select_chip
= nand_select_chip
;
2158 if (!chip
->read_byte
)
2159 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2160 if (!chip
->read_word
)
2161 chip
->read_word
= nand_read_word
;
2162 if (!chip
->block_bad
)
2163 chip
->block_bad
= nand_block_bad
;
2164 if (!chip
->block_markbad
)
2165 chip
->block_markbad
= nand_default_block_markbad
;
2166 if (!chip
->write_buf
)
2167 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2168 if (!chip
->read_buf
)
2169 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2170 if (!chip
->verify_buf
)
2171 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2172 if (!chip
->scan_bbt
)
2173 chip
->scan_bbt
= nand_default_bbt
;
2175 if (!chip
->controller
) {
2176 chip
->controller
= &chip
->hwcontrol
;
2177 spin_lock_init(&chip
->controller
->lock
);
2178 init_waitqueue_head(&chip
->controller
->wq
);
2184 * Get the flash and manufacturer id and lookup if the type is supported
2186 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2187 struct nand_chip
*chip
,
2188 int busw
, int *maf_id
)
2190 struct nand_flash_dev
*type
= NULL
;
2191 int i
, dev_id
, maf_idx
;
2193 /* Select the device */
2194 chip
->select_chip(mtd
, 0);
2196 /* Send the command for reading device ID */
2197 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2199 /* Read manufacturer and device IDs */
2200 *maf_id
= chip
->read_byte(mtd
);
2201 dev_id
= chip
->read_byte(mtd
);
2203 /* Lookup the flash id */
2204 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2205 if (dev_id
== nand_flash_ids
[i
].id
) {
2206 type
= &nand_flash_ids
[i
];
2212 return ERR_PTR(-ENODEV
);
2215 mtd
->name
= type
->name
;
2217 chip
->chipsize
= type
->chipsize
<< 20;
2219 /* Newer devices have all the information in additional id bytes */
2220 if (!type
->pagesize
) {
2222 /* The 3rd id byte holds MLC / multichip data */
2223 chip
->cellinfo
= chip
->read_byte(mtd
);
2224 /* The 4th id byte is the important one */
2225 extid
= chip
->read_byte(mtd
);
2227 mtd
->writesize
= 1024 << (extid
& 0x3);
2230 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2232 /* Calc blocksize. Blocksize is multiples of 64KiB */
2233 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2235 /* Get buswidth information */
2236 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2240 * Old devices have chip data hardcoded in the device id table
2242 mtd
->erasesize
= type
->erasesize
;
2243 mtd
->writesize
= type
->pagesize
;
2244 mtd
->oobsize
= mtd
->writesize
/ 32;
2245 busw
= type
->options
& NAND_BUSWIDTH_16
;
2248 /* Try to identify manufacturer */
2249 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2250 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2255 * Check, if buswidth is correct. Hardware drivers should set
2258 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2259 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2260 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2261 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2262 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2263 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2265 return ERR_PTR(-EINVAL
);
2268 /* Calculate the address shift from the page size */
2269 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2270 /* Convert chipsize to number of pages per chip -1. */
2271 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2273 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2274 ffs(mtd
->erasesize
) - 1;
2275 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2277 /* Set the bad block position */
2278 chip
->badblockpos
= mtd
->writesize
> 512 ?
2279 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2281 /* Get chip options, preserve non chip based options */
2282 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2283 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2286 * Set chip as a default. Board drivers can override it, if necessary
2288 chip
->options
|= NAND_NO_AUTOINCR
;
2290 /* Check if chip is a not a samsung device. Do not clear the
2291 * options for chips which are not having an extended id.
2293 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2294 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2296 /* Check for AND chips with 4 page planes */
2297 if (chip
->options
& NAND_4PAGE_ARRAY
)
2298 chip
->erase_cmd
= multi_erase_cmd
;
2300 chip
->erase_cmd
= single_erase_cmd
;
2302 /* Do not replace user supplied command function ! */
2303 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2304 chip
->cmdfunc
= nand_command_lp
;
2306 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2307 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2308 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2314 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2315 * @mtd: MTD device structure
2316 * @maxchips: Number of chips to scan for
2318 * This is the first phase of the normal nand_scan() function. It
2319 * reads the flash ID and sets up MTD fields accordingly.
2321 * The mtd->owner field must be set to the module of the caller.
2323 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
)
2325 int i
, busw
, nand_maf_id
;
2326 struct nand_chip
*chip
= mtd
->priv
;
2327 struct nand_flash_dev
*type
;
2329 /* Get buswidth to select the correct functions */
2330 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2331 /* Set the default functions */
2332 nand_set_defaults(chip
, busw
);
2334 /* Read the flash type */
2335 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2338 printk(KERN_WARNING
"No NAND device found!!!\n");
2339 chip
->select_chip(mtd
, -1);
2340 return PTR_ERR(type
);
2343 /* Check for a chip array */
2344 for (i
= 1; i
< maxchips
; i
++) {
2345 chip
->select_chip(mtd
, i
);
2346 /* Send the command for reading device ID */
2347 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2348 /* Read manufacturer and device IDs */
2349 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2350 type
->id
!= chip
->read_byte(mtd
))
2354 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2356 /* Store the number of chips and calc total size for mtd */
2358 mtd
->size
= i
* chip
->chipsize
;
2365 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2366 * @mtd: MTD device structure
2367 * @maxchips: Number of chips to scan for
2369 * This is the second phase of the normal nand_scan() function. It
2370 * fills out all the uninitialized function pointers with the defaults
2371 * and scans for a bad block table if appropriate.
2373 int nand_scan_tail(struct mtd_info
*mtd
)
2376 struct nand_chip
*chip
= mtd
->priv
;
2378 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2379 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
2383 /* Set the internal oob buffer location, just after the page data */
2384 chip
->oob_poi
= chip
->buffers
->databuf
+ mtd
->writesize
;
2387 * If no default placement scheme is given, select an appropriate one
2389 if (!chip
->ecc
.layout
) {
2390 switch (mtd
->oobsize
) {
2392 chip
->ecc
.layout
= &nand_oob_8
;
2395 chip
->ecc
.layout
= &nand_oob_16
;
2398 chip
->ecc
.layout
= &nand_oob_64
;
2401 printk(KERN_WARNING
"No oob scheme defined for "
2402 "oobsize %d\n", mtd
->oobsize
);
2407 if (!chip
->write_page
)
2408 chip
->write_page
= nand_write_page
;
2411 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2412 * selected and we have 256 byte pagesize fallback to software ECC
2414 if (!chip
->ecc
.read_page_raw
)
2415 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
2416 if (!chip
->ecc
.write_page_raw
)
2417 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
2419 switch (chip
->ecc
.mode
) {
2421 /* Use standard hwecc read page function ? */
2422 if (!chip
->ecc
.read_page
)
2423 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2424 if (!chip
->ecc
.write_page
)
2425 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2426 if (!chip
->ecc
.read_oob
)
2427 chip
->ecc
.read_oob
= nand_read_oob_std
;
2428 if (!chip
->ecc
.write_oob
)
2429 chip
->ecc
.write_oob
= nand_write_oob_std
;
2431 case NAND_ECC_HW_SYNDROME
:
2432 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2434 printk(KERN_WARNING
"No ECC functions supplied, "
2435 "Hardware ECC not possible\n");
2438 /* Use standard syndrome read/write page function ? */
2439 if (!chip
->ecc
.read_page
)
2440 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2441 if (!chip
->ecc
.write_page
)
2442 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2443 if (!chip
->ecc
.read_oob
)
2444 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2445 if (!chip
->ecc
.write_oob
)
2446 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2448 if (mtd
->writesize
>= chip
->ecc
.size
)
2450 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2451 "%d byte page size, fallback to SW ECC\n",
2452 chip
->ecc
.size
, mtd
->writesize
);
2453 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2456 chip
->ecc
.calculate
= nand_calculate_ecc
;
2457 chip
->ecc
.correct
= nand_correct_data
;
2458 chip
->ecc
.read_page
= nand_read_page_swecc
;
2459 chip
->ecc
.write_page
= nand_write_page_swecc
;
2460 chip
->ecc
.read_oob
= nand_read_oob_std
;
2461 chip
->ecc
.write_oob
= nand_write_oob_std
;
2462 chip
->ecc
.size
= 256;
2463 chip
->ecc
.bytes
= 3;
2467 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2468 "This is not recommended !!\n");
2469 chip
->ecc
.read_page
= nand_read_page_raw
;
2470 chip
->ecc
.write_page
= nand_write_page_raw
;
2471 chip
->ecc
.read_oob
= nand_read_oob_std
;
2472 chip
->ecc
.write_oob
= nand_write_oob_std
;
2473 chip
->ecc
.size
= mtd
->writesize
;
2474 chip
->ecc
.bytes
= 0;
2478 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2484 * The number of bytes available for a client to place data into
2485 * the out of band area
2487 chip
->ecc
.layout
->oobavail
= 0;
2488 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2489 chip
->ecc
.layout
->oobavail
+=
2490 chip
->ecc
.layout
->oobfree
[i
].length
;
2493 * Set the number of read / write steps for one page depending on ECC
2496 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2497 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2498 printk(KERN_WARNING
"Invalid ecc parameters\n");
2501 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2504 * Allow subpage writes up to ecc.steps. Not possible for MLC
2507 if (!(chip
->options
& NAND_NO_SUBPAGE_WRITE
) &&
2508 !(chip
->cellinfo
& NAND_CI_CELLTYPE_MSK
)) {
2509 switch(chip
->ecc
.steps
) {
2511 mtd
->subpage_sft
= 1;
2515 mtd
->subpage_sft
= 2;
2519 chip
->subpagesize
= mtd
->writesize
>> mtd
->subpage_sft
;
2521 /* Initialize state */
2522 chip
->state
= FL_READY
;
2524 /* De-select the device */
2525 chip
->select_chip(mtd
, -1);
2527 /* Invalidate the pagebuffer reference */
2530 /* Fill in remaining MTD driver data */
2531 mtd
->type
= MTD_NANDFLASH
;
2532 mtd
->flags
= MTD_CAP_NANDFLASH
;
2533 mtd
->ecctype
= MTD_ECC_SW
;
2534 mtd
->erase
= nand_erase
;
2536 mtd
->unpoint
= NULL
;
2537 mtd
->read
= nand_read
;
2538 mtd
->write
= nand_write
;
2539 mtd
->read_oob
= nand_read_oob
;
2540 mtd
->write_oob
= nand_write_oob
;
2541 mtd
->sync
= nand_sync
;
2544 mtd
->suspend
= nand_suspend
;
2545 mtd
->resume
= nand_resume
;
2546 mtd
->block_isbad
= nand_block_isbad
;
2547 mtd
->block_markbad
= nand_block_markbad
;
2549 /* propagate ecc.layout to mtd_info */
2550 mtd
->ecclayout
= chip
->ecc
.layout
;
2552 /* Check, if we should skip the bad block table scan */
2553 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2556 /* Build bad block table */
2557 return chip
->scan_bbt(mtd
);
2560 /* module_text_address() isn't exported, and it's mostly a pointless
2561 test if this is a module _anyway_ -- they'd have to try _really_ hard
2562 to call us from in-kernel code if the core NAND support is modular. */
2564 #define caller_is_module() (1)
2566 #define caller_is_module() \
2567 module_text_address((unsigned long)__builtin_return_address(0))
2571 * nand_scan - [NAND Interface] Scan for the NAND device
2572 * @mtd: MTD device structure
2573 * @maxchips: Number of chips to scan for
2575 * This fills out all the uninitialized function pointers
2576 * with the defaults.
2577 * The flash ID is read and the mtd/chip structures are
2578 * filled with the appropriate values.
2579 * The mtd->owner field must be set to the module of the caller
2582 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2586 /* Many callers got this wrong, so check for it for a while... */
2587 if (!mtd
->owner
&& caller_is_module()) {
2588 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2592 ret
= nand_scan_ident(mtd
, maxchips
);
2594 ret
= nand_scan_tail(mtd
);
2599 * nand_release - [NAND Interface] Free resources held by the NAND device
2600 * @mtd: MTD device structure
2602 void nand_release(struct mtd_info
*mtd
)
2604 struct nand_chip
*chip
= mtd
->priv
;
2606 #ifdef CONFIG_MTD_PARTITIONS
2607 /* Deregister partitions */
2608 del_mtd_partitions(mtd
);
2610 /* Deregister the device */
2611 del_mtd_device(mtd
);
2613 /* Free bad block table memory */
2615 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2616 kfree(chip
->buffers
);
2619 EXPORT_SYMBOL_GPL(nand_scan
);
2620 EXPORT_SYMBOL_GPL(nand_scan_ident
);
2621 EXPORT_SYMBOL_GPL(nand_scan_tail
);
2622 EXPORT_SYMBOL_GPL(nand_release
);
2624 static int __init
nand_base_init(void)
2626 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2630 static void __exit
nand_base_exit(void)
2632 led_trigger_unregister_simple(nand_led_trigger
);
2635 module_init(nand_base_init
);
2636 module_exit(nand_base_exit
);
2638 MODULE_LICENSE("GPL");
2639 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2640 MODULE_DESCRIPTION("Generic NAND flash driver code");